lantiq: dts: mark PCI bridges as such
[openwrt/openwrt.git] / target / linux / lantiq / files / arch / mips / boot / dts / lantiq / vr9.dtsi
index 35b1f180a5e59a11dc3668801a2a2a3af1c96295..22d5509a33faa0665de6c8e3e46ce0655d65ff62 100644 (file)
@@ -1,4 +1,7 @@
+/dts-v1/;
+
 #include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/phy/phy-lantiq-vrx200-pcie.h>
 
 / {
        #address-cells = <1>;
                        #interrupt-cells = <1>;
                        interrupt-controller;
                        compatible = "lantiq,icu";
-                       reg = <0x80200 0x28
-                               0x80228 0x28
-                               0x80250 0x28
-                               0x80278 0x28
-                               0x802a0 0x28>;
+                       reg = <0x80200 0xc8     /* icu0 */
+                              0x80300 0xc8>;   /* icu1 */
                };
 
                watchdog@803f0 {
                        interrupts = <150 151 152 153 154 155>;
                };
 
+               pcie0_phy: phy@106800 {
+                       compatible = "lantiq,vrx200-pcie-phy";
+                       reg = <0x106800 0x100>;
+                       lantiq,rcu = <&rcu0>;
+                       lantiq,rcu-endian-offset = <0x4c>;
+                       lantiq,rcu-big-endian-mask = <0x80>; /* bit 7 */
+                       big-endian;
+                       resets = <&reset0 12 24>, <&reset0 22 22>;
+                       reset-names = "phy", "pcie";
+                       #phy-cells = <1>;
+               };
+
                rcu0: rcu@203000 {
                        #address-cells = <1>;
                        #size-cells = <1>;
                        compatible = "lantiq,xrx200-pinctrl";
                        #gpio-cells = <2>;
                        gpio-controller;
+                       gpio-ranges = <&gpio 0 0 50>;
                        reg = <0xe100b10 0xa0>;
 
                        gphy0_led0_pins: gphy0-led0 {
                };
 
                usb0: usb@e101000 {
+                       #address-cells = <1>;
+                       #size-cells = <0>;
                        status = "disabled";
                        compatible = "lantiq,xrx200-usb";
                        reg = <0xe101000 0x1000
                        dr_mode = "host";
                        phys = <&usb_phy0>;
                        phy-names = "usb2-phy";
+
+                       ehci_port1: port@1 {
+                               reg = <1>;
+                               #trigger-source-cells = <0>;
+                       };
                };
 
                usb1: usb@e106000 {
+                       #address-cells = <1>;
+                       #size-cells = <0>;
                        status = "disabled";
                        compatible = "lantiq,xrx200-usb";
                        reg = <0xe106000 0x1000>;
                        dr_mode = "host";
                        phys = <&usb_phy1>;
                        phy-names = "usb2-phy";
+
+                       ehci_port2: port@1 {
+                               reg = <1>;
+                               #trigger-source-cells = <0>;
+                       };
                };
 
                eth0: eth@e108000 {
                        interrupt-parent = <&icu0>;
                        interrupts = <161 144>;
 
+                       phys = <&pcie0_phy LANTIQ_PCIE_PHY_MODE_36MHZ>;
+                       phy-names = "pcie";
+
+                       resets = <&reset0 22 22>;
+
+                       lantiq,rcu = <&rcu0>;
+
                        device_type = "pci";
 
                        gpio-reset = <&gpio 38 GPIO_ACTIVE_HIGH>;
                        interrupt-map-mask = <0xf800 0x0 0x0 0x7>;
                        interrupt-map = <0x7000 0 0 1 &icu0 30 1>; /* slot 14, irq 30 */
                        req-mask = <0x1>; /* GNT1 */
+
+                       device_type = "pci";
                };
        };