-From 2b2e3b9a0d2abf276b40843f75d97b623e4ee109 Mon Sep 17 00:00:00 2001
+From 1806d342beb334c8cb0a438315ad5529262b2791 Mon Sep 17 00:00:00 2001
From: Yangbo Lu <yangbo.lu@nxp.com>
-Date: Mon, 25 Sep 2017 10:02:10 +0800
-Subject: [PATCH] dts: support layercape
+Date: Wed, 17 Jan 2018 14:52:50 +0800
+Subject: [PATCH 04/30] dts: support layercape
-This is a integrated patch for layerscape dts support.
+This is an integrated patch for layerscape dts support.
Signed-off-by: Amrita Kumari <amrita.kumari@nxp.com>
Signed-off-by: Alison Wang <b18965@freescale.com>
arch/arm/boot/dts/ecx-2000.dts | 2 +-
arch/arm/boot/dts/imx6ul.dtsi | 4 +-
arch/arm/boot/dts/keystone.dtsi | 4 +-
- arch/arm/boot/dts/ls1021a-qds.dts | 13 +
- arch/arm/boot/dts/ls1021a-twr.dts | 13 +
- arch/arm/boot/dts/ls1021a.dtsi | 155 ++--
+ arch/arm/boot/dts/ls1021a-qds.dts | 21 +
+ arch/arm/boot/dts/ls1021a-twr.dts | 25 +
+ arch/arm/boot/dts/ls1021a.dtsi | 197 +++--
arch/arm/boot/dts/mt6580.dtsi | 2 +-
arch/arm/boot/dts/mt6589.dtsi | 2 +-
arch/arm/boot/dts/mt8127.dtsi | 2 +-
arch/arm/boot/dts/sun7i-a20.dtsi | 4 +-
arch/arm/boot/dts/sun8i-a23-a33.dtsi | 2 +-
arch/arm/boot/dts/sun9i-a80.dtsi | 2 +-
- arch/arm64/boot/dts/freescale/Makefile | 16 +
- arch/arm64/boot/dts/freescale/fsl-ls1012a-frdm.dts | 134 +++
- arch/arm64/boot/dts/freescale/fsl-ls1012a-qds.dts | 155 ++++
- arch/arm64/boot/dts/freescale/fsl-ls1012a-rdb.dts | 91 +++
- arch/arm64/boot/dts/freescale/fsl-ls1012a.dtsi | 517 ++++++++++++
+ arch/arm64/boot/dts/freescale/Makefile | 17 +
+ .../boot/dts/freescale/fsl-ls1012a-2g5rdb.dts | 123 +++
+ arch/arm64/boot/dts/freescale/fsl-ls1012a-frdm.dts | 177 ++++
+ arch/arm64/boot/dts/freescale/fsl-ls1012a-qds.dts | 202 +++++
+ arch/arm64/boot/dts/freescale/fsl-ls1012a-rdb.dts | 138 ++++
+ arch/arm64/boot/dts/freescale/fsl-ls1012a.dtsi | 602 ++++++++++++++
arch/arm64/boot/dts/freescale/fsl-ls1043-post.dtsi | 45 +
.../boot/dts/freescale/fsl-ls1043a-qds-sdk.dts | 69 ++
arch/arm64/boot/dts/freescale/fsl-ls1043a-qds.dts | 171 +++-
.../boot/dts/freescale/fsl-ls1043a-rdb-sdk.dts | 69 ++
.../boot/dts/freescale/fsl-ls1043a-rdb-usdpaa.dts | 117 +++
arch/arm64/boot/dts/freescale/fsl-ls1043a-rdb.dts | 113 ++-
- arch/arm64/boot/dts/freescale/fsl-ls1043a.dtsi | 302 ++++++-
+ arch/arm64/boot/dts/freescale/fsl-ls1043a.dtsi | 308 ++++++-
arch/arm64/boot/dts/freescale/fsl-ls1046-post.dtsi | 48 ++
- .../boot/dts/freescale/fsl-ls1046a-qds-sdk.dts | 109 +++
+ .../boot/dts/freescale/fsl-ls1046a-qds-sdk.dts | 110 +++
arch/arm64/boot/dts/freescale/fsl-ls1046a-qds.dts | 363 ++++++++
- .../boot/dts/freescale/fsl-ls1046a-rdb-sdk.dts | 76 ++
+ .../boot/dts/freescale/fsl-ls1046a-rdb-sdk.dts | 83 ++
.../boot/dts/freescale/fsl-ls1046a-rdb-usdpaa.dts | 110 +++
arch/arm64/boot/dts/freescale/fsl-ls1046a-rdb.dts | 218 +++++
- arch/arm64/boot/dts/freescale/fsl-ls1046a.dtsi | 793 ++++++++++++++++++
+ arch/arm64/boot/dts/freescale/fsl-ls1046a.dtsi | 800 ++++++++++++++++++
arch/arm64/boot/dts/freescale/fsl-ls1088a-qds.dts | 173 ++++
arch/arm64/boot/dts/freescale/fsl-ls1088a-rdb.dts | 236 ++++++
- arch/arm64/boot/dts/freescale/fsl-ls1088a.dtsi | 816 ++++++++++++++++++
+ arch/arm64/boot/dts/freescale/fsl-ls1088a.dtsi | 825 ++++++++++++++++++
arch/arm64/boot/dts/freescale/fsl-ls2080a-qds.dts | 191 ++---
arch/arm64/boot/dts/freescale/fsl-ls2080a-rdb.dts | 169 ++--
arch/arm64/boot/dts/freescale/fsl-ls2080a-simu.dts | 9 +-
arch/arm64/boot/dts/freescale/fsl-ls2088a.dtsi | 195 +++++
arch/arm64/boot/dts/freescale/fsl-ls208xa-qds.dtsi | 198 +++++
arch/arm64/boot/dts/freescale/fsl-ls208xa-rdb.dtsi | 161 ++++
- arch/arm64/boot/dts/freescale/fsl-ls208xa.dtsi | 910 +++++++++++++++++++++
+ arch/arm64/boot/dts/freescale/fsl-ls208xa.dtsi | 919 +++++++++++++++++++++
.../boot/dts/freescale/qoriq-bman1-portals.dtsi | 81 ++
- arch/arm64/boot/dts/freescale/qoriq-dpaa-eth.dtsi | 66 ++
+ arch/arm64/boot/dts/freescale/qoriq-dpaa-eth.dtsi | 73 ++
.../boot/dts/freescale/qoriq-fman3-0-10g-0.dtsi | 43 +
.../boot/dts/freescale/qoriq-fman3-0-10g-1.dtsi | 43 +
.../boot/dts/freescale/qoriq-fman3-0-1g-0.dtsi | 42 +
arch/powerpc/boot/dts/fsl/qoriq-bman1-portals.dtsi | 10 +
arch/powerpc/boot/dts/fsl/qoriq-fman3-0-10g-0.dtsi | 4 +-
arch/powerpc/boot/dts/fsl/qoriq-fman3-0-10g-1.dtsi | 4 +-
- 66 files changed, 7778 insertions(+), 1021 deletions(-)
+ 67 files changed, 8231 insertions(+), 1022 deletions(-)
+ create mode 100644 arch/arm64/boot/dts/freescale/fsl-ls1012a-2g5rdb.dts
create mode 100644 arch/arm64/boot/dts/freescale/fsl-ls1012a-frdm.dts
create mode 100644 arch/arm64/boot/dts/freescale/fsl-ls1012a-qds.dts
create mode 100644 arch/arm64/boot/dts/freescale/fsl-ls1012a-rdb.dts
create mode 100644 arch/arm64/boot/dts/freescale/qoriq-fman3-0.dtsi
create mode 100644 arch/arm64/boot/dts/freescale/qoriq-qman1-portals.dtsi
-diff --git a/arch/arm/boot/dts/alpine.dtsi b/arch/arm/boot/dts/alpine.dtsi
-index db8752fc..d0eefc3b 100644
--- a/arch/arm/boot/dts/alpine.dtsi
+++ b/arch/arm/boot/dts/alpine.dtsi
@@ -93,7 +93,7 @@
<0x0 0xfb006000 0x0 0x2000>;
interrupts =
<GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>;
-diff --git a/arch/arm/boot/dts/axm55xx.dtsi b/arch/arm/boot/dts/axm55xx.dtsi
-index a9d6d593..47799f59 100644
--- a/arch/arm/boot/dts/axm55xx.dtsi
+++ b/arch/arm/boot/dts/axm55xx.dtsi
@@ -62,7 +62,7 @@
<0x20 0x01004000 0 0x2000>,
<0x20 0x01006000 0 0x2000>;
interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(4) |
-diff --git a/arch/arm/boot/dts/ecx-2000.dts b/arch/arm/boot/dts/ecx-2000.dts
-index 2ccbb57f..c15e7e0c 100644
--- a/arch/arm/boot/dts/ecx-2000.dts
+++ b/arch/arm/boot/dts/ecx-2000.dts
@@ -99,7 +99,7 @@
<0xfff14000 0x2000>,
<0xfff16000 0x2000>;
};
-diff --git a/arch/arm/boot/dts/imx6ul.dtsi b/arch/arm/boot/dts/imx6ul.dtsi
-index c5c05fdc..c1396873 100644
--- a/arch/arm/boot/dts/imx6ul.dtsi
+++ b/arch/arm/boot/dts/imx6ul.dtsi
@@ -89,11 +89,11 @@
<0x00a04000 0x2000>,
<0x00a06000 0x2000>;
};
-diff --git a/arch/arm/boot/dts/keystone.dtsi b/arch/arm/boot/dts/keystone.dtsi
-index 02708ba2..e30c83fc 100644
--- a/arch/arm/boot/dts/keystone.dtsi
+++ b/arch/arm/boot/dts/keystone.dtsi
@@ -30,12 +30,12 @@
<0x0 0x02566000 0x0 0x2000>;
interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(4) |
IRQ_TYPE_LEVEL_HIGH)>;
-diff --git a/arch/arm/boot/dts/ls1021a-qds.dts b/arch/arm/boot/dts/ls1021a-qds.dts
-index 94087531..5611a9c9 100644
--- a/arch/arm/boot/dts/ls1021a-qds.dts
+++ b/arch/arm/boot/dts/ls1021a-qds.dts
@@ -124,6 +124,19 @@
&enet0 {
tbi-handle = <&tbi0>;
phy-handle = <&sgmii_phy1c>;
-diff --git a/arch/arm/boot/dts/ls1021a-twr.dts b/arch/arm/boot/dts/ls1021a-twr.dts
-index a8b148ad..907e5392 100644
+@@ -331,3 +344,11 @@
+ &uart1 {
+ status = "okay";
+ };
++
++&can0 {
++ status = "okay";
++};
++
++&can1 {
++ status = "okay";
++};
--- a/arch/arm/boot/dts/ls1021a-twr.dts
+++ b/arch/arm/boot/dts/ls1021a-twr.dts
@@ -142,6 +142,19 @@
&enet0 {
tbi-handle = <&tbi1>;
phy-handle = <&sgmii_phy2>;
-diff --git a/arch/arm/boot/dts/ls1021a.dtsi b/arch/arm/boot/dts/ls1021a.dtsi
-index 368e2193..def82fef 100644
+@@ -228,6 +241,10 @@
+ };
+ };
+
++&esdhc {
++ status = "okay";
++};
++
+ &sai1 {
+ status = "okay";
+ };
+@@ -243,3 +260,11 @@
+ &uart1 {
+ status = "okay";
+ };
++
++&can0 {
++ status = "okay";
++};
++
++&can1 {
++ status = "okay";
++};
--- a/arch/arm/boot/dts/ls1021a.dtsi
+++ b/arch/arm/boot/dts/ls1021a.dtsi
@@ -74,17 +74,24 @@
};
+ ftm0: ftm0@29d0000 {
-+ compatible = "fsl,ftm-alarm";
++ compatible = "fsl,ls1021a-ftm";
+ reg = <0x0 0x29d0000 0x0 0x10000>,
+ <0x0 0x1ee2140 0x0 0x4>;
+ reg-names = "ftm", "FlexTimer1";
+
+ qdma: qdma@8390000 {
+ compatible = "fsl,ls1021a-qdma";
-+ reg = <0x0 0x8388000 0x0 0x1000>, /* Controller regs */
-+ <0x0 0x8389000 0x0 0x1000>, /* Status regs */
-+ <0x0 0x838a000 0x0 0x2000>; /* Block regs */
++ reg = <0x0 0x8398000 0x0 0x1000>, /* Controller regs */
++ <0x0 0x8399000 0x0 0x1000>, /* Status regs */
++ <0x0 0x839a000 0x0 0x2000>; /* Block regs */
+ interrupts = <GIC_SPI 185 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 76 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-names = "qdma-error", "qdma-queue";
#interrupt-cells = <1>;
interrupt-map-mask = <0 0 0 7>;
interrupt-map = <0000 0 0 1 &gic GIC_SPI 92 IRQ_TYPE_LEVEL_HIGH>,
-diff --git a/arch/arm/boot/dts/mt6580.dtsi b/arch/arm/boot/dts/mt6580.dtsi
-index 06fdf6c2..a349dba5 100644
+@@ -674,5 +697,45 @@
+ <0000 0 0 3 &gic GIC_SPI 191 IRQ_TYPE_LEVEL_HIGH>,
+ <0000 0 0 4 &gic GIC_SPI 193 IRQ_TYPE_LEVEL_HIGH>;
+ };
++
++ can0: can@2a70000 {
++ compatible = "fsl,ls1021ar2-flexcan";
++ reg = <0x0 0x2a70000 0x0 0x1000>;
++ interrupts = <GIC_SPI 126 IRQ_TYPE_LEVEL_HIGH>;
++ clocks = <&clockgen 4 1>, <&clockgen 4 1>;
++ clock-names = "ipg", "per";
++ big-endian;
++ status = "disabled";
++ };
++
++ can1: can@2a80000 {
++ compatible = "fsl,ls1021ar2-flexcan";
++ reg = <0x0 0x2a80000 0x0 0x1000>;
++ interrupts = <GIC_SPI 127 IRQ_TYPE_LEVEL_HIGH>;
++ clocks = <&clockgen 4 1>, <&clockgen 4 1>;
++ clock-names = "ipg", "per";
++ big-endian;
++ status = "disabled";
++ };
++
++ can2: can@2a90000 {
++ compatible = "fsl,ls1021ar2-flexcan";
++ reg = <0x0 0x2a90000 0x0 0x1000>;
++ interrupts = <GIC_SPI 128 IRQ_TYPE_LEVEL_HIGH>;
++ clocks = <&clockgen 4 1>, <&clockgen 4 1>;
++ clock-names = "ipg", "per";
++ big-endian;
++ status = "disabled";
++ };
++
++ can3: can@2aa0000 {
++ compatible = "fsl,ls1021ar2-flexcan";
++ reg = <0x0 0x2aa0000 0x0 0x1000>;
++ interrupts = <GIC_SPI 129 IRQ_TYPE_LEVEL_HIGH>;
++ clocks = <&clockgen 4 1>, <&clockgen 4 1>;
++ clock-names = "ipg", "per";
++ big-endian;
++ status = "disabled";
++ };
+ };
+ };
--- a/arch/arm/boot/dts/mt6580.dtsi
+++ b/arch/arm/boot/dts/mt6580.dtsi
@@ -91,7 +91,7 @@
<0x10214000 0x2000>,
<0x10216000 0x2000>;
};
-diff --git a/arch/arm/boot/dts/mt6589.dtsi b/arch/arm/boot/dts/mt6589.dtsi
-index 88b3cb12..0d6f60af 100644
--- a/arch/arm/boot/dts/mt6589.dtsi
+++ b/arch/arm/boot/dts/mt6589.dtsi
@@ -102,7 +102,7 @@
<0x10214000 0x2000>,
<0x10216000 0x2000>;
};
-diff --git a/arch/arm/boot/dts/mt8127.dtsi b/arch/arm/boot/dts/mt8127.dtsi
-index 52086c80..916c095d 100644
--- a/arch/arm/boot/dts/mt8127.dtsi
+++ b/arch/arm/boot/dts/mt8127.dtsi
@@ -129,7 +129,7 @@
<0 0x10214000 0 0x2000>,
<0 0x10216000 0 0x2000>;
};
-diff --git a/arch/arm/boot/dts/mt8135.dtsi b/arch/arm/boot/dts/mt8135.dtsi
-index 1d7f92bd..a97b4ee4 100644
--- a/arch/arm/boot/dts/mt8135.dtsi
+++ b/arch/arm/boot/dts/mt8135.dtsi
@@ -221,7 +221,7 @@
<0 0x10214000 0 0x2000>,
<0 0x10216000 0 0x2000>;
};
-diff --git a/arch/arm/boot/dts/rk3288.dtsi b/arch/arm/boot/dts/rk3288.dtsi
-index 17ec2e2d..559fc549 100644
--- a/arch/arm/boot/dts/rk3288.dtsi
+++ b/arch/arm/boot/dts/rk3288.dtsi
-@@ -1109,7 +1109,7 @@
+@@ -1110,7 +1110,7 @@
#address-cells = <0>;
reg = <0xffc01000 0x1000>,
<0xffc04000 0x2000>,
<0xffc06000 0x2000>;
interrupts = <GIC_PPI 9 0xf04>;
-diff --git a/arch/arm/boot/dts/sun6i-a31.dtsi b/arch/arm/boot/dts/sun6i-a31.dtsi
-index ce196045..97f28399 100644
--- a/arch/arm/boot/dts/sun6i-a31.dtsi
+++ b/arch/arm/boot/dts/sun6i-a31.dtsi
@@ -791,7 +791,7 @@
<0x01c84000 0x2000>,
<0x01c86000 0x2000>;
interrupt-controller;
-diff --git a/arch/arm/boot/dts/sun7i-a20.dtsi b/arch/arm/boot/dts/sun7i-a20.dtsi
-index 94cf5a1c..81e5a44c 100644
--- a/arch/arm/boot/dts/sun7i-a20.dtsi
+++ b/arch/arm/boot/dts/sun7i-a20.dtsi
@@ -1685,9 +1685,9 @@
<0x01c84000 0x2000>,
<0x01c86000 0x2000>;
interrupt-controller;
-diff --git a/arch/arm/boot/dts/sun8i-a23-a33.dtsi b/arch/arm/boot/dts/sun8i-a23-a33.dtsi
-index 300a1bd5..cdff5888 100644
--- a/arch/arm/boot/dts/sun8i-a23-a33.dtsi
+++ b/arch/arm/boot/dts/sun8i-a23-a33.dtsi
@@ -488,7 +488,7 @@
<0x01c84000 0x2000>,
<0x01c86000 0x2000>;
interrupt-controller;
-diff --git a/arch/arm/boot/dts/sun9i-a80.dtsi b/arch/arm/boot/dts/sun9i-a80.dtsi
-index 3c5214cb..ba7e7c71 100644
--- a/arch/arm/boot/dts/sun9i-a80.dtsi
+++ b/arch/arm/boot/dts/sun9i-a80.dtsi
@@ -613,7 +613,7 @@
<0x01c44000 0x2000>,
<0x01c46000 0x2000>;
interrupt-controller;
-diff --git a/arch/arm64/boot/dts/freescale/Makefile b/arch/arm64/boot/dts/freescale/Makefile
-index 1b7783db..2d7986a1 100644
--- a/arch/arm64/boot/dts/freescale/Makefile
+++ b/arch/arm64/boot/dts/freescale/Makefile
-@@ -1,8 +1,24 @@
+@@ -1,8 +1,25 @@
+dtb-$(CONFIG_ARCH_LAYERSCAPE) += fsl-ls1012a-frdm.dtb
+dtb-$(CONFIG_ARCH_LAYERSCAPE) += fsl-ls1012a-qds.dtb
+dtb-$(CONFIG_ARCH_LAYERSCAPE) += fsl-ls1012a-rdb.dtb
++dtb-$(CONFIG_ARCH_LAYERSCAPE) += fsl-ls1012a-2g5rdb.dtb
dtb-$(CONFIG_ARCH_LAYERSCAPE) += fsl-ls1043a-qds.dtb
+dtb-$(CONFIG_ARCH_LAYERSCAPE) += fsl-ls1043a-qds-sdk.dtb
dtb-$(CONFIG_ARCH_LAYERSCAPE) += fsl-ls1043a-rdb.dtb
always := $(dtb-y)
subdir-y := $(dts-dirs)
-diff --git a/arch/arm64/boot/dts/freescale/fsl-ls1012a-frdm.dts b/arch/arm64/boot/dts/freescale/fsl-ls1012a-frdm.dts
-new file mode 100644
-index 00000000..e1274c18
+--- /dev/null
++++ b/arch/arm64/boot/dts/freescale/fsl-ls1012a-2g5rdb.dts
+@@ -0,0 +1,123 @@
++/*
++ * Device Tree file for NXP LS1012A 2G5RDB Board.
++ *
++ * Copyright 2017 NXP
++ *
++ * Bhaskar Upadhaya <bhaskar.upadhaya@nxp.com>
++ *
++ * This file is dual-licensed: you can use it either under the terms
++ * of the GPLv2 or the X11 license, at your option. Note that this dual
++ * licensing only applies to this file, and not this project as a
++ * whole.
++ *
++ * a) This library is free software; you can redistribute it and/or
++ * modify it under the terms of the GNU General Public License as
++ * published by the Free Software Foundation; either version 2 of the
++ * License, or (at your option) any later version.
++ *
++ * This library is distributed in the hope that it will be useful,
++ * but WITHOUT ANY WARRANTY; without even the implied warranty of
++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
++ * GNU General Public License for more details.
++ *
++ * Or, alternatively,
++ *
++ * b) Permission is hereby granted, free of charge, to any person
++ * obtaining a copy of this software and associated documentation
++ * files (the "Software"), to deal in the Software without
++ * restriction, including without limitation the rights to use,
++ * copy, modify, merge, publish, distribute, sublicense, and/or
++ * sell copies of the Software, and to permit persons to whom the
++ * Software is furnished to do so, subject to the following
++ * conditions:
++ *
++ * The above copyright notice and this permission notice shall be
++ * included in all copies or substantial portions of the Software.
++ *
++ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
++ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
++ * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
++ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
++ * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
++ * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
++ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
++ * OTHER DEALINGS IN THE SOFTWARE.
++ */
++/dts-v1/;
++
++#include "fsl-ls1012a.dtsi"
++
++/ {
++ model = "LS1012A 2G5RDB Board";
++ compatible = "fsl,ls1012a-rdb", "fsl,ls1012a";
++
++ aliases {
++ ethernet0 = &pfe_mac0;
++ ethernet1 = &pfe_mac1;
++ };
++};
++
++&duart0 {
++ status = "okay";
++};
++
++&i2c0 {
++ status = "okay";
++};
++
++&qspi {
++ num-cs = <2>;
++ bus-num = <0>;
++ status = "okay";
++
++ qflash0: s25fs512s@0 {
++ compatible = "spansion,m25p80";
++ #address-cells = <1>;
++ #size-cells = <1>;
++ spi-max-frequency = <20000000>;
++ m25p,fast-read;
++ reg = <0>;
++ };
++};
++
++&sata {
++ status = "okay";
++};
++
++&pfe {
++ status = "okay";
++ #address-cells = <1>;
++ #size-cells = <0>;
++
++ ethernet@0 {
++ compatible = "fsl,pfe-gemac-port";
++ #address-cells = <1>;
++ #size-cells = <0>;
++ reg = <0x0>; /* GEM_ID */
++ fsl,gemac-bus-id = <0x0>; /* BUS_ID */
++ fsl,gemac-phy-id = <0x1>; /* PHY_ID */
++ fsl,mdio-mux-val = <0x0>;
++ phy-mode = "sgmii-2500";
++ fsl,pfe-phy-if-flags = <0x0>;
++
++ mdio@0 {
++ reg = <0x1>; /* enabled/disabled */
++ };
++ };
++
++ ethernet@1 {
++ compatible = "fsl,pfe-gemac-port";
++ #address-cells = <1>;
++ #size-cells = <0>;
++ reg = <0x1>; /* GEM_ID */
++ fsl,gemac-bus-id = < 0x0>; /* BUS_ID */
++ fsl,gemac-phy-id = < 0x2>; /* PHY_ID */
++ fsl,mdio-mux-val = <0x0>;
++ phy-mode = "sgmii-2500";
++ fsl,pfe-phy-if-flags = <0x0>;
++
++ mdio@0 {
++ reg = <0x0>; /* enabled/disabled */
++ };
++ };
++};
--- /dev/null
+++ b/arch/arm64/boot/dts/freescale/fsl-ls1012a-frdm.dts
-@@ -0,0 +1,134 @@
+@@ -0,0 +1,177 @@
+/*
+ * Device Tree file for Freescale LS1012A Freedom Board.
+ *
+ model = "LS1012A Freedom Board";
+ compatible = "fsl,ls1012a-frdm", "fsl,ls1012a";
+
++ aliases {
++ ethernet0 = &pfe_mac0;
++ ethernet1 = &pfe_mac1;
++ };
++
+ sys_mclk: clock-mclk {
+ compatible = "fixed-clock";
+ #clock-cells = <0>;
+ };
+};
+
++&pfe {
++ status = "okay";
++ #address-cells = <1>;
++ #size-cells = <0>;
++
++ ethernet@0 {
++ compatible = "fsl,pfe-gemac-port";
++ #address-cells = <1>;
++ #size-cells = <0>;
++ reg = <0x0>; /* GEM_ID */
++ fsl,gemac-bus-id = <0x0>; /* BUS_ID */
++ fsl,gemac-phy-id = <0x2>; /* PHY_ID */
++ fsl,mdio-mux-val = <0x0>;
++ phy-mode = "sgmii";
++ fsl,pfe-phy-if-flags = <0x0>;
++
++ mdio@0 {
++ reg = <0x1>; /* enabled/disabled */
++ };
++ };
++
++ ethernet@1 {
++ compatible = "fsl,pfe-gemac-port";
++ #address-cells = <1>;
++ #size-cells = <0>;
++ reg = <0x1>; /* GEM_ID */
++ fsl,gemac-bus-id = <0x1>; /* BUS_ID */
++ fsl,gemac-phy-id = <0x1>; /* PHY_ID */
++ fsl,mdio-mux-val = <0x0>;
++ phy-mode = "sgmii";
++ fsl,pfe-phy-if-flags = <0x0>;
++
++ mdio@0 {
++ reg = <0x0>; /* enabled/disabled */
++ };
++ };
++};
++
+&sai2 {
+ status = "okay";
+};
+&sata {
+ status = "okay";
+};
-diff --git a/arch/arm64/boot/dts/freescale/fsl-ls1012a-qds.dts b/arch/arm64/boot/dts/freescale/fsl-ls1012a-qds.dts
-new file mode 100644
-index 00000000..1e1b2802
--- /dev/null
+++ b/arch/arm64/boot/dts/freescale/fsl-ls1012a-qds.dts
-@@ -0,0 +1,155 @@
+@@ -0,0 +1,202 @@
+/*
+ * Device Tree file for Freescale LS1012A QDS Board.
+ *
+ model = "LS1012A QDS Board";
+ compatible = "fsl,ls1012a-qds", "fsl,ls1012a";
+
++ aliases {
++ ethernet0 = &pfe_mac0;
++ ethernet1 = &pfe_mac1;
++ };
++
+ sys_mclk: clock-mclk {
+ compatible = "fixed-clock";
+ #clock-cells = <0>;
+ };
+};
+
++&pcie {
++ status = "okay";
++};
++
+&duart0 {
+ status = "okay";
+};
+ };
+};
+
++&pfe {
++ status = "okay";
++ #address-cells = <1>;
++ #size-cells = <0>;
++
++ ethernet@0 {
++ compatible = "fsl,pfe-gemac-port";
++ #address-cells = <1>;
++ #size-cells = <0>;
++ reg = <0x0>; /* GEM_ID */
++ fsl,gemac-bus-id = <0x0>; /* BUS_ID */
++ fsl,gemac-phy-id = <0x1>; /* PHY_ID */
++ fsl,mdio-mux-val = <0x2>;
++ phy-mode = "sgmii-2500";
++ fsl,pfe-phy-if-flags = <0x0>;
++
++ mdio@0 {
++ reg = <0x1>; /* enabled/disabled */
++ };
++ };
++
++ ethernet@1 {
++ compatible = "fsl,pfe-gemac-port";
++ #address-cells = <1>;
++ #size-cells = <0>;
++ reg = <0x1>; /* GEM_ID */
++ fsl,gemac-bus-id = <0x1>; /* BUS_ID */
++ fsl,gemac-phy-id = <0x2>; /* PHY_ID */
++ fsl,mdio-mux-val = <0x3>;
++ phy-mode = "sgmii-2500";
++ fsl,pfe-phy-if-flags = <0x0>;
++
++ mdio@0 {
++ reg = <0x0>; /* enabled/disabled */
++ };
++ };
++};
++
+&sai2 {
+ status = "okay";
+};
+&esdhc1 {
+ status = "okay";
+};
-diff --git a/arch/arm64/boot/dts/freescale/fsl-ls1012a-rdb.dts b/arch/arm64/boot/dts/freescale/fsl-ls1012a-rdb.dts
-new file mode 100644
-index 00000000..90bd2307
--- /dev/null
+++ b/arch/arm64/boot/dts/freescale/fsl-ls1012a-rdb.dts
-@@ -0,0 +1,91 @@
+@@ -0,0 +1,138 @@
+/*
+ * Device Tree file for Freescale LS1012A RDB Board.
+ *
+/ {
+ model = "LS1012A RDB Board";
+ compatible = "fsl,ls1012a-rdb", "fsl,ls1012a";
++
++ aliases {
++ ethernet0 = &pfe_mac0;
++ ethernet1 = &pfe_mac1;
++ };
++};
++
++&pcie {
++ status = "okay";
+};
+
+&duart0 {
+ mmc-hs200-1_8v;
+ status = "okay";
+};
-diff --git a/arch/arm64/boot/dts/freescale/fsl-ls1012a.dtsi b/arch/arm64/boot/dts/freescale/fsl-ls1012a.dtsi
-new file mode 100644
-index 00000000..9ede9d52
++
++&pfe {
++ status = "okay";
++ #address-cells = <1>;
++ #size-cells = <0>;
++
++ ethernet@0 {
++ compatible = "fsl,pfe-gemac-port";
++ #address-cells = <1>;
++ #size-cells = <0>;
++ reg = <0x0>; /* GEM_ID */
++ fsl,gemac-bus-id = <0x0>; /* BUS_ID */
++ fsl,gemac-phy-id = <0x2>; /* PHY_ID */
++ fsl,mdio-mux-val = <0x0>;
++ phy-mode = "sgmii";
++ fsl,pfe-phy-if-flags = <0x0>;
++
++ mdio@0 {
++ reg = <0x1>; /* enabled/disabled */
++ };
++ };
++
++ ethernet@1 {
++ compatible = "fsl,pfe-gemac-port";
++ #address-cells = <1>;
++ #size-cells = <0>;
++ reg = <0x1>; /* GEM_ID */
++ fsl,gemac-bus-id = < 0x1 >; /* BUS_ID */
++ fsl,gemac-phy-id = < 0x1 >; /* PHY_ID */
++ fsl,mdio-mux-val = <0x0>;
++ phy-mode = "rgmii-txid";
++ fsl,pfe-phy-if-flags = <0x0>;
++
++ mdio@0 {
++ reg = <0x0>; /* enabled/disabled */
++ };
++ };
++};
--- /dev/null
+++ b/arch/arm64/boot/dts/freescale/fsl-ls1012a.dtsi
-@@ -0,0 +1,517 @@
+@@ -0,0 +1,602 @@
+/*
+ * Device Tree Include file for Freescale Layerscape-1012A family SoC.
+ *
+ interrupts = <GIC_SPI 74 IRQ_TYPE_LEVEL_HIGH>;
+ };
+
++ caam-dma {
++ compatible = "fsl,sec-v5.4-dma",
++ "fsl,sec-v5.0-dma",
++ "fsl,sec-v4.0-dma";
++ };
++
+ rtic@60000 {
+ compatible = "fsl,sec-v5.4-rtic",
+ "fsl,sec-v5.0-rtic",
+ status = "disabled";
+ };
+
++ rcpm: rcpm@1ee2000 {
++ compatible = "fsl,ls1012a-rcpm", "fsl,qoriq-rcpm-2.1";
++ reg = <0x0 0x1ee2000 0x0 0x1000>;
++ fsl,#rcpm-wakeup-cells = <1>;
++ };
++
+ ftm0: ftm0@29d0000 {
-+ compatible = "fsl,ftm-alarm";
++ compatible = "fsl,ls1012a-ftm";
+ reg = <0x0 0x29d0000 0x0 0x10000>,
+ <0x0 0x1ee2140 0x0 0x4>;
+ reg-names = "ftm", "FlexTimer1";
+ #size-cells = <0>;
+ reg = <0x0 0x2180000 0x0 0x10000>;
+ interrupts = <0 56 IRQ_TYPE_LEVEL_HIGH>;
-+ clocks = <&clockgen 4 0>;
++ clocks = <&clockgen 4 3>;
+ status = "disabled";
+ };
+
+ #size-cells = <0>;
+ reg = <0x0 0x2190000 0x0 0x10000>;
+ interrupts = <0 57 IRQ_TYPE_LEVEL_HIGH>;
-+ clocks = <&clockgen 4 0>;
++ clocks = <&clockgen 4 3>;
+ status = "disabled";
+ };
+
+ dma-coherent;
+ status = "disabled";
+ };
++
++ msi: msi-controller1@1572000 {
++ compatible = "fsl,ls1012a-msi";
++ reg = <0x0 0x1572000 0x0 0x8>;
++ msi-controller;
++ interrupts = <0 126 IRQ_TYPE_LEVEL_HIGH>;
++ };
++
++ pcie: pcie@3400000 {
++ compatible = "fsl,ls1012a-pcie", "snps,dw-pcie";
++ reg = <0x00 0x03400000 0x0 0x00100000 /* controller registers */
++ 0x40 0x00000000 0x0 0x00002000>; /* configuration space */
++ reg-names = "regs", "config";
++ interrupts = <0 118 0x4>, /* AER interrupt */
++ <0 117 0x4>; /* PME interrupt */
++ interrupt-names = "aer", "pme";
++ #address-cells = <3>;
++ #size-cells = <2>;
++ device_type = "pci";
++ num-lanes = <4>;
++ bus-range = <0x0 0xff>;
++ ranges = <0x81000000 0x0 0x00000000 0x40 0x00010000 0x0 0x00010000 /* downstream I/O */
++ 0x82000000 0x0 0x40000000 0x40 0x40000000 0x0 0x40000000>; /* non-prefetchable memory */
++ msi-parent = <&msi>;
++ #interrupt-cells = <1>;
++ interrupt-map-mask = <0 0 0 7>;
++ interrupt-map = <0000 0 0 1 &gic 0 110 IRQ_TYPE_LEVEL_HIGH>,
++ <0000 0 0 2 &gic 0 111 IRQ_TYPE_LEVEL_HIGH>,
++ <0000 0 0 3 &gic 0 112 IRQ_TYPE_LEVEL_HIGH>,
++ <0000 0 0 4 &gic 0 113 IRQ_TYPE_LEVEL_HIGH>;
++ status = "disabled";
++ };
++ };
++
++ reserved-memory {
++ #address-cells = <2>;
++ #size-cells = <2>;
++ ranges;
++
++ pfe_reserved: packetbuffer@83400000 {
++ reg = <0 0x83400000 0 0xc00000>;
++ };
++ };
++
++ pfe: pfe@04000000 {
++ compatible = "fsl,pfe";
++ reg = <0x0 0x04000000 0x0 0xc00000>, /* AXI 16M */
++ <0x0 0x83400000 0x0 0xc00000>; /* PFE DDR 12M */
++ reg-names = "pfe", "pfe-ddr";
++ fsl,pfe-num-interfaces = <0x2>;
++ interrupts = <0 172 0x4>, /* HIF interrupt */
++ <0 173 0x4>, /*HIF_NOCPY interrupt */
++ <0 174 0x4>; /* WoL interrupt */
++ interrupt-names = "pfe_hif", "pfe_hif_nocpy", "pfe_wol";
++ memory-region = <&pfe_reserved>;
++ fsl,pfe-scfg = <&scfg 0>;
++ fsl,rcpm-wakeup = <&rcpm 0xf0000020>;
++ clocks = <&clockgen 4 0>;
++ clock-names = "pfe";
++
++ status = "okay";
++ pfe_mac0: ethernet@0 {
++ };
++
++ pfe_mac1: ethernet@1 {
++ };
++ };
++
++ firmware {
++ optee {
++ compatible = "linaro,optee-tz";
++ method = "smc";
++ };
+ };
+};
-diff --git a/arch/arm64/boot/dts/freescale/fsl-ls1043-post.dtsi b/arch/arm64/boot/dts/freescale/fsl-ls1043-post.dtsi
-new file mode 100644
-index 00000000..169e1714
--- /dev/null
+++ b/arch/arm64/boot/dts/freescale/fsl-ls1043-post.dtsi
@@ -0,0 +1,45 @@
+ enet6: ethernet@f0000 {
+ };
+};
-diff --git a/arch/arm64/boot/dts/freescale/fsl-ls1043a-qds-sdk.dts b/arch/arm64/boot/dts/freescale/fsl-ls1043a-qds-sdk.dts
-new file mode 100644
-index 00000000..6c13b416
--- /dev/null
+++ b/arch/arm64/boot/dts/freescale/fsl-ls1043a-qds-sdk.dts
@@ -0,0 +1,69 @@
+&fman0 {
+ compatible = "fsl,fman", "simple-bus";
+};
-diff --git a/arch/arm64/boot/dts/freescale/fsl-ls1043a-qds.dts b/arch/arm64/boot/dts/freescale/fsl-ls1043a-qds.dts
-index dd9e9194..08abff73 100644
--- a/arch/arm64/boot/dts/freescale/fsl-ls1043a-qds.dts
+++ b/arch/arm64/boot/dts/freescale/fsl-ls1043a-qds.dts
@@ -1,7 +1,7 @@
+ };
+ };
+};
-diff --git a/arch/arm64/boot/dts/freescale/fsl-ls1043a-rdb-sdk.dts b/arch/arm64/boot/dts/freescale/fsl-ls1043a-rdb-sdk.dts
-new file mode 100644
-index 00000000..ac4b9a41
--- /dev/null
+++ b/arch/arm64/boot/dts/freescale/fsl-ls1043a-rdb-sdk.dts
@@ -0,0 +1,69 @@
+&fman0 {
+ compatible = "fsl,fman", "simple-bus";
+};
-diff --git a/arch/arm64/boot/dts/freescale/fsl-ls1043a-rdb-usdpaa.dts b/arch/arm64/boot/dts/freescale/fsl-ls1043a-rdb-usdpaa.dts
-new file mode 100644
-index 00000000..4e46a0a5
--- /dev/null
+++ b/arch/arm64/boot/dts/freescale/fsl-ls1043a-rdb-usdpaa.dts
@@ -0,0 +1,117 @@
+ reg = <0x83000 0x1000>;
+ };
+};
-diff --git a/arch/arm64/boot/dts/freescale/fsl-ls1043a-rdb.dts b/arch/arm64/boot/dts/freescale/fsl-ls1043a-rdb.dts
-index d2313e05..f92ae325 100644
--- a/arch/arm64/boot/dts/freescale/fsl-ls1043a-rdb.dts
+++ b/arch/arm64/boot/dts/freescale/fsl-ls1043a-rdb.dts
@@ -1,7 +1,7 @@
+ };
+ };
+};
-diff --git a/arch/arm64/boot/dts/freescale/fsl-ls1043a.dtsi b/arch/arm64/boot/dts/freescale/fsl-ls1043a.dtsi
-index 97d331ec..8b27faaf 100644
--- a/arch/arm64/boot/dts/freescale/fsl-ls1043a.dtsi
+++ b/arch/arm64/boot/dts/freescale/fsl-ls1043a.dtsi
@@ -1,7 +1,7 @@
};
+ ftm0: ftm0@29d0000 {
-+ compatible = "fsl,ftm-alarm";
++ compatible = "fsl,ls1043a-ftm";
+ reg = <0x0 0x29d0000 0x0 0x10000>,
+ <0x0 0x1ee2140 0x0 0x4>;
+ reg-names = "ftm", "FlexTimer1";
#interrupt-cells = <1>;
interrupt-map-mask = <0 0 0 7>;
interrupt-map = <0000 0 0 1 &gic 0 154 0x4>,
-@@ -608,3 +869,6 @@
+@@ -607,4 +868,13 @@
+ };
};
++ firmware {
++ optee {
++ compatible = "linaro,optee-tz";
++ method = "smc";
++ };
++ };
};
+
+#include "qoriq-qman1-portals.dtsi"
+#include "qoriq-bman1-portals.dtsi"
-diff --git a/arch/arm64/boot/dts/freescale/fsl-ls1046-post.dtsi b/arch/arm64/boot/dts/freescale/fsl-ls1046-post.dtsi
-new file mode 100644
-index 00000000..f5017dba
--- /dev/null
+++ b/arch/arm64/boot/dts/freescale/fsl-ls1046-post.dtsi
@@ -0,0 +1,48 @@
+ enet7: ethernet@f2000 {
+ };
+};
-diff --git a/arch/arm64/boot/dts/freescale/fsl-ls1046a-qds-sdk.dts b/arch/arm64/boot/dts/freescale/fsl-ls1046a-qds-sdk.dts
-new file mode 100644
-index 00000000..c375af47
--- /dev/null
+++ b/arch/arm64/boot/dts/freescale/fsl-ls1046a-qds-sdk.dts
-@@ -0,0 +1,109 @@
+@@ -0,0 +1,110 @@
+/*
+ * Device Tree Include file for Freescale Layerscape-1046A family SoC.
+ *
+ ethernet@9 {
+ compatible = "fsl,dpa-ethernet";
+ fsl,fman-mac = <&enet7>;
++ dma-coherent;
+ };
+};
+
+ spi-max-frequency = <10000000>;
+ };
+};
-diff --git a/arch/arm64/boot/dts/freescale/fsl-ls1046a-qds.dts b/arch/arm64/boot/dts/freescale/fsl-ls1046a-qds.dts
-new file mode 100644
-index 00000000..3b8e9b7e
--- /dev/null
+++ b/arch/arm64/boot/dts/freescale/fsl-ls1046a-qds.dts
@@ -0,0 +1,363 @@
+ };
+ };
+};
-diff --git a/arch/arm64/boot/dts/freescale/fsl-ls1046a-rdb-sdk.dts b/arch/arm64/boot/dts/freescale/fsl-ls1046a-rdb-sdk.dts
-new file mode 100644
-index 00000000..bfe2f36c
--- /dev/null
+++ b/arch/arm64/boot/dts/freescale/fsl-ls1046a-rdb-sdk.dts
-@@ -0,0 +1,76 @@
+@@ -0,0 +1,83 @@
+/*
+ * Device Tree Include file for Freescale Layerscape-1046A family SoC.
+ *
+};
+
+&fsldpaa {
++ ethernet@0 {
++ status = "disabled";
++ };
++ ethernet@1 {
++ status = "disabled";
++ };
+ ethernet@9 {
+ compatible = "fsl,dpa-ethernet";
+ fsl,fman-mac = <&enet7>;
++ dma-coherent;
+ };
+};
+
+&fman0 {
+ compatible = "fsl,fman", "simple-bus";
+};
-diff --git a/arch/arm64/boot/dts/freescale/fsl-ls1046a-rdb-usdpaa.dts b/arch/arm64/boot/dts/freescale/fsl-ls1046a-rdb-usdpaa.dts
-new file mode 100644
-index 00000000..54336aa6
--- /dev/null
+++ b/arch/arm64/boot/dts/freescale/fsl-ls1046a-rdb-usdpaa.dts
@@ -0,0 +1,110 @@
+ reg = <0x83000 0x1000>;
+ };
+};
-diff --git a/arch/arm64/boot/dts/freescale/fsl-ls1046a-rdb.dts b/arch/arm64/boot/dts/freescale/fsl-ls1046a-rdb.dts
-new file mode 100644
-index 00000000..be9b62ca
--- /dev/null
+++ b/arch/arm64/boot/dts/freescale/fsl-ls1046a-rdb.dts
@@ -0,0 +1,218 @@
+ };
+ };
+};
-diff --git a/arch/arm64/boot/dts/freescale/fsl-ls1046a.dtsi b/arch/arm64/boot/dts/freescale/fsl-ls1046a.dtsi
-new file mode 100644
-index 00000000..6b87266f
--- /dev/null
+++ b/arch/arm64/boot/dts/freescale/fsl-ls1046a.dtsi
-@@ -0,0 +1,793 @@
+@@ -0,0 +1,800 @@
+/*
+ * Device Tree Include file for Freescale Layerscape-1046A family SoC.
+ *
+ };
+
+ ftm0: ftm0@29d0000 {
-+ compatible = "fsl,ftm-alarm";
++ compatible = "fsl,ls1046a-ftm";
+ reg = <0x0 0x29d0000 0x0 0x10000>,
+ <0x0 0x1ee2140 0x0 0x4>;
+ reg-names = "ftm", "FlexTimer1";
+ no-map;
+ };
+ };
++
++ firmware {
++ optee {
++ compatible = "linaro,optee-tz";
++ method = "smc";
++ };
++ };
+};
+
+#include "qoriq-qman1-portals.dtsi"
+#include "qoriq-bman1-portals.dtsi"
-diff --git a/arch/arm64/boot/dts/freescale/fsl-ls1088a-qds.dts b/arch/arm64/boot/dts/freescale/fsl-ls1088a-qds.dts
-new file mode 100644
-index 00000000..f61ec261
--- /dev/null
+++ b/arch/arm64/boot/dts/freescale/fsl-ls1088a-qds.dts
@@ -0,0 +1,173 @@
+&sata {
+ status = "okay";
+};
-diff --git a/arch/arm64/boot/dts/freescale/fsl-ls1088a-rdb.dts b/arch/arm64/boot/dts/freescale/fsl-ls1088a-rdb.dts
-new file mode 100644
-index 00000000..a4cbc2d5
--- /dev/null
+++ b/arch/arm64/boot/dts/freescale/fsl-ls1088a-rdb.dts
@@ -0,0 +1,236 @@
+&dpmac10 {
+ phy-handle = <&mdio1_phy4>;
+};
-diff --git a/arch/arm64/boot/dts/freescale/fsl-ls1088a.dtsi b/arch/arm64/boot/dts/freescale/fsl-ls1088a.dtsi
-new file mode 100644
-index 00000000..14585ab2
--- /dev/null
+++ b/arch/arm64/boot/dts/freescale/fsl-ls1088a.dtsi
-@@ -0,0 +1,816 @@
+@@ -0,0 +1,825 @@
+/*
+ * Device Tree Include file for NXP Layerscape-1088A family SoC.
+ *
+ };
+
+ ftm0: ftm0@2800000 {
-+ compatible = "fsl,ftm-alarm";
-+ reg = <0x0 0x2800000 0x0 0x10000>;
++ compatible = "fsl,ls1088a-ftm";
++ reg = <0x0 0x2800000 0x0 0x10000>,
++ <0x0 0x1e34050 0x0 0x4>;
+ interrupts = <0 44 4>;
++ reg-names = "ftm", "FlexTimer1";
+ };
+
+ i2c0: i2c@2000000 {
+ #size-cells = <0>;
+ reg = <0x0 0x2000000 0x0 0x10000>;
+ interrupts = <0 34 IRQ_TYPE_LEVEL_HIGH>;
-+ clocks = <&clockgen 4 3>;
++ clocks = <&clockgen 4 7>;
+ status = "disabled";
+ };
+
+ #size-cells = <0>;
+ reg = <0x0 0x2010000 0x0 0x10000>;
+ interrupts = <0 34 IRQ_TYPE_LEVEL_HIGH>;
-+ clocks = <&clockgen 4 3>;
++ clocks = <&clockgen 4 7>;
+ status = "disabled";
+ };
+
+ #size-cells = <0>;
+ reg = <0x0 0x2020000 0x0 0x10000>;
+ interrupts = <0 35 IRQ_TYPE_LEVEL_HIGH>;
-+ clocks = <&clockgen 4 3>;
++ clocks = <&clockgen 4 7>;
+ status = "disabled";
+ };
+
+ #size-cells = <0>;
+ reg = <0x0 0x2030000 0x0 0x10000>;
+ interrupts = <0 35 IRQ_TYPE_LEVEL_HIGH>;
-+ clocks = <&clockgen 4 3>;
++ clocks = <&clockgen 4 7>;
+ status = "disabled";
+ };
+
+ };
+ };
+
++ firmware {
++ optee {
++ compatible = "linaro,optee-tz";
++ method = "smc";
++ };
++ };
++
+};
-diff --git a/arch/arm64/boot/dts/freescale/fsl-ls2080a-qds.dts b/arch/arm64/boot/dts/freescale/fsl-ls2080a-qds.dts
-index b0dd0109..ba1a79dd 100644
--- a/arch/arm64/boot/dts/freescale/fsl-ls2080a-qds.dts
+++ b/arch/arm64/boot/dts/freescale/fsl-ls2080a-qds.dts
@@ -1,8 +1,10 @@
+&dpmac12 {
+ phy-handle = <&mdio0_phy15>;
};
-diff --git a/arch/arm64/boot/dts/freescale/fsl-ls2080a-rdb.dts b/arch/arm64/boot/dts/freescale/fsl-ls2080a-rdb.dts
-index ad0ebb8a..025f0f54 100644
--- a/arch/arm64/boot/dts/freescale/fsl-ls2080a-rdb.dts
+++ b/arch/arm64/boot/dts/freescale/fsl-ls2080a-rdb.dts
@@ -1,8 +1,10 @@
- reg = <0x0 0x0 0x8000000>;
- bank-width = <2>;
- device-width = <1>;
-+&emdio1 {
-+ status = "disabled";
-+ /* CS4340 PHYs */
-+ mdio1_phy1: emdio1_phy@1 {
-+ reg = <0x10>;
-+ phy-connection-type = "xfi";
- };
+- };
-
- nand@2,0 {
- compatible = "fsl,ifc-nand";
- reg = <0x2 0x0 0x10000>;
-+ mdio1_phy2: emdio1_phy@2 {
-+ reg = <0x11>;
-+ phy-connection-type = "xfi";
- };
+- };
-
- cpld@3,0 {
- reg = <0x3 0x0 0x10000>;
- compatible = "fsl,ls2080aqds-fpga", "fsl,fpga-qixis";
-+ mdio1_phy3: emdio1_phy@3 {
-+ reg = <0x12>;
-+ phy-connection-type = "xfi";
- };
+- };
-
-};
-
- reg = <0x4c>;
- };
- };
-+ mdio1_phy4: emdio1_phy@4 {
-+ reg = <0x13>;
-+ phy-connection-type = "xfi";
- };
- };
-
+- };
+-};
+-
-&i2c1 {
- status = "disabled";
-};
-};
-
-&i2c3 {
-- status = "disabled";
--};
--
++&emdio1 {
+ status = "disabled";
++ /* CS4340 PHYs */
++ mdio1_phy1: emdio1_phy@1 {
++ reg = <0x10>;
++ phy-connection-type = "xfi";
++ };
++ mdio1_phy2: emdio1_phy@2 {
++ reg = <0x11>;
++ phy-connection-type = "xfi";
++ };
++ mdio1_phy3: emdio1_phy@3 {
++ reg = <0x12>;
++ phy-connection-type = "xfi";
++ };
++ mdio1_phy4: emdio1_phy@4 {
++ reg = <0x13>;
++ phy-connection-type = "xfi";
++ };
+ };
+
-&dspi {
- status = "okay";
- dflash0: n25q512a {
+&dpmac8 {
+ phy-handle = <&mdio2_phy4>;
};
-diff --git a/arch/arm64/boot/dts/freescale/fsl-ls2080a-simu.dts b/arch/arm64/boot/dts/freescale/fsl-ls2080a-simu.dts
-index 505d0380..fbbb73e5 100644
--- a/arch/arm64/boot/dts/freescale/fsl-ls2080a-simu.dts
+++ b/arch/arm64/boot/dts/freescale/fsl-ls2080a-simu.dts
@@ -1,7 +1,7 @@
ethernet@2210000 {
compatible = "smsc,lan91c111";
reg = <0x0 0x2210000 0x0 0x100>;
-diff --git a/arch/arm64/boot/dts/freescale/fsl-ls2080a.dtsi b/arch/arm64/boot/dts/freescale/fsl-ls2080a.dtsi
-index 7f0dc13b..71f15fab 100644
--- a/arch/arm64/boot/dts/freescale/fsl-ls2080a.dtsi
+++ b/arch/arm64/boot/dts/freescale/fsl-ls2080a.dtsi
@@ -1,8 +1,9 @@
- interrupt-parent = <&gic>;
- #address-cells = <2>;
- #size-cells = <2>;
-+#include "fsl-ls208xa.dtsi"
-
+-
- cpus {
- #address-cells = <1>;
- #size-cells = <0>;
- cluster3_l2: l2-cache3 {
- compatible = "cache";
- };
-+&cpu {
-+ cpu0: cpu@0 {
-+ device_type = "cpu";
-+ compatible = "arm,cortex-a57";
-+ reg = <0x0>;
-+ clocks = <&clockgen 1 0>;
-+ next-level-cache = <&cluster0_l2>;
-+ #cooling-cells = <2>;
- };
-
+- };
+-
- memory@80000000 {
- device_type = "memory";
- reg = <0x00000000 0x80000000 0 0x80000000>;
- /* DRAM space - 1, size : 2 GB DRAM */
-+ cpu1: cpu@1 {
-+ device_type = "cpu";
-+ compatible = "arm,cortex-a57";
-+ reg = <0x1>;
-+ clocks = <&clockgen 1 0>;
-+ next-level-cache = <&cluster0_l2>;
- };
-
+- };
+-
- sysclk: sysclk {
- compatible = "fixed-clock";
- #clock-cells = <0>;
- clock-frequency = <100000000>;
- clock-output-names = "sysclk";
-+ cpu2: cpu@100 {
-+ device_type = "cpu";
-+ compatible = "arm,cortex-a57";
-+ reg = <0x100>;
-+ clocks = <&clockgen 1 1>;
-+ next-level-cache = <&cluster1_l2>;
-+ #cooling-cells = <2>;
- };
-
+- };
+-
- gic: interrupt-controller@6000000 {
- compatible = "arm,gic-v3";
- reg = <0x0 0x06000000 0 0x10000>, /* GIC Dist */
- interrupts = <1 9 0x4>;
-
- its: gic-its@6020000 {
-- compatible = "arm,gic-v3-its";
-- msi-controller;
-- reg = <0x0 0x6020000 0 0x20000>;
-- };
-+ cpu3: cpu@101 {
-+ device_type = "cpu";
-+ compatible = "arm,cortex-a57";
-+ reg = <0x101>;
-+ clocks = <&clockgen 1 1>;
-+ next-level-cache = <&cluster1_l2>;
- };
-
+- compatible = "arm,gic-v3-its";
+- msi-controller;
+- reg = <0x0 0x6020000 0 0x20000>;
+- };
+- };
+-
- rstcr: syscon@1e60000 {
- compatible = "fsl,ls2080a-rstcr", "syscon";
- reg = <0x0 0x1e60000 0x0 0x4>;
-+ cpu4: cpu@200 {
-+ device_type = "cpu";
-+ compatible = "arm,cortex-a57";
-+ reg = <0x200>;
-+ clocks = <&clockgen 1 2>;
-+ next-level-cache = <&cluster2_l2>;
-+ #cooling-cells = <2>;
- };
-
+- };
+-
- reboot {
- compatible ="syscon-reboot";
- regmap = <&rstcr>;
- offset = <0x0>;
- mask = <0x2>;
-+ cpu5: cpu@201 {
-+ device_type = "cpu";
-+ compatible = "arm,cortex-a57";
-+ reg = <0x201>;
-+ clocks = <&clockgen 1 2>;
-+ next-level-cache = <&cluster2_l2>;
- };
-
+- };
+-
- timer {
- compatible = "arm,armv8-timer";
- interrupts = <1 13 4>, /* Physical Secure PPI, active-low */
- <1 11 4>, /* Virtual PPI, active-low */
- <1 10 4>; /* Hypervisor PPI, active-low */
- fsl,erratum-a008585;
-+ cpu6: cpu@300 {
-+ device_type = "cpu";
-+ compatible = "arm,cortex-a57";
-+ reg = <0x300>;
-+ clocks = <&clockgen 1 3>;
-+ next-level-cache = <&cluster3_l2>;
-+ #cooling-cells = <2>;
- };
-
+- };
+-
- pmu {
- compatible = "arm,armv8-pmuv3";
- interrupts = <1 7 0x8>; /* PMU PPI, Level low type */
-+ cpu7: cpu@301 {
-+ device_type = "cpu";
-+ compatible = "arm,cortex-a57";
-+ reg = <0x301>;
-+ clocks = <&clockgen 1 3>;
-+ next-level-cache = <&cluster3_l2>;
- };
-
+- };
+-
- soc {
- compatible = "simple-bus";
- #address-cells = <2>;
- little-endian;
- #address-cells = <2>;
- #size-cells = <1>;
-+ cluster0_l2: l2-cache0 {
-+ compatible = "cache";
-+ };
-
+-
- ranges = <0 0 0x5 0x80000000 0x08000000
- 2 0 0x5 0x30000000 0x00010000
- 3 0 0x5 0x20000000 0x00010000>;
- };
-+ cluster1_l2: l2-cache1 {
-+ compatible = "cache";
-+ };
-
+-
- qspi: quadspi@20c0000 {
- status = "disabled";
- compatible = "fsl,ls2080a-qspi", "fsl,ls1021a-qspi";
- clocks = <&clockgen 4 3>, <&clockgen 4 3>;
- clock-names = "qspi_en", "qspi";
- };
-+ cluster2_l2: l2-cache2 {
-+ compatible = "cache";
-+ };
-
+-
- pcie@3400000 {
- compatible = "fsl,ls2080a-pcie", "fsl,ls2085a-pcie",
- "snps,dw-pcie";
- <0000 0 0 3 &gic 0 0 0 111 4>,
- <0000 0 0 4 &gic 0 0 0 112 4>;
- };
-+ cluster3_l2: l2-cache3 {
-+ compatible = "cache";
-+ };
-+};
-
+-
- pcie@3500000 {
- compatible = "fsl,ls2080a-pcie", "fsl,ls2085a-pcie",
- "snps,dw-pcie";
- <0000 0 0 3 &gic 0 0 0 116 4>,
- <0000 0 0 4 &gic 0 0 0 117 4>;
- };
-+&usb0 {
-+ snps,incr-burst-type-adjustment = <1>, <4>, <8>, <16>;
-+ snps,dma-snooping;
-+};
-
+-
- pcie@3600000 {
- compatible = "fsl,ls2080a-pcie", "fsl,ls2085a-pcie",
- "snps,dw-pcie";
- <0000 0 0 3 &gic 0 0 0 121 4>,
- <0000 0 0 4 &gic 0 0 0 122 4>;
- };
-+&usb1 {
-+ snps,incr-burst-type-adjustment = <1>, <4>, <8>, <16>;
-+ snps,dma-snooping;
-+};
-
+-
- pcie@3700000 {
- compatible = "fsl,ls2080a-pcie", "fsl,ls2085a-pcie",
- "snps,dw-pcie";
- <0000 0 0 3 &gic 0 0 0 126 4>,
- <0000 0 0 4 &gic 0 0 0 127 4>;
- };
-+&pcie1 {
-+ reg = <0x00 0x03400000 0x0 0x00100000 /* controller registers */
-+ 0x10 0x00000000 0x0 0x00002000>; /* configuration space */
-
+-
- sata0: sata@3200000 {
- status = "disabled";
- compatible = "fsl,ls2080a-ahci";
- clocks = <&clockgen 4 3>;
- dma-coherent;
- };
-+ ranges = <0x81000000 0x0 0x00000000 0x10 0x00010000 0x0 0x00010000 /* downstream I/O */
-+ 0x82000000 0x0 0x40000000 0x10 0x40000000 0x0 0x40000000>; /* non-prefetchable memory */
-+};
-
+-
- sata1: sata@3210000 {
- status = "disabled";
- compatible = "fsl,ls2080a-ahci";
- clocks = <&clockgen 4 3>;
- dma-coherent;
- };
-+&pcie2 {
-+ reg = <0x00 0x03500000 0x0 0x00100000 /* controller registers */
-+ 0x12 0x00000000 0x0 0x00002000>; /* configuration space */
-
+-
- usb0: usb3@3100000 {
- status = "disabled";
- compatible = "snps,dwc3";
- snps,quirk-frame-length-adjustment = <0x20>;
- snps,dis_rxdet_inp3_quirk;
- };
-+ ranges = <0x81000000 0x0 0x00000000 0x12 0x00010000 0x0 0x00010000 /* downstream I/O */
-+ 0x82000000 0x0 0x40000000 0x12 0x40000000 0x0 0x40000000>; /* non-prefetchable memory */
-+};
-
+-
- usb1: usb3@3110000 {
- status = "disabled";
- compatible = "snps,dwc3";
- snps,quirk-frame-length-adjustment = <0x20>;
- snps,dis_rxdet_inp3_quirk;
- };
-+&pcie3 {
-+ reg = <0x00 0x03600000 0x0 0x00100000 /* controller registers */
-+ 0x14 0x00000000 0x0 0x00002000>; /* configuration space */
-
+-
- ccn@4000000 {
- compatible = "arm,ccn-504";
- reg = <0x0 0x04000000 0x0 0x01000000>;
- interrupts = <0 12 4>;
- };
- };
-+ ranges = <0x81000000 0x0 0x00000000 0x14 0x00010000 0x0 0x00010000 /* downstream I/O */
-+ 0x82000000 0x0 0x40000000 0x14 0x40000000 0x0 0x40000000>; /* non-prefetchable memory */
-+};
-
+-
- ddr1: memory-controller@1080000 {
- compatible = "fsl,qoriq-memory-controller";
- reg = <0x0 0x1080000 0x0 0x1000>;
- interrupts = <0 17 0x4>;
- little-endian;
- };
-+&pcie4 {
-+ reg = <0x00 0x03700000 0x0 0x00100000 /* controller registers */
-+ 0x16 0x00000000 0x0 0x00002000>; /* configuration space */
-
+-
- ddr2: memory-controller@1090000 {
- compatible = "fsl,qoriq-memory-controller";
- reg = <0x0 0x1090000 0x0 0x1000>;
- interrupts = <0 18 0x4>;
- little-endian;
-- };
++#include "fsl-ls208xa.dtsi"
++
++&cpu {
++ cpu0: cpu@0 {
++ device_type = "cpu";
++ compatible = "arm,cortex-a57";
++ reg = <0x0>;
++ clocks = <&clockgen 1 0>;
++ next-level-cache = <&cluster0_l2>;
++ #cooling-cells = <2>;
++ };
++
++ cpu1: cpu@1 {
++ device_type = "cpu";
++ compatible = "arm,cortex-a57";
++ reg = <0x1>;
++ clocks = <&clockgen 1 0>;
++ next-level-cache = <&cluster0_l2>;
++ };
++
++ cpu2: cpu@100 {
++ device_type = "cpu";
++ compatible = "arm,cortex-a57";
++ reg = <0x100>;
++ clocks = <&clockgen 1 1>;
++ next-level-cache = <&cluster1_l2>;
++ #cooling-cells = <2>;
++ };
++
++ cpu3: cpu@101 {
++ device_type = "cpu";
++ compatible = "arm,cortex-a57";
++ reg = <0x101>;
++ clocks = <&clockgen 1 1>;
++ next-level-cache = <&cluster1_l2>;
++ };
++
++ cpu4: cpu@200 {
++ device_type = "cpu";
++ compatible = "arm,cortex-a57";
++ reg = <0x200>;
++ clocks = <&clockgen 1 2>;
++ next-level-cache = <&cluster2_l2>;
++ #cooling-cells = <2>;
++ };
++
++ cpu5: cpu@201 {
++ device_type = "cpu";
++ compatible = "arm,cortex-a57";
++ reg = <0x201>;
++ clocks = <&clockgen 1 2>;
++ next-level-cache = <&cluster2_l2>;
++ };
++
++ cpu6: cpu@300 {
++ device_type = "cpu";
++ compatible = "arm,cortex-a57";
++ reg = <0x300>;
++ clocks = <&clockgen 1 3>;
++ next-level-cache = <&cluster3_l2>;
++ #cooling-cells = <2>;
++ };
++
++ cpu7: cpu@301 {
++ device_type = "cpu";
++ compatible = "arm,cortex-a57";
++ reg = <0x301>;
++ clocks = <&clockgen 1 3>;
++ next-level-cache = <&cluster3_l2>;
+ };
++
++ cluster0_l2: l2-cache0 {
++ compatible = "cache";
++ };
++
++ cluster1_l2: l2-cache1 {
++ compatible = "cache";
++ };
++
++ cluster2_l2: l2-cache2 {
++ compatible = "cache";
++ };
++
++ cluster3_l2: l2-cache3 {
++ compatible = "cache";
++ };
++};
++
++&usb0 {
++ snps,incr-burst-type-adjustment = <1>, <4>, <8>, <16>;
++ snps,dma-snooping;
++};
++
++&usb1 {
++ snps,incr-burst-type-adjustment = <1>, <4>, <8>, <16>;
++ snps,dma-snooping;
++};
++
++&pcie1 {
++ reg = <0x00 0x03400000 0x0 0x00100000 /* controller registers */
++ 0x10 0x00000000 0x0 0x00002000>; /* configuration space */
++
++ ranges = <0x81000000 0x0 0x00000000 0x10 0x00010000 0x0 0x00010000 /* downstream I/O */
++ 0x82000000 0x0 0x40000000 0x10 0x40000000 0x0 0x40000000>; /* non-prefetchable memory */
++};
++
++&pcie2 {
++ reg = <0x00 0x03500000 0x0 0x00100000 /* controller registers */
++ 0x12 0x00000000 0x0 0x00002000>; /* configuration space */
++
++ ranges = <0x81000000 0x0 0x00000000 0x12 0x00010000 0x0 0x00010000 /* downstream I/O */
++ 0x82000000 0x0 0x40000000 0x12 0x40000000 0x0 0x40000000>; /* non-prefetchable memory */
++};
++
++&pcie3 {
++ reg = <0x00 0x03600000 0x0 0x00100000 /* controller registers */
++ 0x14 0x00000000 0x0 0x00002000>; /* configuration space */
++
++ ranges = <0x81000000 0x0 0x00000000 0x14 0x00010000 0x0 0x00010000 /* downstream I/O */
++ 0x82000000 0x0 0x40000000 0x14 0x40000000 0x0 0x40000000>; /* non-prefetchable memory */
++};
++
++&pcie4 {
++ reg = <0x00 0x03700000 0x0 0x00100000 /* controller registers */
++ 0x16 0x00000000 0x0 0x00002000>; /* configuration space */
++
+ ranges = <0x81000000 0x0 0x00000000 0x16 0x00010000 0x0 0x00010000 /* downstream I/O */
+ 0x82000000 0x0 0x40000000 0x16 0x40000000 0x0 0x40000000>; /* non-prefetchable memory */
};
-diff --git a/arch/arm64/boot/dts/freescale/fsl-ls2081a-rdb.dts b/arch/arm64/boot/dts/freescale/fsl-ls2081a-rdb.dts
-new file mode 100644
-index 00000000..c3375bf7
--- /dev/null
+++ b/arch/arm64/boot/dts/freescale/fsl-ls2081a-rdb.dts
@@ -0,0 +1,161 @@
+&usb1 {
+ status = "okay";
+};
-diff --git a/arch/arm64/boot/dts/freescale/fsl-ls2088a-qds.dts b/arch/arm64/boot/dts/freescale/fsl-ls2088a-qds.dts
-new file mode 100644
-index 00000000..1dbc7aa8
--- /dev/null
+++ b/arch/arm64/boot/dts/freescale/fsl-ls2088a-qds.dts
@@ -0,0 +1,162 @@
+&dpmac12 {
+ phy-handle = <&mdio0_phy15>;
+};
-diff --git a/arch/arm64/boot/dts/freescale/fsl-ls2088a-rdb.dts b/arch/arm64/boot/dts/freescale/fsl-ls2088a-rdb.dts
-new file mode 100644
-index 00000000..9300119b
--- /dev/null
+++ b/arch/arm64/boot/dts/freescale/fsl-ls2088a-rdb.dts
@@ -0,0 +1,140 @@
+&dpmac8 {
+ phy-handle = <&mdio2_phy4>;
+};
-diff --git a/arch/arm64/boot/dts/freescale/fsl-ls2088a.dtsi b/arch/arm64/boot/dts/freescale/fsl-ls2088a.dtsi
-new file mode 100644
-index 00000000..833699ea
--- /dev/null
+++ b/arch/arm64/boot/dts/freescale/fsl-ls2088a.dtsi
@@ -0,0 +1,195 @@
+ ranges = <0x81000000 0x0 0x00000000 0x38 0x00010000 0x0 0x00010000
+ 0x82000000 0x0 0x40000000 0x38 0x40000000 0x0 0x40000000>;
+};
-diff --git a/arch/arm64/boot/dts/freescale/fsl-ls208xa-qds.dtsi b/arch/arm64/boot/dts/freescale/fsl-ls208xa-qds.dtsi
-new file mode 100644
-index 00000000..b2374469
--- /dev/null
+++ b/arch/arm64/boot/dts/freescale/fsl-ls208xa-qds.dtsi
@@ -0,0 +1,198 @@
+&usb1 {
+ status = "okay";
+};
-diff --git a/arch/arm64/boot/dts/freescale/fsl-ls208xa-rdb.dtsi b/arch/arm64/boot/dts/freescale/fsl-ls208xa-rdb.dtsi
-new file mode 100644
-index 00000000..8e919dc8
--- /dev/null
+++ b/arch/arm64/boot/dts/freescale/fsl-ls208xa-rdb.dtsi
@@ -0,0 +1,161 @@
+&usb1 {
+ status = "okay";
+};
-diff --git a/arch/arm64/boot/dts/freescale/fsl-ls208xa.dtsi b/arch/arm64/boot/dts/freescale/fsl-ls208xa.dtsi
-new file mode 100644
-index 00000000..f694cac0
--- /dev/null
+++ b/arch/arm64/boot/dts/freescale/fsl-ls208xa.dtsi
-@@ -0,0 +1,910 @@
+@@ -0,0 +1,919 @@
+/*
+ * Device Tree Include file for Freescale Layerscape-2080A family SoC.
+ *
+ reg = <0x0 0x2000000 0x0 0x10000>;
+ interrupts = <0 34 0x4>; /* Level high type */
+ clock-names = "i2c";
-+ clocks = <&clockgen 4 3>;
++ clocks = <&clockgen 4 1>;
+ };
+
+ i2c1: i2c@2010000 {
+ reg = <0x0 0x2010000 0x0 0x10000>;
+ interrupts = <0 34 0x4>; /* Level high type */
+ clock-names = "i2c";
-+ clocks = <&clockgen 4 3>;
++ clocks = <&clockgen 4 1>;
+ };
+
+ i2c2: i2c@2020000 {
+ reg = <0x0 0x2020000 0x0 0x10000>;
+ interrupts = <0 35 0x4>; /* Level high type */
+ clock-names = "i2c";
-+ clocks = <&clockgen 4 3>;
++ clocks = <&clockgen 4 1>;
+ };
+
+ i2c3: i2c@2030000 {
+ reg = <0x0 0x2030000 0x0 0x10000>;
+ interrupts = <0 35 0x4>; /* Level high type */
+ clock-names = "i2c";
-+ clocks = <&clockgen 4 3>;
++ clocks = <&clockgen 4 1>;
+ };
+
+ ifc: ifc@2240000 {
+ };
+
+ ftm0: ftm0@2800000 {
-+ compatible = "fsl,ftm-alarm";
-+ reg = <0x0 0x2800000 0x0 0x10000>;
++ compatible = "fsl,ls208xa-ftm";
++ reg = <0x0 0x2800000 0x0 0x10000>,
++ <0x0 0x1e34050 0x0 0x4>;
+ interrupts = <0 44 4>;
++ reg-names = "ftm", "FlexTimer1";
+ };
+ };
+
+ interrupts = <0 18 0x4>;
+ little-endian;
+ };
++
++ firmware {
++ optee {
++ compatible = "linaro,optee-tz";
++ method = "smc";
++ };
++ };
+};
-diff --git a/arch/arm64/boot/dts/freescale/qoriq-bman1-portals.dtsi b/arch/arm64/boot/dts/freescale/qoriq-bman1-portals.dtsi
-new file mode 100644
-index 00000000..14680adb
--- /dev/null
+++ b/arch/arm64/boot/dts/freescale/qoriq-bman1-portals.dtsi
@@ -0,0 +1,81 @@
+ fsl,bpid-range = <32 32>;
+ };
+};
-diff --git a/arch/arm64/boot/dts/freescale/qoriq-dpaa-eth.dtsi b/arch/arm64/boot/dts/freescale/qoriq-dpaa-eth.dtsi
-new file mode 100644
-index 00000000..eb5af912
--- /dev/null
+++ b/arch/arm64/boot/dts/freescale/qoriq-dpaa-eth.dtsi
-@@ -0,0 +1,66 @@
+@@ -0,0 +1,73 @@
+/*
+ * QorIQ FMan v3 10g port #1 device tree stub [ controller @ offset 0x400000 ]
+ *
+ ethernet@0 {
+ compatible = "fsl,dpa-ethernet";
+ fsl,fman-mac = <&enet0>;
++ dma-coherent;
+ };
+ ethernet@1 {
+ compatible = "fsl,dpa-ethernet";
+ fsl,fman-mac = <&enet1>;
++ dma-coherent;
+ };
+ ethernet@2 {
+ compatible = "fsl,dpa-ethernet";
+ fsl,fman-mac = <&enet2>;
++ dma-coherent;
+ };
+ ethernet@3 {
+ compatible = "fsl,dpa-ethernet";
+ fsl,fman-mac = <&enet3>;
++ dma-coherent;
+ };
+ ethernet@4 {
+ compatible = "fsl,dpa-ethernet";
+ fsl,fman-mac = <&enet4>;
++ dma-coherent;
+ };
+ ethernet@5 {
+ compatible = "fsl,dpa-ethernet";
+ fsl,fman-mac = <&enet5>;
++ dma-coherent;
+ };
+ ethernet@8 {
+ compatible = "fsl,dpa-ethernet";
+ fsl,fman-mac = <&enet6>;
++ dma-coherent;
+ };
+};
+
-diff --git a/arch/arm64/boot/dts/freescale/qoriq-fman3-0-10g-0.dtsi b/arch/arm64/boot/dts/freescale/qoriq-fman3-0-10g-0.dtsi
-new file mode 100644
-index 00000000..474bff5e
--- /dev/null
+++ b/arch/arm64/boot/dts/freescale/qoriq-fman3-0-10g-0.dtsi
@@ -0,0 +1,43 @@
+ };
+ };
+};
-diff --git a/arch/arm64/boot/dts/freescale/qoriq-fman3-0-10g-1.dtsi b/arch/arm64/boot/dts/freescale/qoriq-fman3-0-10g-1.dtsi
-new file mode 100644
-index 00000000..d4326f85
--- /dev/null
+++ b/arch/arm64/boot/dts/freescale/qoriq-fman3-0-10g-1.dtsi
@@ -0,0 +1,43 @@
+ };
+ };
+};
-diff --git a/arch/arm64/boot/dts/freescale/qoriq-fman3-0-1g-0.dtsi b/arch/arm64/boot/dts/freescale/qoriq-fman3-0-1g-0.dtsi
-new file mode 100644
-index 00000000..7170cab9
--- /dev/null
+++ b/arch/arm64/boot/dts/freescale/qoriq-fman3-0-1g-0.dtsi
@@ -0,0 +1,42 @@
+ };
+ };
+};
-diff --git a/arch/arm64/boot/dts/freescale/qoriq-fman3-0-1g-1.dtsi b/arch/arm64/boot/dts/freescale/qoriq-fman3-0-1g-1.dtsi
-new file mode 100644
-index 00000000..c7eb8b6e
--- /dev/null
+++ b/arch/arm64/boot/dts/freescale/qoriq-fman3-0-1g-1.dtsi
@@ -0,0 +1,42 @@
+ };
+ };
+};
-diff --git a/arch/arm64/boot/dts/freescale/qoriq-fman3-0-1g-2.dtsi b/arch/arm64/boot/dts/freescale/qoriq-fman3-0-1g-2.dtsi
-new file mode 100644
-index 00000000..56f9f0dd
--- /dev/null
+++ b/arch/arm64/boot/dts/freescale/qoriq-fman3-0-1g-2.dtsi
@@ -0,0 +1,42 @@
+ };
+ };
+};
-diff --git a/arch/arm64/boot/dts/freescale/qoriq-fman3-0-1g-3.dtsi b/arch/arm64/boot/dts/freescale/qoriq-fman3-0-1g-3.dtsi
-new file mode 100644
-index 00000000..bbe7dbaf
--- /dev/null
+++ b/arch/arm64/boot/dts/freescale/qoriq-fman3-0-1g-3.dtsi
@@ -0,0 +1,42 @@
+ };
+ };
+};
-diff --git a/arch/arm64/boot/dts/freescale/qoriq-fman3-0-1g-4.dtsi b/arch/arm64/boot/dts/freescale/qoriq-fman3-0-1g-4.dtsi
-new file mode 100644
-index 00000000..ead4f062
--- /dev/null
+++ b/arch/arm64/boot/dts/freescale/qoriq-fman3-0-1g-4.dtsi
@@ -0,0 +1,42 @@
+ };
+ };
+};
-diff --git a/arch/arm64/boot/dts/freescale/qoriq-fman3-0-1g-5.dtsi b/arch/arm64/boot/dts/freescale/qoriq-fman3-0-1g-5.dtsi
-new file mode 100644
-index 00000000..389eadaf
--- /dev/null
+++ b/arch/arm64/boot/dts/freescale/qoriq-fman3-0-1g-5.dtsi
@@ -0,0 +1,42 @@
+ };
+ };
+};
-diff --git a/arch/arm64/boot/dts/freescale/qoriq-fman3-0-6oh.dtsi b/arch/arm64/boot/dts/freescale/qoriq-fman3-0-6oh.dtsi
-new file mode 100644
-index 00000000..2d0df20d
--- /dev/null
+++ b/arch/arm64/boot/dts/freescale/qoriq-fman3-0-6oh.dtsi
@@ -0,0 +1,47 @@
+ };
+
+};
-diff --git a/arch/arm64/boot/dts/freescale/qoriq-fman3-0.dtsi b/arch/arm64/boot/dts/freescale/qoriq-fman3-0.dtsi
-new file mode 100644
-index 00000000..8e089f0c
--- /dev/null
+++ b/arch/arm64/boot/dts/freescale/qoriq-fman3-0.dtsi
@@ -0,0 +1,130 @@
+ reg = <0xfe000 0x1000>;
+ };
+};
-diff --git a/arch/arm64/boot/dts/freescale/qoriq-qman1-portals.dtsi b/arch/arm64/boot/dts/freescale/qoriq-qman1-portals.dtsi
-new file mode 100644
-index 00000000..4f7edf48
--- /dev/null
+++ b/arch/arm64/boot/dts/freescale/qoriq-qman1-portals.dtsi
@@ -0,0 +1,104 @@
+ fsl,ceetm-channel-range = <0 32>;
+ };
+};
-diff --git a/arch/powerpc/boot/dts/fsl/qoriq-bman1-portals.dtsi b/arch/powerpc/boot/dts/fsl/qoriq-bman1-portals.dtsi
-index 5022432e..65701ada 100644
--- a/arch/powerpc/boot/dts/fsl/qoriq-bman1-portals.dtsi
+++ b/arch/powerpc/boot/dts/fsl/qoriq-bman1-portals.dtsi
@@ -38,51 +38,61 @@
compatible = "fsl,bman-portal";
reg = <0x24000 0x4000>, <0x109000 0x1000>;
interrupts = <123 2 0 0>;
-diff --git a/arch/powerpc/boot/dts/fsl/qoriq-fman3-0-10g-0.dtsi b/arch/powerpc/boot/dts/fsl/qoriq-fman3-0-10g-0.dtsi
-index c288f3c6..dd200e28 100644
--- a/arch/powerpc/boot/dts/fsl/qoriq-fman3-0-10g-0.dtsi
+++ b/arch/powerpc/boot/dts/fsl/qoriq-fman3-0-10g-0.dtsi
@@ -35,14 +35,14 @@
reg = <0xb0000 0x1000>;
fsl,fman-10g-port;
};
-diff --git a/arch/powerpc/boot/dts/fsl/qoriq-fman3-0-10g-1.dtsi b/arch/powerpc/boot/dts/fsl/qoriq-fman3-0-10g-1.dtsi
-index 94a76982..365770c9 100644
--- a/arch/powerpc/boot/dts/fsl/qoriq-fman3-0-10g-1.dtsi
+++ b/arch/powerpc/boot/dts/fsl/qoriq-fman3-0-10g-1.dtsi
@@ -35,14 +35,14 @@
reg = <0xb1000 0x1000>;
fsl,fman-10g-port;
};
---
-2.14.1
-
projects / openwrt / openwrt.git / blobdiff