* fundamental reset. As required by PCI Express spec a delay for at
* least 100ms after such a reset before link training is needed.
*/
-@@ -1094,6 +1119,22 @@ static int advk_pcie_probe(struct platfo
+@@ -1093,6 +1118,22 @@ static int advk_pcie_probe(struct platfo
return ret;
}