/dts-v1/;
-#include <dt-bindings/input/input.h>
-#include <dt-bindings/gpio/gpio.h>
#include "mt7620a.dtsi"
+#include <dt-bindings/input/input.h>
+#include <dt-bindings/gpio/gpio.h>
+
/ {
- compatible = "ralink,mt7620a-soc";
+ compatible = "tplink,c50", "ralink,mt7620a-soc";
model = "TP-Link Archer C50";
+ aliases {
+ led-boot = &led_power;
+ led-failsafe = &led_power;
+ led-running = &led_power;
+ led-upgrade = &led_power;
+ };
+
chosen {
bootargs = "console=ttyS0,115200";
};
- gpio-leds {
+ leds {
compatible = "gpio-leds";
lan {
gpios = <&gpio0 1 GPIO_ACTIVE_LOW>;
};
- power {
+ led_power: power {
label = "c50:green:power";
gpios = <&gpio0 7 GPIO_ACTIVE_LOW>;
default-state = "on";
usb {
label = "c50:green:usb";
gpios = <&gpio0 9 GPIO_ACTIVE_LOW>;
+ trigger-sources = <&ohci_port1>, <&ehci_port1>;
+ linux,default-trigger = "usbport";
};
wan {
};
};
- gpio-keys-polled {
+ keys {
compatible = "gpio-keys-polled";
- #address-cells = <1>;
- #size-cells = <0>;
poll-interval = <20>;
reset {
status = "okay";
m25p80@0 {
- #address-cells = <1>;
- #size-cells = <1>;
compatible = "jedec,spi-nor";
reg = <0>;
spi-max-frequency = <10000000>;
- partition@0 {
- label = "u-boot";
- reg = <0x0 0x20000>;
- read-only;
- };
-
- partition@20000 {
- label = "firmware";
- reg = <0x20000 0x7a0000>;
- };
-
- partition@7c0000 {
- label = "config";
- reg = <0x7c0000 0x10000>;
- read-only;
- };
-
- rom: partition@7d0000 {
- label = "rom";
- reg = <0x7d0000 0x10000>;
- read-only;
- };
-
- partition@7e0000 {
- label = "romfile";
- reg = <0x7e0000 0x10000>;
- read-only;
- };
-
- radio: partition@7f0000 {
- label = "radio";
- reg = <0x7f0000 0x10000>;
- read-only;
+ partitions {
+ compatible = "fixed-partitions";
+ #address-cells = <1>;
+ #size-cells = <1>;
+
+ partition@0 {
+ label = "u-boot";
+ reg = <0x0 0x20000>;
+ read-only;
+ };
+
+ partition@20000 {
+ compatible = "tplink,firmware";
+ label = "firmware";
+ reg = <0x20000 0x7a0000>;
+ };
+
+ partition@7c0000 {
+ label = "config";
+ reg = <0x7c0000 0x10000>;
+ read-only;
+ };
+
+ rom: partition@7d0000 {
+ label = "rom";
+ reg = <0x7d0000 0x10000>;
+ read-only;
+ };
+
+ partition@7e0000 {
+ label = "romfile";
+ reg = <0x7e0000 0x10000>;
+ read-only;
+ };
+
+ radio: partition@7f0000 {
+ label = "radio";
+ reg = <0x7f0000 0x10000>;
+ read-only;
+ };
};
};
};
ralink,group = "i2c", "uartf", "rgmii1", "rgmii2", "wled", "ephy", "spi refclk", "mdio", "wdt", "nd_sd";
ralink,function = "gpio";
};
-
- pa {
- ralink,group = "pa";
- ralink,function = "pa";
- };
};
};
&wmac {
ralink,mtd-eeprom = <&radio 0>;
+ mtd-mac-address = <&rom 0xf100>;
+ mtd-mac-address-increment = <(-2)>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&pa_pins>;
};
&pcie {
status = "okay";
+};
- pcie-bridge {
- mt76@0,0 {
- reg = <0x0000 0 0 0 0>;
- device_type = "pci";
- mediatek,mtd-eeprom = <&radio 32768>;
- ieee80211-freq-limit = <5000000 6000000>;
- mtd-mac-address = <&rom 0xf100>;
- mtd-mac-address-increment = <(-1)>;
- };
+&pcie0 {
+ mt76@0,0 {
+ reg = <0x0000 0 0 0 0>;
+ mediatek,mtd-eeprom = <&radio 32768>;
+ ieee80211-freq-limit = <5000000 6000000>;
+ mtd-mac-address = <&rom 0xf100>;
+ mtd-mac-address-increment = <(-1)>;
};
};