ramips: TP-Link Archer C5 v4: license and file formatting fixes

[openwrt/openwrt.git] / target / linux / ramips / dts / mt7620a_planex_cs-qr10.dts

diff --git a/target/linux/ramips/dts/mt7620a_planex_cs-qr10.dts b/target/linux/ramips/dts/mt7620a_planex_cs-qr10.dts
index dadd37acba612812d67293d1f638753282366d8d..db4b286c6b167b835de6039f0cb5b716ac038d0a 100644 (file)
--- a/target/linux/ramips/dts/mt7620a_planex_cs-qr10.dts
+++ b/target/linux/ramips/dts/mt7620a_planex_cs-qr10.dts
@@ -1,9 +1,8 @@
-/dts-v1/;
-
 #include "mt7620a.dtsi"
 
 #include <dt-bindings/gpio/gpio.h>
 #include <dt-bindings/input/input.h>
+#include <dt-bindings/leds/common.h>
 
 / {
        compatible = "planex,cs-qr10", "ralink,mt7620a-soc";
@@ -20,14 +19,14 @@
                compatible = "gpio-leds";
 
                led_power: power {
-                       label = "cs-qr10:red:power";
+                       function = LED_FUNCTION_POWER;
+                       color = <LED_COLOR_ID_RED>;
                        gpios = <&gpio1 4 GPIO_ACTIVE_LOW>;
                };
        };
 
        keys {
-               compatible = "gpio-keys-polled";
-               poll-interval = <20>;
+               compatible = "gpio-keys";
 
                s1 {
                        label = "reset";
@@ -43,22 +42,10 @@
        };
 };
 
-&gpio0 {
-       status = "okay";
-};
-
 &gpio1 {
        status = "okay";
 };
 
-&gpio2 {
-       status = "okay";
-};
-
-&gpio3 {
-       status = "okay";
-};
-
 &i2c {
        status = "okay";
 };
@@ -72,7 +59,7 @@
 &spi0 {
        status = "okay";
 
-       m25p80@0 {
+       flash@0 {
                compatible = "jedec,spi-nor";
                reg = <0>;
                spi-max-frequency = <10000000>;
@@ -94,10 +81,24 @@
                                read-only;
                        };
 
-                       factory: partition@40000 {
+                       partition@40000 {
                                label = "factory";
                                reg = <0x40000 0x10000>;
                                read-only;
+
+                               nvmem-layout {
+                                       compatible = "fixed-layout";
+                                       #address-cells = <1>;
+                                       #size-cells = <1>;
+
+                                       eeprom_factory_0: eeprom@0 {
+                                               reg = <0x0 0x200>;
+                                       };
+
+                                       macaddr_factory_4: macaddr@4 {
+                                               reg = <0x4 0x6>;
+                                       };
+                               };
                        };
 
                        partition@50000 {
@@ -117,28 +118,25 @@
        status = "okay";
 };
 
-&pinctrl {
-       state_default: pinctrl0 {
-               gpio {
-                       ralink,group = "spi refclk", "rgmii1";
-                       ralink,function = "gpio";
-               };
-               wdt {
-                       ralink,group = "wdt";
-                       ralink,function = "wdt refclk";
-               };
+&state_default {
+       gpio {
+               groups = "spi refclk", "rgmii1";
+               function = "gpio";
+       };
+       wdt {
+               groups = "wdt";
+               function = "wdt refclk";
        };
 };
 
 &ethernet {
        pinctrl-names = "default";
        pinctrl-0 = <&ephy_pins>;
-       mtd-mac-address = <&factory 0x4>;
-       mediatek,portmap = "llllw";
-};
 
-&gsw {
-       ralink,port4 = "ephy";
+       nvmem-cells = <&macaddr_factory_4>;
+       nvmem-cell-names = "mac-address";
+
+       mediatek,portmap = "llllw";
 };
 
 &sdhci {
@@ -154,5 +152,6 @@
 };
 
 &wmac {
-       ralink,mtd-eeprom = <&factory 0>;
+       nvmem-cells = <&eeprom_factory_0>;
+       nvmem-cell-names = "eeprom";
 };