ramips: cf-ew72-v2: Add support for COMFAST CF-EW72 V2

[openwrt/openwrt.git] / target / linux / ramips / dts / mt7620n_zbtlink_zbt-we2026.dts

diff --git a/target/linux/ramips/dts/mt7620n_zbtlink_zbt-we2026.dts b/target/linux/ramips/dts/mt7620n_zbtlink_zbt-we2026.dts
index cc3e82ab4b35f62de3a83e618fa27d37fe372e2f..7c92f45e7b0c66143d049faa581e5250e8e8634f 100644 (file)
--- a/target/linux/ramips/dts/mt7620n_zbtlink_zbt-we2026.dts
+++ b/target/linux/ramips/dts/mt7620n_zbtlink_zbt-we2026.dts
@@ -1,10 +1,8 @@
-/dts-v1/;
+#include "mt7620n.dtsi"
 
 #include <dt-bindings/gpio/gpio.h>
 #include <dt-bindings/input/input.h>
 
-#include "mt7620n.dtsi"
-
 / {
        compatible = "zbtlink,zbt-we2026", "ralink,mt7620n-soc";
        model = "Zbtlink ZBT-WE2026";
@@ -24,12 +22,12 @@
                compatible = "gpio-leds";
 
                led_power: power {
-                       label = "zbt-we2026:red:power";
+                       label = "red:power";
                        gpios = <&gpio1 14 GPIO_ACTIVE_LOW>;
                };
 
                wlan {
-                       label = "zbt-we2026:green:wlan";
+                       label = "green:wlan";
                        gpios = <&gpio3 0 GPIO_ACTIVE_LOW>;
                };
        };
@@ -56,7 +54,7 @@
 &spi0 {
        status = "okay";
 
-       en25q64@0 {
+       flash@0 {
                compatible = "jedec,spi-nor";
                reg = <0>;
                spi-max-frequency = <10000000>;
@@ -94,12 +92,14 @@
 };
 
 &ethernet {
-       mtd-mac-address = <&factory 0x4>;
-       mediatek,portmap = "wllll";
+       nvmem-cells = <&macaddr_factory_4>;
+       nvmem-cell-names = "mac-address";
+
+       mediatek,portmap = "llllw";
 };
 
 &wmac {
-       ralink,mtd-eeprom = <&factory 0>;
+       ralink,mtd-eeprom = <&factory 0x0>;
 };
 
 &state_default {
@@ -108,3 +108,13 @@
                function = "gpio";
        };
 };
+
+&factory {
+       compatible = "nvmem-cells";
+       #address-cells = <1>;
+       #size-cells = <1>;
+
+       macaddr_factory_4: macaddr@4 {
+               reg = <0x4 0x6>;
+       };
+};