ramips: fix whitespace and comment issues in dts

[openwrt/openwrt.git] / target / linux / ramips / dts / mt7621.dtsi

diff --git a/target/linux/ramips/dts/mt7621.dtsi b/target/linux/ramips/dts/mt7621.dtsi
index daca857f605c650a1f506e7d18db19896fc3fe34..207fd3bf1fbde5b583b2a844dddbb88d1ffcf3ac 100644 (file)
--- a/target/linux/ramips/dts/mt7621.dtsi
+++ b/target/linux/ramips/dts/mt7621.dtsi
@@ -6,16 +6,23 @@
        compatible = "mediatek,mt7621-soc";
 
        cpus {
+               #address-cells = <1>;
+               #size-cells = <0>;
+
                cpu@0 {
+                       device_type = "cpu";
                        compatible = "mips,mips1004Kc";
+                       reg = <0>;
                };
 
                cpu@1 {
+                       device_type = "cpu";
                        compatible = "mips,mips1004Kc";
+                       reg = <1>;
                };
        };
 
-       cpuintc: cpuintc@0 {
+       cpuintc: cpuintc {
                #address-cells = <0>;
                #interrupt-cells = <1>;
                interrupt-controller;
@@ -26,7 +33,7 @@
                serial0 = &uartlite;
        };
 
-       cpuclock: cpuclock@0 {
+       cpuclock: cpuclock {
                #clock-cells = <0>;
                compatible = "fixed-clock";
 
@@ -34,7 +41,7 @@
                clock-frequency = <880000000>;
        };
 
-       sysclock: sysclock@0 {
+       sysclock: sysclock {
                #clock-cells = <0>;
                compatible = "fixed-clock";
 
@@ -148,13 +155,13 @@
                };
 
                cpc: cpc@1fbf0000 {
-                            compatible = "mtk,mt7621-cpc";
-                            reg = <0x1fbf0000 0x8000>;
+                       compatible = "mtk,mt7621-cpc";
+                       reg = <0x1fbf0000 0x8000>;
                };
 
                mc: mc@1fbf8000 {
-                           compatible = "mtk,mt7621-mc";
-                           reg = <0x1fbf8000 0x8000>;
+                       compatible = "mtk,mt7621-mc";
+                       reg = <0x1fbf8000 0x8000>;
                };
 
                uartlite: uartlite@c00 {
@@ -378,22 +385,12 @@
                #size-cells = <1>;
        };
 
-       hnat: hnat@1e100000 {
-               compatible = "mediatek,mt7623-hnat";
-               reg = <0x1e100000 0x10000>;
-               mtketh-ppd = "eth0";
-               mtketh-lan = "eth0";
-               mtketh-wan = "eth0";
-               resets = <&rstctrl 0>;
-               reset-names = "mtketh";
-       };
-
        ethernet: ethernet@1e100000 {
                compatible = "mediatek,mt7621-eth";
                reg = <0x1e100000 0x10000>;
 
                #address-cells = <1>;
-               #size-cells = <0>;
+               #size-cells = <1>;
 
                resets = <&rstctrl 6 &rstctrl 23>;
                reset-names = "fe", "eth";
@@ -412,6 +409,16 @@
                                phy-mode = "rgmii";
                        };
                };
+
+               hnat: hnat@0 {
+                       compatible = "mediatek,mt7623-hnat";
+                       reg = <0 0x10000>;
+                       mtketh-ppd = "eth0";
+                       mtketh-lan = "eth0";
+                       mtketh-wan = "eth0";
+                       resets = <&rstctrl 0>;
+                       reset-names = "mtketh";
+               };
        };
 
        gsw: gsw@1e110000 {
@@ -452,31 +459,31 @@
                clocks = <&clkctrl 24 &clkctrl 25 &clkctrl 26>;
                clock-names = "pcie0", "pcie1", "pcie2";
 
-               pcie0 {
+               pcie0: pcie@0,0 {
                        reg = <0x0000 0 0 0 0>;
 
                        #address-cells = <3>;
                        #size-cells = <2>;
 
-                       device_type = "pci";
+                       ranges;
                };
 
-               pcie1 {
+               pcie1: pcie@1,0 {
                        reg = <0x0800 0 0 0 0>;
 
                        #address-cells = <3>;
                        #size-cells = <2>;
 
-                       device_type = "pci";
+                       ranges;
                };
 
-               pcie2 {
+               pcie2: pcie@2,0 {
                        reg = <0x1000 0 0 0 0>;
 
                        #address-cells = <3>;
                        #size-cells = <2>;
 
-                       device_type = "pci";
+                       ranges;
                };
        };
 };