#size-cells = <1>;
sysc: sysc@0 {
- compatible = "ralink,mt7620a-sysc";
+ compatible = "ralink,mt7620a-sysc", "syscon";
reg = <0x0 0x100>;
};
watchdog: watchdog@120 {
- compatible = "ralink,mt7628an-wdt", "mtk,mt7621-wdt";
+ compatible = "ralink,mt7628an-wdt", "mediatek,mt7621-wdt";
reg = <0x120 0x10>;
resets = <&rstctrl 8>;
};
};
+ i2s_pins: i2s {
+ i2s {
+ ralink,group = "i2s";
+ ralink,function = "i2s";
+ };
+ };
+
uart0_pins: uartlite {
uartlite {
ralink,group = "uart0";
};
};
- pcm_i2s_pins: i2s {
- i2s {
+ pcm_i2s_pins: pcm_i2s {
+ pcm_i2s {
ralink,group = "i2s";
ralink,function = "pcm";
};
};
+
+ refclk_pins: refclk {
+ refclk {
+ ralink,group = "refclk";
+ ralink,function = "refclk";
+ };
+ };
};
rstctrl: rstctrl {
usbphy: usbphy@10120000 {
compatible = "ralink,mt7628an-usbphy", "mediatek,mt7620-usbphy";
reg = <0x10120000 0x1000>;
- #phy-cells = <1>;
+ #phy-cells = <0>;
+ ralink,sysctl = <&sysc>;
resets = <&rstctrl 22 &rstctrl 25>;
reset-names = "host", "device";
clocks = <&clkctrl 22 &clkctrl 25>;
compatible = "generic-ehci";
reg = <0x101c0000 0x1000>;
- phys = <&usbphy 1>;
+ phys = <&usbphy>;
phy-names = "usb";
interrupt-parent = <&intc>;
compatible = "generic-ohci";
reg = <0x101c1000 0x1000>;
- phys = <&usbphy 1>;
+ phys = <&usbphy>;
phy-names = "usb";
interrupt-parent = <&intc>;