+/dts-v1/;
+
/ {
#address-cells = <1>;
#size-cells = <1>;
- compatible = "ralink,mtk7628an-soc";
+ compatible = "mediatek,mt7628an-soc";
+
+ aliases {
+ serial0 = &uartlite;
+ };
cpus {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
cpu@0 {
compatible = "mips,mips24KEc";
+ reg = <0>;
};
};
bootargs = "console=ttyS0,57600";
};
- aliases {
- serial0 = &uartlite;
- };
-
- cpuintc: cpuintc@0 {
+ cpuintc: cpuintc {
#address-cells = <0>;
#interrupt-cells = <1>;
interrupt-controller;
#size-cells = <1>;
sysc: sysc@0 {
- compatible = "ralink,mt7620a-sysc";
+ compatible = "ralink,mt7620a-sysc", "syscon";
reg = <0x0 0x100>;
};
- watchdog: watchdog@120 {
- compatible = "ralink,mt7628an-wdt", "mtk,mt7621-wdt";
- reg = <0x120 0x10>;
+ watchdog: watchdog@100 {
+ compatible = "ralink,mt7628an-wdt", "mediatek,mt7621-wdt";
+ reg = <0x100 0x30>;
resets = <&rstctrl 8>;
reset-names = "wdt";
interrupts = <3>;
};
- gpio@600 {
- #address-cells = <1>;
- #size-cells = <0>;
-
- compatible = "mtk,mt7628-gpio", "mtk,mt7621-gpio";
+ gpio: gpio@600 {
+ compatible = "mediatek,mt7621-gpio";
reg = <0x600 0x100>;
interrupt-parent = <&intc>;
interrupts = <6>;
- gpio0: bank@0 {
- reg = <0>;
- compatible = "mtk,mt7621-gpio-bank";
- gpio-controller;
- #gpio-cells = <2>;
- };
-
- gpio1: bank@1 {
- reg = <1>;
- compatible = "mtk,mt7621-gpio-bank";
- gpio-controller;
- #gpio-cells = <2>;
- };
+ #interrupt-cells = <2>;
+ interrupt-controller;
- gpio2: bank@2 {
- reg = <2>;
- compatible = "mtk,mt7621-gpio-bank";
- gpio-controller;
- #gpio-cells = <2>;
- };
+ gpio-controller;
+ #gpio-cells = <2>;
};
i2c: i2c@900 {
- compatible = "mediatek,mt7628-i2c";
+ compatible = "mediatek,mt7621-i2c";
reg = <0x900 0x100>;
resets = <&rstctrl 16>;
};
i2s: i2s@a00 {
- compatible = "ralink,mt7620a-i2s";
+ compatible = "mediatek,mt7628-i2s";
reg = <0xa00 0x100>;
resets = <&rstctrl 17>;
interrupt-parent = <&intc>;
interrupts = <10>;
- dmas = <&gdma 2>,
- <&gdma 3>;
+ txdma-req = <2>;
+ rxdma-req = <3>;
+
+ dmas = <&gdma 4>,
+ <&gdma 6>;
dma-names = "tx", "rx";
status = "disabled";
pwm: pwm@5000 {
compatible = "mediatek,mt7628-pwm";
reg = <0x5000 0x1000>;
+ #pwm-cells = <2>;
resets = <&rstctrl 31>;
reset-names = "pwm";
};
gdma: gdma@2800 {
- compatible = "ralink,mt7620a-gdma", "ralink,rt2880-gdma";
+ compatible = "ralink,rt3883-gdma";
reg = <0x2800 0x800>;
resets = <&rstctrl 14>;
state_default: pinctrl0 {
};
- spi_pins: spi {
- spi {
- ralink,group = "spi";
- ralink,function = "spi";
+ spi_pins: spi_pins {
+ spi_pins {
+ groups = "spi";
+ function = "spi";
};
};
spi_cs1_pins: spi_cs1 {
spi_cs1 {
- ralink,group = "spi cs1";
- ralink,function = "spi cs1";
+ groups = "spi cs1";
+ function = "spi cs1";
};
};
- i2c_pins: i2c {
- i2c {
- ralink,group = "i2c";
- ralink,function = "i2c";
+ i2c_pins: i2c_pins {
+ i2c_pins {
+ groups = "i2c";
+ function = "i2c";
+ };
+ };
+
+ i2s_pins: i2s {
+ i2s {
+ groups = "i2s";
+ function = "i2s";
};
};
uart0_pins: uartlite {
uartlite {
- ralink,group = "uart0";
- ralink,function = "uart0";
+ groups = "uart0";
+ function = "uart0";
};
};
uart1_pins: uart1 {
uart1 {
- ralink,group = "uart1";
- ralink,function = "uart1";
+ groups = "uart1";
+ function = "uart1";
};
};
uart2_pins: uart2 {
uart2 {
- ralink,group = "uart2";
- ralink,function = "uart2";
+ groups = "uart2";
+ function = "uart2";
};
};
sdxc_pins: sdxc {
sdxc {
- ralink,group = "sdmode";
- ralink,function = "sdxc";
+ groups = "sdmode";
+ function = "sdxc";
};
};
pwm0_pins: pwm0 {
pwm0 {
- ralink,group = "pwm0";
- ralink,function = "pwm0";
+ groups = "pwm0";
+ function = "pwm0";
};
};
pwm1_pins: pwm1 {
pwm1 {
- ralink,group = "pwm1";
- ralink,function = "pwm1";
+ groups = "pwm1";
+ function = "pwm1";
};
};
- pcm_i2s_pins: i2s {
- i2s {
- ralink,group = "i2s";
- ralink,function = "pcm";
+ pcm_i2s_pins: pcm_i2s {
+ pcm_i2s {
+ groups = "i2s";
+ function = "pcm";
+ };
+ };
+
+ refclk_pins: refclk {
+ refclk {
+ groups = "refclk";
+ function = "refclk";
};
};
};
};
usbphy: usbphy@10120000 {
- compatible = "ralink,mt7628an-usbphy", "mediatek,mt7620-usbphy";
- reg = <0x10120000 0x4000>;
- #phy-cells = <1>;
+ compatible = "mediatek,mt7628-usbphy", "mediatek,mt7620-usbphy";
+ reg = <0x10120000 0x1000>;
+ #phy-cells = <0>;
+ ralink,sysctl = <&sysc>;
resets = <&rstctrl 22 &rstctrl 25>;
reset-names = "host", "device";
clocks = <&clkctrl 22 &clkctrl 25>;
};
ehci: ehci@101c0000 {
+ #address-cells = <1>;
+ #size-cells = <0>;
compatible = "generic-ehci";
reg = <0x101c0000 0x1000>;
- phys = <&usbphy 1>;
+ phys = <&usbphy>;
phy-names = "usb";
interrupt-parent = <&intc>;
interrupts = <18>;
+
+ ehci_port1: port@1 {
+ reg = <1>;
+ #trigger-source-cells = <0>;
+ };
};
ohci: ohci@101c1000 {
+ #address-cells = <1>;
+ #size-cells = <0>;
compatible = "generic-ohci";
reg = <0x101c1000 0x1000>;
- phys = <&usbphy 1>;
+ phys = <&usbphy>;
phy-names = "usb";
interrupt-parent = <&intc>;
interrupts = <18>;
+
+ ohci_port1: port@1 {
+ reg = <1>;
+ #trigger-source-cells = <0>;
+ };
};
ethernet: ethernet@10100000 {
};
esw: esw@10110000 {
- compatible = "ralink,rt3050-esw";
+ compatible = "mediatek,mt7628-esw", "ralink,rt3050-esw";
reg = <0x10110000 0x8000>;
resets = <&rstctrl 23>;
0x01000000 0 0x00000000 0x10160000 0 0x00010000 /* io space */
>;
- pcie-bridge {
+ pcie0: pcie@0,0 {
reg = <0x0000 0 0 0 0>;
#address-cells = <3>;
#size-cells = <2>;
device_type = "pci";
+
+ ranges;
};
};
status = "disabled";
mediatek,mtd-eeprom = <&factory 0x0000>;
- mediatek,5ghz = <0>;
};
};
projects / openwrt / openwrt.git / blobdiff