+/dts-v1/;
+
/ {
#address-cells = <1>;
#size-cells = <1>;
- compatible = "ralink,mtk7628an-soc";
+ compatible = "mediatek,mt7628an-soc";
+
+ aliases {
+ serial0 = &uartlite;
+ };
cpus {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
cpu@0 {
compatible = "mips,mips24KEc";
+ reg = <0>;
};
};
bootargs = "console=ttyS0,57600";
};
- cpuintc: cpuintc@0 {
+ cpuintc: cpuintc {
#address-cells = <0>;
#interrupt-cells = <1>;
interrupt-controller;
compatible = "mti,cpu-interrupt-controller";
};
- palmbus@10000000 {
+ palmbus: palmbus@10000000 {
compatible = "palmbus";
reg = <0x10000000 0x200000>;
- ranges = <0x0 0x10000000 0x1FFFFF>;
+ ranges = <0x0 0x10000000 0x1FFFFF>;
#address-cells = <1>;
#size-cells = <1>;
- sysc@0 {
- compatible = "ralink,mt7620a-sysc";
+ sysc: sysc@0 {
+ compatible = "ralink,mt7620a-sysc", "syscon";
reg = <0x0 0x100>;
};
- watchdog@120 {
- compatible = "ralink,mt7628an-wdt", "mtk,mt7621-wdt";
- reg = <0x120 0x10>;
+ watchdog: watchdog@100 {
+ compatible = "ralink,mt7628an-wdt", "mediatek,mt7621-wdt";
+ reg = <0x100 0x30>;
resets = <&rstctrl 8>;
reset-names = "wdt";
0x80 0x78>;
};
- memc@300 {
+ memc: memc@300 {
compatible = "ralink,mt7620a-memc", "ralink,rt3050-memc";
reg = <0x300 0x100>;
interrupts = <3>;
};
- gpio@600 {
+ gpio: gpio@600 {
+ compatible = "mediatek,mt7621-gpio";
+ reg = <0x600 0x100>;
+
+ interrupt-parent = <&intc>;
+ interrupts = <6>;
+
+ #interrupt-cells = <2>;
+ interrupt-controller;
+
+ gpio-controller;
+ #gpio-cells = <2>;
+ };
+
+ i2c: i2c@900 {
+ compatible = "mediatek,mt7621-i2c";
+ reg = <0x900 0x100>;
+
+ resets = <&rstctrl 16>;
+ reset-names = "i2c";
+
#address-cells = <1>;
#size-cells = <0>;
- compatible = "mtk,mt7628-gpio", "mtk,mt7621-gpio";
- reg = <0x600 0x100>;
+ status = "disabled";
- gpio0: bank@0 {
- reg = <0>;
- compatible = "mtk,mt7621-gpio-bank";
- gpio-controller;
- #gpio-cells = <2>;
- };
+ pinctrl-names = "default";
+ pinctrl-0 = <&i2c_pins>;
+ };
- gpio1: bank@1 {
- reg = <1>;
- compatible = "mtk,mt7621-gpio-bank";
- gpio-controller;
- #gpio-cells = <2>;
- };
+ i2s: i2s@a00 {
+ compatible = "mediatek,mt7628-i2s";
+ reg = <0xa00 0x100>;
- gpio2: bank@2 {
- reg = <2>;
- compatible = "mtk,mt7621-gpio-bank";
- gpio-controller;
- #gpio-cells = <2>;
- };
+ resets = <&rstctrl 17>;
+ reset-names = "i2s";
+
+ interrupt-parent = <&intc>;
+ interrupts = <10>;
+
+ txdma-req = <2>;
+ rxdma-req = <3>;
+
+ dmas = <&gdma 4>,
+ <&gdma 6>;
+ dma-names = "tx", "rx";
+
+ status = "disabled";
};
- spi@b00 {
+ spi0: spi@b00 {
compatible = "ralink,mt7621-spi";
reg = <0xb00 0x100>;
reset-names = "spi";
#address-cells = <1>;
- #size-cells = <1>;
+ #size-cells = <0>;
pinctrl-names = "default";
pinctrl-0 = <&spi_pins>;
status = "disabled";
};
- uartlite@c00 {
+ uartlite: uartlite@c00 {
compatible = "ns16550a";
reg = <0xc00 0x100>;
reg-io-width = <4>;
no-loopback-test;
+ clock-frequency = <40000000>;
+
resets = <&rstctrl 12>;
reset-names = "uartl";
pinctrl-0 = <&uart0_pins>;
};
- uart1@d00 {
+ uart1: uart1@d00 {
compatible = "ns16550a";
reg = <0xd00 0x100>;
reg-io-width = <4>;
no-loopback-test;
+ clock-frequency = <40000000>;
+
resets = <&rstctrl 19>;
reset-names = "uart1";
status = "disabled";
};
- uart2@e00 {
+ uart2: uart2@e00 {
compatible = "ns16550a";
reg = <0xe00 0x100>;
reg-io-width = <4>;
no-loopback-test;
+ clock-frequency = <40000000>;
+
resets = <&rstctrl 20>;
reset-names = "uart2";
status = "disabled";
};
+
+ pwm: pwm@5000 {
+ compatible = "mediatek,mt7628-pwm";
+ reg = <0x5000 0x1000>;
+ #pwm-cells = <2>;
+
+ resets = <&rstctrl 31>;
+ reset-names = "pwm";
+
+ pinctrl-names = "default";
+ pinctrl-0 = <&pwm0_pins>, <&pwm1_pins>;
+
+ status = "disabled";
+ };
+
+ pcm: pcm@2000 {
+ compatible = "ralink,mt7620a-pcm";
+ reg = <0x2000 0x800>;
+
+ resets = <&rstctrl 11>;
+ reset-names = "pcm";
+
+ interrupt-parent = <&intc>;
+ interrupts = <4>;
+
+ status = "disabled";
+ };
+
+ gdma: gdma@2800 {
+ compatible = "ralink,rt3883-gdma";
+ reg = <0x2800 0x800>;
+
+ resets = <&rstctrl 14>;
+ reset-names = "dma";
+
+ interrupt-parent = <&intc>;
+ interrupts = <7>;
+
+ #dma-cells = <1>;
+ #dma-channels = <16>;
+ #dma-requests = <16>;
+
+ status = "disabled";
+ };
};
- pinctrl {
+ pinctrl: pinctrl {
compatible = "ralink,rt2880-pinmux";
pinctrl-names = "default";
pinctrl-0 = <&state_default>;
+
state_default: pinctrl0 {
};
- spi_pins: spi {
- spi {
- ralink,group = "spi";
- ralink,function = "spi";
+
+ spi_pins: spi_pins {
+ spi_pins {
+ groups = "spi";
+ function = "spi";
};
};
+
+ spi_cs1_pins: spi_cs1 {
+ spi_cs1 {
+ groups = "spi cs1";
+ function = "spi cs1";
+ };
+ };
+
+ i2c_pins: i2c_pins {
+ i2c_pins {
+ groups = "i2c";
+ function = "i2c";
+ };
+ };
+
+ i2s_pins: i2s {
+ i2s {
+ groups = "i2s";
+ function = "i2s";
+ };
+ };
+
uart0_pins: uartlite {
uartlite {
- ralink,group = "uart0";
- ralink,function = "uart0";
+ groups = "uart0";
+ function = "uart0";
};
};
+
uart1_pins: uart1 {
uart1 {
- ralink,group = "uart1";
- ralink,function = "uart1";
+ groups = "uart1";
+ function = "uart1";
};
};
+
uart2_pins: uart2 {
uart2 {
- ralink,group = "uart2";
- ralink,function = "uart2";
+ groups = "uart2";
+ function = "uart2";
};
};
+
sdxc_pins: sdxc {
sdxc {
- ralink,group = "sdmode";
- ralink,function = "sdxc";
+ groups = "sdmode";
+ function = "sdxc";
+ };
+ };
+
+ pwm0_pins: pwm0 {
+ pwm0 {
+ groups = "pwm0";
+ function = "pwm0";
+ };
+ };
+
+ pwm1_pins: pwm1 {
+ pwm1 {
+ groups = "pwm1";
+ function = "pwm1";
+ };
+ };
+
+ pcm_i2s_pins: pcm_i2s {
+ pcm_i2s {
+ groups = "i2s";
+ function = "pcm";
+ };
+ };
+
+ refclk_pins: refclk {
+ refclk {
+ groups = "refclk";
+ function = "refclk";
};
};
};
#reset-cells = <1>;
};
- usbphy: usbphy {
- compatible = "ralink,mt7628an-usbphy", "ralink,mt7620a-usbphy";
- #phy-cells = <1>;
+ clkctrl: clkctrl {
+ compatible = "ralink,rt2880-clock";
+ #clock-cells = <1>;
+ };
+
+ usbphy: usbphy@10120000 {
+ compatible = "mediatek,mt7628-usbphy", "mediatek,mt7620-usbphy";
+ reg = <0x10120000 0x1000>;
+ #phy-cells = <0>;
- resets = <&rstctrl 22>;
- reset-names = "host";
+ ralink,sysctl = <&sysc>;
+ resets = <&rstctrl 22 &rstctrl 25>;
+ reset-names = "host", "device";
+ clocks = <&clkctrl 22 &clkctrl 25>;
+ clock-names = "host", "device";
};
- sdhci@10130000 {
+ sdhci: sdhci@10130000 {
compatible = "ralink,mt7620-sdhci";
- reg = <0x10130000 4000>;
+ reg = <0x10130000 0x4000>;
interrupt-parent = <&intc>;
interrupts = <14>;
status = "disabled";
};
- ehci@101c0000 {
- compatible = "ralink,rt3xxx-ehci";
+ ehci: ehci@101c0000 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ compatible = "generic-ehci";
reg = <0x101c0000 0x1000>;
- phys = <&usbphy 1>;
+ phys = <&usbphy>;
phy-names = "usb";
interrupt-parent = <&intc>;
interrupts = <18>;
+
+ ehci_port1: port@1 {
+ reg = <1>;
+ #trigger-source-cells = <0>;
+ };
};
- ohci@101c1000 {
- compatible = "ralink,rt3xxx-ohci";
+ ohci: ohci@101c1000 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ compatible = "generic-ohci";
reg = <0x101c1000 0x1000>;
- phys = <&usbphy 1>;
+ phys = <&usbphy>;
phy-names = "usb";
interrupt-parent = <&intc>;
interrupts = <18>;
+
+ ohci_port1: port@1 {
+ reg = <1>;
+ #trigger-source-cells = <0>;
+ };
};
- ethernet@10100000 {
+ ethernet: ethernet@10100000 {
compatible = "ralink,rt5350-eth";
- reg = <0x10100000 10000>;
+ reg = <0x10100000 0x10000>;
interrupt-parent = <&cpuintc>;
interrupts = <5>;
resets = <&rstctrl 21 &rstctrl 23>;
reset-names = "fe", "esw";
+
+ mediatek,switch = <&esw>;
};
- esw@10110000 {
- compatible = "ralink,rt3050-esw";
- reg = <0x10110000 8000>;
+ esw: esw@10110000 {
+ compatible = "mediatek,mt7628-esw", "ralink,rt3050-esw";
+ reg = <0x10110000 0x8000>;
resets = <&rstctrl 23>;
reset-names = "esw";
interrupts = <17>;
};
- pcie@10140000 {
+ pcie: pcie@10140000 {
compatible = "mediatek,mt7620-pci";
reg = <0x10140000 0x100
0x10142000 0x100>;
#address-cells = <3>;
#size-cells = <2>;
- resets = <&rstctrl 26>;
- reset-names = "pcie0";
-
interrupt-parent = <&cpuintc>;
interrupts = <4>;
+ resets = <&rstctrl 26 &rstctrl 27>;
+ reset-names = "pcie0", "pcie1";
+ clocks = <&clkctrl 26 &clkctrl 27>;
+ clock-names = "pcie0", "pcie1";
+
status = "disabled";
device_type = "pci";
0x01000000 0 0x00000000 0x10160000 0 0x00010000 /* io space */
>;
- pcie-bridge {
+ pcie0: pcie@0,0 {
reg = <0x0000 0 0 0 0>;
#address-cells = <3>;
#size-cells = <2>;
device_type = "pci";
+
+ ranges;
};
};
+ wmac: wmac@10300000 {
+ compatible = "mediatek,mt7628-wmac";
+ reg = <0x10300000 0x100000>;
+
+ interrupt-parent = <&cpuintc>;
+ interrupts = <6>;
+
+ status = "disabled";
+
+ mediatek,mtd-eeprom = <&factory 0x0000>;
+ };
};
projects / openwrt / openwrt.git / blobdiff