ramips: mt7620: fix RGMII TXID PHY mode

[openwrt/openwrt.git] / target / linux / ramips / files / drivers / net / ethernet / ralink / soc_mt7620.c

diff --git a/target/linux/ramips/files/drivers/net/ethernet/ralink/soc_mt7620.c b/target/linux/ramips/files/drivers/net/ethernet/ralink/soc_mt7620.c
index d06e9da58606e93d34a69629d02e4d47d2b0a82c..c596de76bd2a08cceade05f311e057a81218893a 100644 (file)
--- a/target/linux/ramips/files/drivers/net/ethernet/ralink/soc_mt7620.c
+++ b/target/linux/ramips/files/drivers/net/ethernet/ralink/soc_mt7620.c
@@ -196,7 +196,7 @@ static void mt7620_port_init(struct fe_priv *priv, struct device_node *np)
                break;
        case PHY_INTERFACE_MODE_RGMII_TXID:
                mask = 0;
-               val_delay &= ~GSW_REG_GPCx_TXDELAY;
+               val_delay |= GSW_REG_GPCx_TXDELAY;
                val_delay |= GSW_REG_GPCx_RXDELAY;
                break;
        case PHY_INTERFACE_MODE_MII: