ath79: increase spi clock for D-Link DIR-842
authorSebastian Schaper <openwrt@sebastianschaper.net>
Tue, 19 May 2020 10:40:17 +0000 (12:40 +0200)
committerAdrian Schmutzler <freifunk@adrianschmutzler.de>
Tue, 26 May 2020 20:49:18 +0000 (22:49 +0200)
commit64d088d8f9f2fbca75f3240ced5cf40b721dc3f2
tree94090b2006257351d11f9f85ec6895feb82d2936
parent8643c0b53d74aeb535c6700c115d323cb55ec7fb
ath79: increase spi clock for D-Link DIR-842

AHB is 258 MHz for this device (CPU_PLL / 3), but there is no difference
between 64 MHz and 50 MHz for spi-max-frequency, thus increase to 50 MHz.

Tested on revisions C1 and C3.

Signed-off-by: Sebastian Schaper <openwrt@sebastianschaper.net>
target/linux/ath79/dts/qca9563_dlink_dir-842-c.dtsi