target/linux/lantiq/patches-4.4/0035-owrt-lantiq-wifi-and-ethernet-eeprom-handling.patch

   1 From f8c5db89e793a4bc6c1e87bd7b3a5cec16b75bc3 Mon Sep 17 00:00:00 2001
   2 From: John Crispin <blogic@openwrt.org>
   3 Date: Wed, 10 Sep 2014 22:42:14 +0200
   4 Subject: [PATCH 35/36] owrt: lantiq: wifi and ethernet eeprom handling
   5
   6 Signed-off-by: John Crispin <blogic@openwrt.org>
   7 ---
   8  arch/mips/include/asm/mach-lantiq/pci-ath-fixup.h  |    6 +
   9  .../mips/include/asm/mach-lantiq/xway/lantiq_soc.h |    3 +
  10  arch/mips/lantiq/xway/Makefile                     |    3 +
  11  arch/mips/lantiq/xway/ath_eep.c                    |  282 ++++++++++++++++++++
  12  arch/mips/lantiq/xway/eth_mac.c                    |   76 ++++++
  13  arch/mips/lantiq/xway/pci-ath-fixup.c              |  109 ++++++++
  14  arch/mips/lantiq/xway/rt_eep.c                     |   60 +++++
  15  7 files changed, 539 insertions(+)
  16  create mode 100644 arch/mips/include/asm/mach-lantiq/pci-ath-fixup.h
  17  create mode 100644 arch/mips/lantiq/xway/ath_eep.c
  18  create mode 100644 arch/mips/lantiq/xway/eth_mac.c
  19  create mode 100644 arch/mips/lantiq/xway/pci-ath-fixup.c
  20  create mode 100644 arch/mips/lantiq/xway/rt_eep.c
  21
  22 --- /dev/null
  23 +++ b/arch/mips/include/asm/mach-lantiq/pci-ath-fixup.h
  24 @@ -0,0 +1,6 @@
  25 +#ifndef _PCI_ATH_FIXUP
  26 +#define _PCI_ATH_FIXUP
  27 +
  28 +void ltq_pci_ath_fixup(unsigned slot, u16 *cal_data) __init;
  29 +
  30 +#endif /* _PCI_ATH_FIXUP */
  31 --- a/arch/mips/include/asm/mach-lantiq/xway/lantiq_soc.h
  32 +++ b/arch/mips/include/asm/mach-lantiq/xway/lantiq_soc.h
  33 @@ -104,5 +104,8 @@
  34  extern void ltq_pmu_enable(unsigned int module);
  35  extern void ltq_pmu_disable(unsigned int module);
  36
  37 +/* allow the ethernet driver to load a flash mapped mac addr */
  38 +const u8* ltq_get_eth_mac(void);
  39 +
  40  #endif /* CONFIG_SOC_TYPE_XWAY */
  41  #endif /* _LTQ_XWAY_H__ */
  42 --- a/arch/mips/lantiq/xway/Makefile
  43 +++ b/arch/mips/lantiq/xway/Makefile
  44 @@ -2,4 +2,7 @@
  45
  46  obj-y += vmmc.o tffs.o
  47
  48 +obj-y += eth_mac.o
  49 +obj-$(CONFIG_PCI) += ath_eep.o rt_eep.o pci-ath-fixup.o
  50 +
  51  obj-$(CONFIG_XRX200_PHY_FW) += xrx200_phy_fw.o
  52 --- /dev/null
  53 +++ b/arch/mips/lantiq/xway/ath_eep.c
  54 @@ -0,0 +1,307 @@
  55 +/*
  56 + *  Copyright (C) 2011 Luca Olivetti <luca@ventoso.org>
  57 + *  Copyright (C) 2011 John Crispin <blogic@openwrt.org>
  58 + *  Copyright (C) 2011 Andrej Vlašić <andrej.vlasic0@gmail.com>
  59 + *  Copyright (C) 2013 Álvaro Fernández Rojas <noltari@gmail.com>
  60 + *  Copyright (C) 2013 Daniel Gimpelevich <daniel@gimpelevich.san-francisco.ca.us>
  61 + *  Copyright (C) 2015 Vittorio Gambaletta <openwrt@vittgam.net>
  62 + *
  63 + *  This program is free software; you can redistribute it and/or modify it
  64 + *  under the terms of the GNU General Public License version 2 as published
  65 + *  by the Free Software Foundation.
  66 + */
  67 +
  68 +#include <linux/init.h>
  69 +#include <linux/module.h>
  70 +#include <linux/platform_device.h>
  71 +#include <linux/etherdevice.h>
  72 +#include <linux/ath5k_platform.h>
  73 +#include <linux/ath9k_platform.h>
  74 +#include <linux/pci.h>
  75 +#include <linux/err.h>
  76 +#include <linux/mtd/mtd.h>
  77 +#include <pci-ath-fixup.h>
  78 +#include <lantiq_soc.h>
  79 +
  80 +extern int (*ltq_pci_plat_dev_init)(struct pci_dev *dev);
  81 +struct ath5k_platform_data ath5k_pdata;
  82 +struct ath9k_platform_data ath9k_pdata = {
  83 +       .led_pin = -1,
  84 +};
  85 +static u8 athxk_eeprom_mac[6];
  86 +
  87 +static int ath9k_pci_plat_dev_init(struct pci_dev *dev)
  88 +{
  89 +       dev->dev.platform_data = &ath9k_pdata;
  90 +       return 0;
  91 +}
  92 +
  93 +static int ath9k_eep_load;
  94 +int __init of_ath9k_eeprom_probe(struct platform_device *pdev)
  95 +{
  96 +       struct device_node *np = pdev->dev.of_node, *mtd_np;
  97 +       struct resource *eep_res, *mac_res = NULL;
  98 +       void __iomem *eep, *mac;
  99 +       int mac_offset, led_pin;
 100 +       u32 mac_inc = 0, pci_slot = 0;
 101 +       int i;
 102 +       struct mtd_info *the_mtd;
 103 +       size_t flash_readlen;
 104 +       const __be32 *list;
 105 +       const char *part;
 106 +       phandle phandle;
 107 +       u16 dev_ids[2] = { 0 };
 108 +
 109 +       if ((list = of_get_property(np, "ath,eep-flash", &i)) && i == 2 *
 110 +                       sizeof(*list) && (phandle = be32_to_cpup(list++)) &&
 111 +                       (mtd_np = of_find_node_by_phandle(phandle)) && ((part =
 112 +                       of_get_property(mtd_np, "label", NULL)) || (part =
 113 +                       mtd_np->name)) && (the_mtd = get_mtd_device_nm(part))
 114 +                       != ERR_PTR(-ENODEV)) {
 115 +               i = mtd_read(the_mtd, be32_to_cpup(list),
 116 +                               ATH9K_PLAT_EEP_MAX_WORDS << 1, &flash_readlen,
 117 +                               (void *) ath9k_pdata.eeprom_data);
 118 +               if (!of_property_read_u32(np, "ath,mac-offset", &mac_offset)) {
 119 +                       size_t mac_readlen;
 120 +                       mtd_read(the_mtd, mac_offset, 6, &mac_readlen,
 121 +                               (void *) athxk_eeprom_mac);
 122 +               }
 123 +               put_mtd_device(the_mtd);
 124 +               if ((sizeof(ath9k_pdata.eeprom_data) != flash_readlen) || i) {
 125 +                       dev_err(&pdev->dev, "failed to load eeprom from mtd\n");
 126 +                       return -ENODEV;
 127 +               }
 128 +       } else {
 129 +               eep_res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
 130 +               mac_res = platform_get_resource(pdev, IORESOURCE_MEM, 1);
 131 +
 132 +               if (!eep_res) {
 133 +                       dev_err(&pdev->dev, "failed to load eeprom address\n");
 134 +                       return -ENODEV;
 135 +               }
 136 +               if (resource_size(eep_res) != ATH9K_PLAT_EEP_MAX_WORDS << 1) {
 137 +                       dev_err(&pdev->dev, "eeprom has an invalid size\n");
 138 +                       return -EINVAL;
 139 +               }
 140 +
 141 +               eep = ioremap(eep_res->start, resource_size(eep_res));
 142 +               memcpy_fromio(ath9k_pdata.eeprom_data, eep,
 143 +                               ATH9K_PLAT_EEP_MAX_WORDS << 1);
 144 +       }
 145 +
 146 +       if (of_find_property(np, "ath,eep-swap", NULL))
 147 +               for (i = 0; i < ATH9K_PLAT_EEP_MAX_WORDS; i++)
 148 +                       ath9k_pdata.eeprom_data[i] = swab16(ath9k_pdata.eeprom_data[i]);
 149 +
 150 +       if (of_find_property(np, "ath,eep-endian", NULL)) {
 151 +               ath9k_pdata.endian_check = true;
 152 +
 153 +               dev_info(&pdev->dev, "endian check enabled.\n");
 154 +       }
 155 +
 156 +       if (!is_valid_ether_addr(athxk_eeprom_mac)) {
 157 +               if (mac_res) {
 158 +                       if (resource_size(mac_res) != 6) {
 159 +                               dev_err(&pdev->dev, "mac has an invalid size\n");
 160 +                               return -EINVAL;
 161 +                       }
 162 +                       mac = ioremap(mac_res->start, resource_size(mac_res));
 163 +                       memcpy_fromio(athxk_eeprom_mac, mac, 6);
 164 +               } else if (ltq_get_eth_mac()) {
 165 +                       memcpy(athxk_eeprom_mac, ltq_get_eth_mac(), 6);
 166 +               }
 167 +       }
 168 +       if (!is_valid_ether_addr(athxk_eeprom_mac)) {
 169 +               dev_warn(&pdev->dev, "using random mac\n");
 170 +               random_ether_addr(athxk_eeprom_mac);
 171 +       }
 172 +
 173 +       if (!of_property_read_u32(np, "ath,mac-increment", &mac_inc))
 174 +               athxk_eeprom_mac[5] += mac_inc;
 175 +
 176 +       ath9k_pdata.macaddr = athxk_eeprom_mac;
 177 +       ltq_pci_plat_dev_init = ath9k_pci_plat_dev_init;
 178 +
 179 +       if (!of_property_read_u32(np, "ath,pci-slot", &pci_slot)) {
 180 +               ltq_pci_ath_fixup(pci_slot, ath9k_pdata.eeprom_data);
 181 +
 182 +               dev_info(&pdev->dev, "pci slot: %u\n", pci_slot);
 183 +                if (ath9k_eep_load) {
 184 +                        struct pci_dev *d = NULL;
 185 +                        while ((d = pci_get_device(PCI_VENDOR_ID_ATHEROS,
 186 +                                        PCI_ANY_ID, d)) != NULL)
 187 +                                pci_fixup_device(pci_fixup_early, d);
 188 +                }
 189 +
 190 +       }
 191 +
 192 +       if (!of_property_read_u16_array(np, "ath,device-id", dev_ids, 2)) {
 193 +               struct pci_dev *d = NULL;
 194 +
 195 +               while ((d = pci_get_device(PCI_VENDOR_ID_ATHEROS,
 196 +                                          dev_ids[0], d)) != NULL)
 197 +                       d->device = dev_ids[1];
 198 +       }
 199 +
 200 +       if (!of_property_read_u32(np, "ath,led-pin", &led_pin)) {
 201 +               ath9k_pdata.led_pin = led_pin;
 202 +               dev_info(&pdev->dev, "using led pin %d.\n", led_pin);
 203 +       }
 204 +
 205 +       if (of_property_read_bool(np, "ath,led-active-high")) {
 206 +               ath9k_pdata.led_active_high = true;
 207 +               dev_info(&pdev->dev, "inverted LED polarity\n");
 208 +       }
 209 +
 210 +       if (of_property_read_bool(np, "ath,disable-2ghz")) {
 211 +               ath9k_pdata.disable_2ghz = true;
 212 +               dev_info(&pdev->dev, "disabled 2.4 GHz band\n");
 213 +       }
 214 +
 215 +       if (of_property_read_bool(np, "ath,disable-5ghz")) {
 216 +               ath9k_pdata.disable_5ghz = true;
 217 +               dev_info(&pdev->dev, "disabled 5 GHz band\n");
 218 +       }
 219 +
 220 +       dev_info(&pdev->dev, "loaded ath9k eeprom\n");
 221 +
 222 +       return 0;
 223 +}
 224 +
 225 +static struct of_device_id ath9k_eeprom_ids[] = {
 226 +       { .compatible = "ath9k,eeprom" },
 227 +       { }
 228 +};
 229 +
 230 +static struct platform_driver ath9k_eeprom_driver = {
 231 +       .driver         = {
 232 +               .name           = "ath9k,eeprom",
 233 +               .owner  = THIS_MODULE,
 234 +               .of_match_table = of_match_ptr(ath9k_eeprom_ids),
 235 +       },
 236 +};
 237 +
 238 +static int __init of_ath9k_eeprom_init(void)
 239 +{
 240 +        int ret = platform_driver_probe(&ath9k_eeprom_driver, of_ath9k_eeprom_probe);
 241 +
 242 +        if (ret)
 243 +                ath9k_eep_load = 1;
 244 +
 245 +        return ret;
 246 +}
 247 +
 248 +static int __init of_ath9k_eeprom_init_late(void)
 249 +{
 250 +        if (!ath9k_eep_load)
 251 +                return 0;
 252 +        return platform_driver_probe(&ath9k_eeprom_driver, of_ath9k_eeprom_probe);
 253 +}
 254 +late_initcall(of_ath9k_eeprom_init_late);
 255 +subsys_initcall(of_ath9k_eeprom_init);
 256 +
 257 +
 258 +static int ath5k_pci_plat_dev_init(struct pci_dev *dev)
 259 +{
 260 +       dev->dev.platform_data = &ath5k_pdata;
 261 +       return 0;
 262 +}
 263 +
 264 +int __init of_ath5k_eeprom_probe(struct platform_device *pdev)
 265 +{
 266 +       struct device_node *np = pdev->dev.of_node, *mtd_np;
 267 +       struct resource *eep_res, *mac_res = NULL;
 268 +       void __iomem *eep, *mac;
 269 +       int mac_offset;
 270 +       u32 mac_inc = 0;
 271 +       int i;
 272 +       struct mtd_info *the_mtd;
 273 +       size_t flash_readlen;
 274 +       const __be32 *list;
 275 +       const char *part;
 276 +       phandle phandle;
 277 +
 278 +       if ((list = of_get_property(np, "ath,eep-flash", &i)) && i == 2 *
 279 +                       sizeof(*list) && (phandle = be32_to_cpup(list++)) &&
 280 +                       (mtd_np = of_find_node_by_phandle(phandle)) && ((part =
 281 +                       of_get_property(mtd_np, "label", NULL)) || (part =
 282 +                       mtd_np->name)) && (the_mtd = get_mtd_device_nm(part))
 283 +                       != ERR_PTR(-ENODEV)) {
 284 +               i = mtd_read(the_mtd, be32_to_cpup(list),
 285 +                               ATH5K_PLAT_EEP_MAX_WORDS << 1, &flash_readlen,
 286 +                               (void *) ath5k_pdata.eeprom_data);
 287 +               put_mtd_device(the_mtd);
 288 +               if ((sizeof(ATH5K_PLAT_EEP_MAX_WORDS << 1) != flash_readlen)
 289 +                               || i) {
 290 +                       dev_err(&pdev->dev, "failed to load eeprom from mtd\n");
 291 +                       return -ENODEV;
 292 +               }
 293 +       } else {
 294 +               eep_res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
 295 +               mac_res = platform_get_resource(pdev, IORESOURCE_MEM, 1);
 296 +
 297 +               if (!eep_res) {
 298 +                       dev_err(&pdev->dev, "failed to load eeprom address\n");
 299 +                       return -ENODEV;
 300 +               }
 301 +               if (resource_size(eep_res) != ATH5K_PLAT_EEP_MAX_WORDS << 1) {
 302 +                       dev_err(&pdev->dev, "eeprom has an invalid size\n");
 303 +                       return -EINVAL;
 304 +               }
 305 +
 306 +               eep = ioremap(eep_res->start, resource_size(eep_res));
 307 +               ath5k_pdata.eeprom_data = kmalloc(ATH5K_PLAT_EEP_MAX_WORDS<<1,
 308 +                               GFP_KERNEL);
 309 +               memcpy_fromio(ath5k_pdata.eeprom_data, eep,
 310 +                               ATH5K_PLAT_EEP_MAX_WORDS << 1);
 311 +       }
 312 +
 313 +       if (of_find_property(np, "ath,eep-swap", NULL))
 314 +               for (i = 0; i < ATH5K_PLAT_EEP_MAX_WORDS; i++)
 315 +                       ath5k_pdata.eeprom_data[i] = swab16(ath5k_pdata.eeprom_data[i]);
 316 +
 317 +       if (!of_property_read_u32(np, "ath,mac-offset", &mac_offset)) {
 318 +               memcpy_fromio(athxk_eeprom_mac, (void*) ath5k_pdata.eeprom_data + mac_offset, 6);
 319 +       } else if (mac_res) {
 320 +               if (resource_size(mac_res) != 6) {
 321 +                       dev_err(&pdev->dev, "mac has an invalid size\n");
 322 +                       return -EINVAL;
 323 +               }
 324 +               mac = ioremap(mac_res->start, resource_size(mac_res));
 325 +               memcpy_fromio(athxk_eeprom_mac, mac, 6);
 326 +       } else if (ltq_get_eth_mac())
 327 +               memcpy(athxk_eeprom_mac, ltq_get_eth_mac(), 6);
 328 +       else {
 329 +               dev_warn(&pdev->dev, "using random mac\n");
 330 +               random_ether_addr(athxk_eeprom_mac);
 331 +       }
 332 +
 333 +       if (!of_property_read_u32(np, "ath,mac-increment", &mac_inc))
 334 +               athxk_eeprom_mac[5] += mac_inc;
 335 +
 336 +       ath5k_pdata.macaddr = athxk_eeprom_mac;
 337 +       ltq_pci_plat_dev_init = ath5k_pci_plat_dev_init;
 338 +
 339 +       dev_info(&pdev->dev, "loaded ath5k eeprom\n");
 340 +
 341 +       return 0;
 342 +}
 343 +
 344 +static struct of_device_id ath5k_eeprom_ids[] = {
 345 +       { .compatible = "ath5k,eeprom" },
 346 +       { }
 347 +};
 348 +
 349 +static struct platform_driver ath5k_eeprom_driver = {
 350 +       .driver         = {
 351 +               .name           = "ath5k,eeprom",
 352 +               .owner  = THIS_MODULE,
 353 +               .of_match_table = of_match_ptr(ath5k_eeprom_ids),
 354 +       },
 355 +};
 356 +
 357 +static int __init of_ath5k_eeprom_init(void)
 358 +{
 359 +       return platform_driver_probe(&ath5k_eeprom_driver, of_ath5k_eeprom_probe);
 360 +}
 361 +device_initcall(of_ath5k_eeprom_init);
 362 --- /dev/null
 363 +++ b/arch/mips/lantiq/xway/eth_mac.c
 364 @@ -0,0 +1,76 @@
 365 +/*
 366 + *  Copyright (C) 2012 John Crispin <blogic@openwrt.org>
 367 + *
 368 + *  This program is free software; you can redistribute it and/or modify it
 369 + *  under the terms of the GNU General Public License version 2 as published
 370 + *  by the Free Software Foundation.
 371 + */
 372 +
 373 +#include <linux/init.h>
 374 +#include <linux/module.h>
 375 +#include <linux/of_platform.h>
 376 +#include <linux/if_ether.h>
 377 +
 378 +static u8 eth_mac[6];
 379 +static int eth_mac_set;
 380 +
 381 +const u8* ltq_get_eth_mac(void)
 382 +{
 383 +       return eth_mac;
 384 +}
 385 +
 386 +static int __init setup_ethaddr(char *str)
 387 +{
 388 +       eth_mac_set = mac_pton(str, eth_mac);
 389 +       return !eth_mac_set;
 390 +}
 391 +early_param("ethaddr", setup_ethaddr);
 392 +
 393 +int __init of_eth_mac_probe(struct platform_device *pdev)
 394 +{
 395 +       struct device_node *np = pdev->dev.of_node;
 396 +       struct resource *mac_res;
 397 +       void __iomem *mac;
 398 +       u32 mac_inc = 0;
 399 +
 400 +       if (eth_mac_set) {
 401 +               dev_err(&pdev->dev, "mac was already set by bootloader\n");
 402 +               return -EINVAL;
 403 +       }
 404 +       mac_res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
 405 +
 406 +       if (!mac_res) {
 407 +               dev_err(&pdev->dev, "failed to load mac\n");
 408 +               return -EINVAL;
 409 +       }
 410 +       if (resource_size(mac_res) != 6) {
 411 +               dev_err(&pdev->dev, "mac has an invalid size\n");
 412 +               return -EINVAL;
 413 +       }
 414 +       mac = ioremap(mac_res->start, resource_size(mac_res));
 415 +       memcpy_fromio(eth_mac, mac, 6);
 416 +
 417 +       if (!of_property_read_u32(np, "mac-increment", &mac_inc))
 418 +               eth_mac[5] += mac_inc;
 419 +
 420 +       return 0;
 421 +}
 422 +
 423 +static struct of_device_id eth_mac_ids[] = {
 424 +       { .compatible = "lantiq,eth-mac" },
 425 +       { /* sentinel */ }
 426 +};
 427 +
 428 +static struct platform_driver eth_mac_driver = {
 429 +       .driver         = {
 430 +               .name           = "lantiq,eth-mac",
 431 +               .owner  = THIS_MODULE,
 432 +               .of_match_table = of_match_ptr(eth_mac_ids),
 433 +       },
 434 +};
 435 +
 436 +static int __init of_eth_mac_init(void)
 437 +{
 438 +       return platform_driver_probe(&eth_mac_driver, of_eth_mac_probe);
 439 +}
 440 +device_initcall(of_eth_mac_init);
 441 --- /dev/null
 442 +++ b/arch/mips/lantiq/xway/pci-ath-fixup.c
 443 @@ -0,0 +1,118 @@
 444 +/*
 445 + *  Atheros AP94 reference board PCI initialization
 446 + *
 447 + *  Copyright (C) 2009-2010 Gabor Juhos <juhosg@openwrt.org>
 448 + *
 449 + *  This program is free software; you can redistribute it and/or modify it
 450 + *  under the terms of the GNU General Public License version 2 as published
 451 + *  by the Free Software Foundation.
 452 + */
 453 +
 454 +#include <linux/pci.h>
 455 +#include <linux/init.h>
 456 +#include <linux/delay.h>
 457 +#include <lantiq_soc.h>
 458 +
 459 +struct ath_fixup {
 460 +       u16             *cal_data;
 461 +       unsigned        slot;
 462 +};
 463 +
 464 +static int ath_num_fixups;
 465 +static struct ath_fixup ath_fixups[2];
 466 +
 467 +static void ath_pci_fixup(struct pci_dev *dev)
 468 +{
 469 +       void __iomem *mem;
 470 +       struct pci_dev *bridge = pci_upstream_bridge(dev);
 471 +       u16 *cal_data = NULL;
 472 +       u16 cmd;
 473 +       u32 bar0;
 474 +       u32 val;
 475 +       u32 base;
 476 +       unsigned i;
 477 +
 478 +       for (i = 0; i < ath_num_fixups; i++) {
 479 +               if (ath_fixups[i].cal_data == NULL)
 480 +                       continue;
 481 +
 482 +               if (ath_fixups[i].slot != PCI_SLOT(dev->devfn))
 483 +                       continue;
 484 +
 485 +               cal_data = ath_fixups[i].cal_data;
 486 +               break;
 487 +       }
 488 +
 489 +       if (cal_data == NULL)
 490 +               return;
 491 +
 492 +       if (*cal_data != 0xa55a) {
 493 +               pr_err("pci %s: invalid calibration data\n", pci_name(dev));
 494 +               return;
 495 +       }
 496 +
 497 +       pr_info("pci %s: fixup device configuration\n", pci_name(dev));
 498 +
 499 +       base = dev->resource[0].start;
 500 +       mem = ioremap(base, 0x10000);
 501 +       if (!mem) {
 502 +               pr_err("pci %s: ioremap error\n", pci_name(dev));
 503 +               return;
 504 +       }
 505 +
 506 +       if (bridge) {
 507 +               pci_enable_device(dev);
 508 +       }
 509 +
 510 +       pci_read_config_dword(dev, PCI_BASE_ADDRESS_0, &bar0);
 511 +       pci_write_config_dword(dev, PCI_BASE_ADDRESS_0, base);
 512 +       pci_read_config_word(dev, PCI_COMMAND, &cmd);
 513 +       cmd |= PCI_COMMAND_MASTER | PCI_COMMAND_MEMORY;
 514 +       pci_write_config_word(dev, PCI_COMMAND, cmd);
 515 +
 516 +       /* set pointer to first reg address */
 517 +       cal_data += 3;
 518 +       while (*cal_data != 0xffff) {
 519 +               u32 reg;
 520 +               reg = *cal_data++;
 521 +               val = *cal_data++;
 522 +               val |= (*cal_data++) << 16;
 523 +
 524 +               ltq_w32(swab32(val), mem + reg);
 525 +               udelay(100);
 526 +       }
 527 +
 528 +       pci_read_config_dword(dev, PCI_VENDOR_ID, &val);
 529 +       dev->vendor = val & 0xffff;
 530 +       dev->device = (val >> 16) & 0xffff;
 531 +
 532 +       pci_read_config_dword(dev, PCI_CLASS_REVISION, &val);
 533 +       dev->revision = val & 0xff;
 534 +       dev->class = val >> 8; /* upper 3 bytes */
 535 +
 536 +       pr_info("pci %s: fixup info: [%04x:%04x] revision %02x class %#08x\n",
 537 +               pci_name(dev), dev->vendor, dev->device, dev->revision, dev->class);
 538 +
 539 +       pci_read_config_word(dev, PCI_COMMAND, &cmd);
 540 +       cmd &= ~(PCI_COMMAND_MASTER | PCI_COMMAND_MEMORY);
 541 +       pci_write_config_word(dev, PCI_COMMAND, cmd);
 542 +
 543 +       pci_write_config_dword(dev, PCI_BASE_ADDRESS_0, bar0);
 544 +
 545 +       if (bridge) {
 546 +               pci_disable_device(dev);
 547 +       }
 548 +
 549 +       iounmap(mem);
 550 +}
 551 +DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_ATHEROS, PCI_ANY_ID, ath_pci_fixup);
 552 +
 553 +void __init ltq_pci_ath_fixup(unsigned slot, u16 *cal_data)
 554 +{
 555 +       if (ath_num_fixups >= ARRAY_SIZE(ath_fixups))
 556 +               return;
 557 +
 558 +       ath_fixups[ath_num_fixups].slot = slot;
 559 +       ath_fixups[ath_num_fixups].cal_data = cal_data;
 560 +       ath_num_fixups++;
 561 +}
 562 --- /dev/null
 563 +++ b/arch/mips/lantiq/xway/rt_eep.c
 564 @@ -0,0 +1,60 @@
 565 +/*
 566 + *  Copyright (C) 2011 John Crispin <blogic@openwrt.org>
 567 + *
 568 + *  This program is free software; you can redistribute it and/or modify it
 569 + *  under the terms of the GNU General Public License version 2 as published
 570 + *  by the Free Software Foundation.
 571 + */
 572 +
 573 +#include <linux/init.h>
 574 +#include <linux/module.h>
 575 +#include <linux/pci.h>
 576 +#include <linux/platform_device.h>
 577 +#include <linux/rt2x00_platform.h>
 578 +
 579 +extern int (*ltq_pci_plat_dev_init)(struct pci_dev *dev);
 580 +static struct rt2x00_platform_data rt2x00_pdata;
 581 +
 582 +static int rt2x00_pci_plat_dev_init(struct pci_dev *dev)
 583 +{
 584 +       dev->dev.platform_data = &rt2x00_pdata;
 585 +       return 0;
 586 +}
 587 +
 588 +int __init of_ralink_eeprom_probe(struct platform_device *pdev)
 589 +{
 590 +       struct device_node *np = pdev->dev.of_node;
 591 +       const char *eeprom;
 592 +
 593 +       if (of_property_read_string(np, "ralink,eeprom", &eeprom)) {
 594 +               dev_err(&pdev->dev, "failed to load eeprom filename\n");
 595 +               return 0;
 596 +       }
 597 +
 598 +       rt2x00_pdata.eeprom_file_name = kstrdup(eeprom, GFP_KERNEL);
 599 +//     rt2x00_pdata.mac_address = mac;
 600 +       ltq_pci_plat_dev_init = rt2x00_pci_plat_dev_init;
 601 +
 602 +       dev_info(&pdev->dev, "using %s as eeprom\n", eeprom);
 603 +
 604 +       return 0;
 605 +}
 606 +
 607 +static struct of_device_id ralink_eeprom_ids[] = {
 608 +       { .compatible = "ralink,eeprom" },
 609 +       { }
 610 +};
 611 +
 612 +static struct platform_driver ralink_eeprom_driver = {
 613 +       .driver         = {
 614 +               .name           = "ralink,eeprom",
 615 +               .owner  = THIS_MODULE,
 616 +               .of_match_table = of_match_ptr(ralink_eeprom_ids),
 617 +       },
 618 +};
 619 +
 620 +static int __init of_ralink_eeprom_init(void)
 621 +{
 622 +       return platform_driver_probe(&ralink_eeprom_driver, of_ralink_eeprom_probe);
 623 +}
 624 +device_initcall(of_ralink_eeprom_init);
 625 --- a/drivers/net/ethernet/lantiq_etop.c
 626 +++ b/drivers/net/ethernet/lantiq_etop.c
 627 @@ -840,7 +840,11 @@
 628         if (err)
 629                 goto err_hw;
 630
 631 -       memcpy(&mac, &priv->pldata->mac, sizeof(struct sockaddr));
 632 +       memcpy(&mac.sa_data, ltq_get_eth_mac(), ETH_ALEN);
 633 +
 634 +       if (priv->mac && !is_valid_ether_addr(mac.sa_data))
 635 +               memcpy(&mac.sa_data, priv->mac, ETH_ALEN);
 636 +
 637         if (!is_valid_ether_addr(mac.sa_data)) {
 638                 pr_warn("etop: invalid MAC, using random\n");
 639                 eth_random_addr(mac.sa_data);