9789459b1d4d1011b32cd79cc2d8e54fe3641e83
[openwrt/staging/blogic.git] / target / linux / rtl838x / files-5.4 / drivers / net / dsa / rtl83xx / storm.c
1 // SPDX-License-Identifier: GPL-2.0-only
2
3 #include <asm/mach-rtl838x/mach-rtl838x.h>
4 #include "rtl83xx.h"
5
6
7 static void rtl83xx_storm_enable(struct rtl838x_switch_priv *priv, int port, bool enable)
8 {
9 // Enable Storm control for that port for UC, MC, and BC
10 if (enable)
11 sw_w32(0x7, RTL838X_STORM_CTRL_LB_CTRL(port));
12 else
13 sw_w32(0x0, RTL838X_STORM_CTRL_LB_CTRL(port));
14 }
15
16 void __init rtl83xx_storm_control_init(struct rtl838x_switch_priv *priv)
17 {
18 int i;
19
20 pr_info("Enabling Storm control\n");
21 // TICK_PERIOD_PPS
22 if (priv->id == 0x8380)
23 sw_w32_mask(0x3ff << 20, 434 << 20, RTL838X_SCHED_LB_TICK_TKN_CTRL_0);
24
25 // Set burst rate
26 sw_w32(0x00008000, RTL838X_STORM_CTRL_BURST_0); // UC
27 sw_w32(0x80008000, RTL838X_STORM_CTRL_BURST_1); // MC and BC
28
29 // Set burst Packets per Second to 32
30 sw_w32(0x00000020, RTL838X_STORM_CTRL_BURST_PPS_0); // UC
31 sw_w32(0x00200020, RTL838X_STORM_CTRL_BURST_PPS_1); // MC and BC
32
33 // Include IFG in storm control
34 sw_w32_mask(0, BIT(6), RTL838X_STORM_CTRL);
35 // Rate control is based on bytes/s (0 = packets)
36 sw_w32_mask(0, BIT(5), RTL838X_STORM_CTRL);
37 // Bandwidth control includes preamble and IFG (10 Bytes)
38 sw_w32_mask(0, 1, RTL838X_SCHED_CTRL);
39
40 // On SoCs except RTL8382M, set burst size of port egress
41 if (priv->id != 0x8382)
42 sw_w32_mask(0xffff, 0x800, RTL838X_SCHED_LB_THR);
43
44 /* Enable storm control on all ports with a PHY and limit rates,
45 * for UC and MC for both known and unknown addresses */
46 for (i = 0; i < priv->cpu_port; i++) {
47 if (priv->ports[i].phy) {
48 sw_w32(BIT(18) | 0x8000, RTL838X_STORM_CTRL_PORT_UC(i));
49 sw_w32(BIT(18) | 0x8000, RTL838X_STORM_CTRL_PORT_MC(i));
50 sw_w32(0x000, RTL838X_STORM_CTRL_PORT_BC(i));
51 rtl83xx_storm_enable(priv, i, true);
52 }
53 }
54
55 // Attack prevention, enable all attack prevention measures
56 //sw_w32(0x1ffff, RTL838X_ATK_PRVNT_CTRL);
57 /* Attack prevention, drop (bit = 0) problematic packets on all ports.
58 * Setting bit = 1 means: trap to CPU
59 */
60 //sw_w32(0, RTL838X_ATK_PRVNT_ACT);
61 // Enable attack prevention on all ports
62 //sw_w32(0x0fffffff, RTL838X_ATK_PRVNT_PORT_EN);
63 }
64