ar71xx: rb91x: register a gpio-latch platform device
[openwrt/staging/chunkeey.git] / target / linux / ar71xx / files / arch / mips / ath79 / mach-rb91x.c
1 /*
2 * MikroTik RouterBOARD 91X support
3 *
4 * Copyright (C) 2013 Gabor Juhos <juhosg@openwrt.org>
5 *
6 * This program is free software; you can redistribute it and/or modify it
7 * under the terms of the GNU General Public License version 2 as published
8 * by the Free Software Foundation.
9 */
10
11 #define pr_fmt(fmt) "rb91x: " fmt
12
13 #include <linux/phy.h>
14 #include <linux/delay.h>
15 #include <linux/platform_device.h>
16 #include <linux/ath9k_platform.h>
17 #include <linux/mtd/mtd.h>
18 #include <linux/mtd/nand.h>
19 #include <linux/mtd/partitions.h>
20 #include <linux/spi/spi.h>
21 #include <linux/spi/74x164.h>
22 #include <linux/spi/flash.h>
23 #include <linux/routerboot.h>
24 #include <linux/gpio.h>
25 #include <linux/platform_data/gpio-latch.h>
26
27 #include <asm/prom.h>
28 #include <asm/mach-ath79/ath79.h>
29 #include <asm/mach-ath79/ath79_spi_platform.h>
30 #include <asm/mach-ath79/ar71xx_regs.h>
31
32 #include "common.h"
33 #include "dev-eth.h"
34 #include "dev-leds-gpio.h"
35 #include "dev-m25p80.h"
36 #include "dev-nfc.h"
37 #include "dev-usb.h"
38 #include "dev-wmac.h"
39 #include "machtypes.h"
40 #include "pci.h"
41 #include "routerboot.h"
42
43 #define RB_ROUTERBOOT_OFFSET 0x0000
44 #define RB_ROUTERBOOT_MIN_SIZE 0xb000
45 #define RB_HARD_CFG_SIZE 0x1000
46 #define RB_BIOS_OFFSET 0xd000
47 #define RB_BIOS_SIZE 0x1000
48 #define RB_SOFT_CFG_OFFSET 0xf000
49 #define RB_SOFT_CFG_SIZE 0x1000
50
51 #define RB91X_FLAG_USB BIT(0)
52 #define RB91X_FLAG_PCIE BIT(1)
53
54 #define RB91X_LATCH_GPIO_BASE AR934X_GPIO_COUNT
55 #define RB91X_LATCH_GPIO(_x) (RB91X_LATCH_GPIO_BASE + (_x))
56
57 struct rb_board_info {
58 const char *name;
59 u32 flags;
60 };
61
62 static struct mtd_partition rb711gr100_spi_partitions[] = {
63 {
64 .name = "routerboot",
65 .offset = RB_ROUTERBOOT_OFFSET,
66 .mask_flags = MTD_WRITEABLE,
67 }, {
68 .name = "hard_config",
69 .size = RB_HARD_CFG_SIZE,
70 .mask_flags = MTD_WRITEABLE,
71 }, {
72 .name = "bios",
73 .offset = RB_BIOS_OFFSET,
74 .size = RB_BIOS_SIZE,
75 .mask_flags = MTD_WRITEABLE,
76 }, {
77 .name = "soft_config",
78 .size = RB_SOFT_CFG_SIZE,
79 }
80 };
81
82 static struct flash_platform_data rb711gr100_spi_flash_data = {
83 .parts = rb711gr100_spi_partitions,
84 .nr_parts = ARRAY_SIZE(rb711gr100_spi_partitions),
85 };
86
87 static int rb711gr100_gpio_latch_gpios[AR934X_GPIO_COUNT] __initdata = {
88 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11,
89 12, 13, 14, 15, 16, 17, 18, 19, 20, 21, 22
90 };
91
92 static struct gpio_latch_platform_data rb711gr100_gpio_latch_data __initdata = {
93 .base = RB91X_LATCH_GPIO_BASE,
94 .num_gpios = ARRAY_SIZE(rb711gr100_gpio_latch_gpios),
95 .gpios = rb711gr100_gpio_latch_gpios,
96 .le_gpio_index = 11,
97 .le_active_low = true,
98 };
99
100 static void __init rb711gr100_init_partitions(const struct rb_info *info)
101 {
102 rb711gr100_spi_partitions[0].size = info->hard_cfg_offs;
103 rb711gr100_spi_partitions[1].offset = info->hard_cfg_offs;
104
105 rb711gr100_spi_partitions[3].offset = info->soft_cfg_offs;
106 }
107
108 void __init rb711gr100_wlan_init(void)
109 {
110 char *caldata;
111 u8 wlan_mac[ETH_ALEN];
112
113 caldata = rb_get_wlan_data();
114 if (caldata == NULL)
115 return;
116
117 ath79_init_mac(wlan_mac, ath79_mac_base, 1);
118 ath79_register_wmac(caldata + 0x1000, wlan_mac);
119
120 kfree(caldata);
121 }
122
123 #define RB_BOARD_INFO(_name, _flags) \
124 { \
125 .name = (_name), \
126 .flags = (_flags), \
127 }
128
129 static const struct rb_board_info rb711gr100_boards[] __initconst = {
130 RB_BOARD_INFO("911G-2HPnD", 0),
131 RB_BOARD_INFO("911G-5HPnD", 0),
132 RB_BOARD_INFO("912UAG-2HPnD", RB91X_FLAG_USB | RB91X_FLAG_PCIE),
133 RB_BOARD_INFO("912UAG-5HPnD", RB91X_FLAG_USB | RB91X_FLAG_PCIE),
134 };
135
136 static u32 rb711gr100_get_flags(const struct rb_info *info)
137 {
138 int i;
139
140 for (i = 0; i < ARRAY_SIZE(rb711gr100_boards); i++) {
141 const struct rb_board_info *bi;
142
143 bi = &rb711gr100_boards[i];
144 if (strcmp(info->board_name, bi->name) == 0)
145 return bi->flags;
146 }
147
148 return 0;
149 }
150
151 static void __init rb711gr100_setup(void)
152 {
153 const struct rb_info *info;
154 char buf[64];
155 u32 flags;
156
157 info = rb_init_info((void *) KSEG1ADDR(0x1f000000), 0x10000);
158 if (!info)
159 return;
160
161 scnprintf(buf, sizeof(buf), "Mikrotik RouterBOARD %s",
162 (info->board_name) ? info->board_name : "");
163 mips_set_machine_name(buf);
164
165 rb711gr100_init_partitions(info);
166 ath79_register_m25p80(&rb711gr100_spi_flash_data);
167
168 ath79_setup_ar934x_eth_cfg(AR934X_ETH_CFG_RGMII_GMAC0 |
169 AR934X_ETH_CFG_SW_ONLY_MODE);
170
171 ath79_register_mdio(0, 0x0);
172
173 ath79_init_mac(ath79_eth0_data.mac_addr, ath79_mac_base, 0);
174 ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_RGMII;
175 ath79_eth0_data.phy_mask = BIT(0);
176 ath79_eth0_pll_data.pll_1000 = 0x02000000;
177
178 ath79_register_eth(0);
179
180 rb711gr100_wlan_init();
181
182 platform_device_register_simple("rb91x-nand", -1, NULL, 0);
183
184 platform_device_register_data(NULL, "gpio-latch", -1,
185 &rb711gr100_gpio_latch_data,
186 sizeof(rb711gr100_gpio_latch_data));
187
188 flags = rb711gr100_get_flags(info);
189
190 if (flags & RB91X_FLAG_USB)
191 ath79_register_usb();
192
193 if (flags & RB91X_FLAG_PCIE)
194 ath79_register_pci();
195
196 }
197
198 MIPS_MACHINE_NONAME(ATH79_MACH_RB_711GR100, "711Gr100", rb711gr100_setup);