6064c9ac4cee9e293913ab8e46746a3d98d18d1e
[openwrt/staging/chunkeey.git] / target / linux / bmips / dts / bcm6318.dtsi
1 // SPDX-License-Identifier: GPL-2.0-or-later
2
3 /dts-v1/;
4
5 #include <dt-bindings/clock/bcm6318-clock.h>
6 #include <dt-bindings/gpio/gpio.h>
7 #include <dt-bindings/input/input.h>
8 #include <dt-bindings/interrupt-controller/bcm6318-interrupt-controller.h>
9 #include <dt-bindings/reset/bcm6318-reset.h>
10 #include <dt-bindings/soc/bcm6318-pm.h>
11
12 / {
13 #address-cells = <1>;
14 #size-cells = <1>;
15 compatible = "brcm,bcm6318";
16
17 aliases {
18 pinctrl = &pinctrl;
19 serial0 = &uart0;
20 spi1 = &hsspi;
21 };
22
23 chosen {
24 bootargs = "earlycon";
25 stdout-path = "serial0:115200n8";
26 };
27
28 clocks {
29 periph_osc: periph-osc {
30 compatible = "fixed-clock";
31
32 #clock-cells = <0>;
33
34 clock-frequency = <50000000>;
35 clock-output-names = "periph";
36 };
37
38 hsspi_osc: hsspi-osc {
39 compatible = "fixed-clock";
40
41 #clock-cells = <0>;
42
43 clock-frequency = <250000000>;
44 clock-output-names = "hsspi_osc";
45 };
46 };
47
48 cpus {
49 #address-cells = <1>;
50 #size-cells = <0>;
51 mips-hpt-frequency = <166500000>;
52
53 cpu@0 {
54 compatible = "brcm,bmips3300", "mips,mips4Kc";
55 device_type = "cpu";
56 reg = <0>;
57 };
58 };
59
60 cpu_intc: interrupt-controller {
61 #address-cells = <0>;
62 compatible = "mti,cpu-interrupt-controller";
63
64 interrupt-controller;
65 #interrupt-cells = <1>;
66 };
67
68 memory@0 {
69 device_type = "memory";
70 reg = <0 0>;
71 };
72
73 ubus {
74 #address-cells = <1>;
75 #size-cells = <1>;
76
77 compatible = "simple-bus";
78 ranges;
79
80 periph_clk: clock-controller@10000004 {
81 compatible = "brcm,bcm6318-clocks";
82 reg = <0x10000004 0x4>;
83 #clock-cells = <1>;
84 };
85
86 ubus_clk: clock-controller@10000008 {
87 compatible = "brcm,bcm6318-ubus-clocks";
88 reg = <0x10000008 0x4>;
89 #clock-cells = <1>;
90 };
91
92 periph_rst: reset-controller@10000010 {
93 compatible = "brcm,bcm6345-reset";
94 reg = <0x10000010 0x4>;
95 #reset-cells = <1>;
96 };
97
98 ext_intc: interrupt-controller@10000018 {
99 #address-cells = <1>;
100 compatible = "brcm,bcm6318-ext-intc";
101 reg = <0x10000018 0x4>;
102
103 interrupt-controller;
104 #interrupt-cells = <2>;
105
106 interrupts = <BCM6318_IRQ_EXT0>,
107 <BCM6318_IRQ_EXT1>,
108 <BCM6318_IRQ_EXT2>,
109 <BCM6318_IRQ_EXT3>;
110 };
111
112 periph_intc: interrupt-controller@10000020 {
113 #address-cells = <1>;
114 compatible = "brcm,bcm6345-l1-intc";
115 reg = <0x10000020 0x20>;
116
117 interrupt-controller;
118 #interrupt-cells = <1>;
119
120 interrupt-parent = <&cpu_intc>;
121 interrupts = <2>, <3>;
122 };
123
124 wdt: watchdog@10000068 {
125 compatible = "brcm,bcm7038-wdt";
126 reg = <0x10000068 0xc>;
127
128 clocks = <&periph_osc>;
129
130 timeout-sec = <30>;
131 };
132
133 pll_cntl: syscon@10000074 {
134 compatible = "syscon", "simple-mfd";
135 reg = <0x10000074 0x4>;
136 native-endian;
137
138 syscon-reboot {
139 compatible = "syscon-reboot";
140 offset = <0>;
141 mask = <0x1>;
142 };
143 };
144
145 gpio: syscon@10000080 {
146 compatible = "syscon", "simple-mfd";
147 reg = <0x10000080 0x80>;
148 native-endian;
149
150 pinctrl: pin-controller {
151 compatible = "brcm,bcm6318-pinctrl";
152
153 gpio-controller;
154 #gpio-cells = <2>;
155
156 interrupts-extended = <&ext_intc 0 0>,
157 <&ext_intc 1 0>;
158 interrupt-names = "gpio33",
159 "gpio34";
160
161 pinctrl_ephy0_spd_led: ephy0_spd_led {
162 function = "ephy0_spd_led";
163 pins = "gpio0";
164 };
165
166 pinctrl_ephy1_spd_led: ephy1_spd_led {
167 function = "ephy1_spd_led";
168 pins = "gpio1";
169 };
170
171 pinctrl_ephy2_spd_led: ephy2_spd_led {
172 function = "ephy2_spd_led";
173 pins = "gpio2";
174 };
175
176 pinctrl_ephy3_spd_led: ephy3_spd_led {
177 function = "ephy3_spd_led";
178 pins = "gpio3";
179 };
180
181 pinctrl_ephy0_act_led: ephy0_act_led {
182 function = "ephy0_act_led";
183 pins = "gpio4";
184 };
185
186 pinctrl_ephy1_act_led: ephy1_act_led {
187 function = "ephy1_act_led";
188 pins = "gpio5";
189 };
190
191 pinctrl_ephy2_act_led: ephy2_act_led {
192 function = "ephy2_act_led";
193 pins = "gpio6";
194 };
195
196 pinctrl_ephy3_act_led: ephy3_act_led {
197 function = "ephy3_act_led";
198 pins = "gpio7";
199 };
200
201 pinctrl_serial_led: serial_led {
202 pinctrl_serial_led_data: serial_led_data {
203 function = "serial_led_data";
204 pins = "gpio6";
205 };
206
207 pinctrl_serial_led_clk: serial_led_clk {
208 function = "serial_led_clk";
209 pins = "gpio7";
210 };
211 };
212
213 pinctrl_inet_act_led: inet_act_led {
214 function = "inet_act_led";
215 pins = "gpio8";
216 };
217
218 pinctrl_inet_fail_led: inet_fail_led {
219 function = "inet_fail_led";
220 pins = "gpio9";
221 };
222
223 pinctrl_dsl_led: dsl_led {
224 function = "dsl_led";
225 pins = "gpio10";
226 };
227
228 pinctrl_post_fail_led: post_fail_led {
229 function = "post_fail_led";
230 pins = "gpio11";
231 };
232
233 pinctrl_wlan_wps_led: wlan_wps_led {
234 function = "wlan_wps_led";
235 pins = "gpio12";
236 };
237
238 pinctrl_usb_pwron: usb_pwron {
239 function = "usb_pwron";
240 pins = "gpio13";
241 };
242
243 pinctrl_usb_device_led: usb_device_led {
244 function = "usb_device_led";
245 pins = "gpio13";
246 };
247
248 pinctrl_usb_active: usb_active {
249 function = "usb_active";
250 pins = "gpio40";
251 };
252 };
253 };
254
255 uart0: serial@10000100 {
256 compatible = "brcm,bcm6345-uart";
257 reg = <0x10000100 0x18>;
258
259 interrupt-parent = <&periph_intc>;
260 interrupts = <BCM6318_IRQ_UART0>;
261
262 clocks = <&periph_osc>;
263 clock-names = "periph";
264
265 status = "disabled";
266 };
267
268 leds: led-controller@10000200 {
269 #address-cells = <1>;
270 #size-cells = <0>;
271 compatible = "brcm,bcm6328-leds";
272 reg = <0x10000200 0x24>;
273
274 status = "disabled";
275 };
276
277 periph_pwr: power-controller@100008e8 {
278 compatible = "brcm,bcm6318-power-controller";
279 reg = <0x100008e8 0x4>;
280
281 #power-domain-cells = <1>;
282 };
283
284 hsspi: spi@10003000 {
285 #address-cells = <1>;
286 #size-cells = <0>;
287 compatible = "brcm,bcm6328-hsspi";
288 reg = <0x10003000 0x600>;
289
290 interrupt-parent = <&periph_intc>;
291 interrupts = <BCM6318_IRQ_HSSPI>;
292
293 clocks = <&periph_clk BCM6318_CLK_HSSPI>,
294 <&hsspi_osc>;
295 clock-names = "hsspi",
296 "pll";
297
298 resets = <&periph_rst BCM6318_RST_SPI>;
299
300 status = "disabled";
301 };
302
303 ehci: usb@10005000 {
304 compatible = "brcm,bcm6318-ehci", "generic-ehci";
305 reg = <0x10005000 0x100>;
306 big-endian;
307 spurious-oc;
308
309 interrupt-parent = <&periph_intc>;
310 interrupts = <BCM6318_IRQ_EHCI>;
311
312 phys = <&usbh 0>;
313 phy-names = "usb";
314
315 status = "disabled";
316 };
317
318 ohci: usb@10005100 {
319 compatible = "brcm,bcm6318-ohci", "generic-ohci";
320 reg = <0x10005100 0x100>;
321 big-endian;
322 no-big-frame-no;
323
324 interrupt-parent = <&periph_intc>;
325 interrupts = <BCM6318_IRQ_OHCI>;
326
327 phys = <&usbh 0>;
328 phy-names = "usb";
329
330 status = "disabled";
331 };
332
333 usbh: usb-phy@10005200 {
334 compatible = "brcm,bcm6318-usbh-phy";
335 reg = <0x10005200 0x38>;
336
337 #phy-cells = <1>;
338
339 clocks = <&periph_clk BCM6318_CLK_USBD>,
340 <&ubus_clk BCM6318_UCLK_USB>;
341 clock-names = "usbh",
342 "usb_ref";
343
344 power-domains = <&periph_pwr BCM6318_POWER_DOMAIN_USB>;
345 resets = <&periph_rst BCM6318_RST_USBH>;
346
347 status = "disabled";
348 };
349
350 pcie: pcie@10010000 {
351 compatible = "brcm,bcm6318-pcie";
352 reg = <0x10010000 0x10000>;
353 #address-cells = <3>;
354 #size-cells = <2>;
355
356 device_type = "pci";
357 bus-range = <0x00 0x01>;
358 ranges = <0x2000000 0 0x10200000 0x10200000 0 0x100000>;
359 linux,pci-probe-only = <1>;
360
361 interrupt-parent = <&periph_intc>;
362 interrupts = <BCM6318_IRQ_PCIE_RC>;
363
364 clocks = <&periph_clk BCM6318_CLK_PCIE>,
365 <&periph_clk BCM6318_CLK_PCIE25>,
366 <&ubus_clk BCM6318_UCLK_PCIE>;
367 clock-names = "pcie",
368 "pcie25",
369 "pcie-ubus";
370
371 resets = <&periph_rst BCM6318_RST_PCIE>,
372 <&periph_rst BCM6318_RST_PCIE_EXT>,
373 <&periph_rst BCM6318_RST_PCIE_CORE>,
374 <&periph_rst BCM6318_RST_PCIE_HARD>;
375 reset-names = "pcie",
376 "pcie-ext",
377 "pcie-core",
378 "pcie-hard";
379
380 power-domains = <&periph_pwr BCM6318_POWER_DOMAIN_PCIE>;
381
382 status = "disabled";
383 };
384
385 switch0: switch@10080000 {
386 #address-cells = <1>;
387 #size-cells = <0>;
388 compatible = "brcm,bcm6328-switch";
389 reg = <0x10080000 0x8000>;
390 big-endian;
391
392 ports {
393 #address-cells = <1>;
394 #size-cells = <0>;
395
396 port@8 {
397 reg = <8>;
398 label = "cpu";
399
400 phy-mode = "internal";
401 ethernet = <&ethernet>;
402
403 fixed-link {
404 speed = <1000>;
405 full-duplex;
406 };
407 };
408 };
409 };
410
411 mdio: mdio@100800b0 {
412 #address-cells = <1>;
413 #size-cells = <0>;
414 compatible = "brcm,bcm6368-mdio-mux";
415 reg = <0x100800b0 0x8>;
416
417 mdio_int: mdio@0 {
418 #address-cells = <1>;
419 #size-cells = <0>;
420 reg = <0>;
421
422 phy1: ethernet-phy@1 {
423 compatible = "ethernet-phy-ieee802.3-c22";
424 reg = <1>;
425 };
426
427 phy2: ethernet-phy@2 {
428 compatible = "ethernet-phy-ieee802.3-c22";
429 reg = <2>;
430 };
431
432 phy3: ethernet-phy@3 {
433 compatible = "ethernet-phy-ieee802.3-c22";
434 reg = <3>;
435 };
436
437 phy4: ethernet-phy@4 {
438 compatible = "ethernet-phy-ieee802.3-c22";
439 reg = <4>;
440 };
441 };
442
443 mdio_ext: mdio@1 {
444 #address-cells = <1>;
445 #size-cells = <0>;
446 reg = <1>;
447 };
448 };
449
450 ethernet: ethernet@10088000 {
451 compatible = "brcm,bcm6318-enetsw";
452 reg = <0x10088000 0x80>,
453 <0x10088200 0x80>,
454 <0x10088400 0x80>;
455 reg-names = "dma",
456 "dma-channels",
457 "dma-sram";
458
459 interrupt-parent = <&periph_intc>;
460 interrupts = <BCM6318_IRQ_ENETSW_RX_DMA0>,
461 <BCM6318_IRQ_ENETSW_TX_DMA0>;
462 interrupt-names = "rx",
463 "tx";
464
465 clocks = <&periph_clk BCM6318_CLK_ROBOSW250>,
466 <&periph_clk BCM6318_CLK_ROBOSW025>,
467 <&ubus_clk BCM6318_UCLK_ROBOSW>;
468
469 resets = <&periph_rst BCM6318_RST_ENETSW>,
470 <&periph_rst BCM6318_RST_EPHY>;
471
472 power-domains = <&periph_pwr BCM6318_POWER_DOMAIN_EPHY0>,
473 <&periph_pwr BCM6318_POWER_DOMAIN_EPHY1>,
474 <&periph_pwr BCM6318_POWER_DOMAIN_EPHY2>,
475 <&periph_pwr BCM6318_POWER_DOMAIN_EPHY3>;
476
477 dma-rx = <0>;
478 dma-tx = <1>;
479
480 status = "disabled";
481 };
482 };
483 };