target/linux/bmips/patches-5.10/068-v5.13-dt-bindings-add-BCM63268-pincontroller-binding-docum.patch

   1 From 9b3303413379af8bed307cd465fe7aa1bc3569ea Mon Sep 17 00:00:00 2001
   2 From: =?UTF-8?q?=C3=81lvaro=20Fern=C3=A1ndez=20Rojas?= <noltari@gmail.com>
   3 Date: Wed, 24 Mar 2021 09:19:18 +0100
   4 Subject: [PATCH 17/22] dt-bindings: add BCM63268 pincontroller binding
   5  documentation
   6 MIME-Version: 1.0
   7 Content-Type: text/plain; charset=UTF-8
   8 Content-Transfer-Encoding: 8bit
   9
  10 Add binding documentation for the pincontrol core found in the BCM63268
  11 family SoCs.
  12
  13 Co-developed-by: Jonas Gorski <jonas.gorski@gmail.com>
  14 Signed-off-by: Jonas Gorski <jonas.gorski@gmail.com>
  15 Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
  16 Reviewed-by: Rob Herring <robh@kernel.org>
  17 Link: https://lore.kernel.org/r/20210324081923.20379-18-noltari@gmail.com
  18 Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
  19 ---
  20  .../pinctrl/brcm,bcm63268-pinctrl.yaml        | 164 ++++++++++++++++++
  21  1 file changed, 164 insertions(+)
  22  create mode 100644 Documentation/devicetree/bindings/pinctrl/brcm,bcm63268-pinctrl.yaml
  23
  24 --- /dev/null
  25 +++ b/Documentation/devicetree/bindings/pinctrl/brcm,bcm63268-pinctrl.yaml
  26 @@ -0,0 +1,164 @@
  27 +# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
  28 +%YAML 1.2
  29 +---
  30 +$id: http://devicetree.org/schemas/pinctrl/brcm,bcm63268-pinctrl.yaml#
  31 +$schema: http://devicetree.org/meta-schemas/core.yaml#
  32 +
  33 +title: Broadcom BCM63268 pin controller
  34 +
  35 +maintainers:
  36 +  - Álvaro Fernández Rojas <noltari@gmail.com>
  37 +  - Jonas Gorski <jonas.gorski@gmail.com>
  38 +
  39 +description:
  40 +  Bindings for Broadcom's BCM63268 memory-mapped pin controller.
  41 +
  42 +properties:
  43 +  compatible:
  44 +    const: brcm,bcm63268-pinctrl
  45 +
  46 +  reg:
  47 +    maxItems: 3
  48 +
  49 +patternProperties:
  50 +  '-pins$':
  51 +    type: object
  52 +    $ref: pinmux-node.yaml#
  53 +
  54 +    properties:
  55 +      function:
  56 +        enum: [ serial_led_clk, serial_led_data, hsspi_cs4, hsspi_cs5,
  57 +                hsspi_cs6, hsspi_cs7, adsl_spi_miso, adsl_spi_mosi,
  58 +                vreq_clk, pcie_clkreq_b, robosw_led_clk, robosw_led_data,
  59 +                nand, gpio35_alt, dectpd, vdsl_phy_override_0,
  60 +                vdsl_phy_override_1, vdsl_phy_override_2,
  61 +                vdsl_phy_override_3, dsl_gpio8, dsl_gpio9 ]
  62 +
  63 +      pins:
  64 +        enum: [ gpio0, gpio1, gpio16, gpio17, gpio8, gpio9, gpio18, gpio19,
  65 +                gpio22, gpio23, gpio30, gpio31, nand_grp, gpio35
  66 +                dectpd_grp, vdsl_phy_override_0_grp,
  67 +                vdsl_phy_override_1_grp, vdsl_phy_override_2_grp,
  68 +                vdsl_phy_override_3_grp, dsl_gpio8, dsl_gpio9 ]
  69 +
  70 +required:
  71 +  - compatible
  72 +  - reg
  73 +
  74 +additionalProperties: false
  75 +
  76 +examples:
  77 +  - |
  78 +    pinctrl@10 {
  79 +      compatible = "brcm,bcm63268-pinctrl";
  80 +      reg = <0x10 0x4>, <0x18 0x8>, <0x38 0x4>;
  81 +
  82 +      pinctrl_serial_led: serial_led-pins {
  83 +        pinctrl_serial_led_clk: serial_led_clk-pins {
  84 +          function = "serial_led_clk";
  85 +          pins = "gpio0";
  86 +        };
  87 +
  88 +        pinctrl_serial_led_data: serial_led_data-pins {
  89 +          function = "serial_led_data";
  90 +          pins = "gpio1";
  91 +        };
  92 +      };
  93 +
  94 +      pinctrl_hsspi_cs4: hsspi_cs4-pins {
  95 +        function = "hsspi_cs4";
  96 +        pins = "gpio16";
  97 +      };
  98 +
  99 +      pinctrl_hsspi_cs5: hsspi_cs5-pins {
 100 +        function = "hsspi_cs5";
 101 +        pins = "gpio17";
 102 +      };
 103 +
 104 +      pinctrl_hsspi_cs6: hsspi_cs6-pins {
 105 +        function = "hsspi_cs6";
 106 +        pins = "gpio8";
 107 +      };
 108 +
 109 +      pinctrl_hsspi_cs7: hsspi_cs7-pins {
 110 +        function = "hsspi_cs7";
 111 +        pins = "gpio9";
 112 +      };
 113 +
 114 +      pinctrl_adsl_spi: adsl_spi-pins {
 115 +        pinctrl_adsl_spi_miso: adsl_spi_miso-pins {
 116 +          function = "adsl_spi_miso";
 117 +          pins = "gpio18";
 118 +        };
 119 +
 120 +        pinctrl_adsl_spi_mosi: adsl_spi_mosi-pins {
 121 +          function = "adsl_spi_mosi";
 122 +          pins = "gpio19";
 123 +        };
 124 +      };
 125 +
 126 +      pinctrl_vreq_clk: vreq_clk-pins {
 127 +        function = "vreq_clk";
 128 +        pins = "gpio22";
 129 +      };
 130 +
 131 +      pinctrl_pcie_clkreq_b: pcie_clkreq_b-pins {
 132 +        function = "pcie_clkreq_b";
 133 +        pins = "gpio23";
 134 +      };
 135 +
 136 +      pinctrl_robosw_led_clk: robosw_led_clk-pins {
 137 +        function = "robosw_led_clk";
 138 +        pins = "gpio30";
 139 +      };
 140 +
 141 +      pinctrl_robosw_led_data: robosw_led_data-pins {
 142 +        function = "robosw_led_data";
 143 +        pins = "gpio31";
 144 +      };
 145 +
 146 +      pinctrl_nand: nand-pins {
 147 +        function = "nand";
 148 +        group = "nand_grp";
 149 +      };
 150 +
 151 +      pinctrl_gpio35_alt: gpio35_alt-pins {
 152 +        function = "gpio35_alt";
 153 +        pin = "gpio35";
 154 +      };
 155 +
 156 +      pinctrl_dectpd: dectpd-pins {
 157 +        function = "dectpd";
 158 +        group = "dectpd_grp";
 159 +      };
 160 +
 161 +      pinctrl_vdsl_phy_override_0: vdsl_phy_override_0-pins {
 162 +        function = "vdsl_phy_override_0";
 163 +        group = "vdsl_phy_override_0_grp";
 164 +      };
 165 +
 166 +      pinctrl_vdsl_phy_override_1: vdsl_phy_override_1-pins {
 167 +        function = "vdsl_phy_override_1";
 168 +        group = "vdsl_phy_override_1_grp";
 169 +      };
 170 +
 171 +      pinctrl_vdsl_phy_override_2: vdsl_phy_override_2-pins {
 172 +        function = "vdsl_phy_override_2";
 173 +        group = "vdsl_phy_override_2_grp";
 174 +      };
 175 +
 176 +      pinctrl_vdsl_phy_override_3: vdsl_phy_override_3-pins {
 177 +        function = "vdsl_phy_override_3";
 178 +        group = "vdsl_phy_override_3_grp";
 179 +      };
 180 +
 181 +      pinctrl_dsl_gpio8: dsl_gpio8-pins {
 182 +        function = "dsl_gpio8";
 183 +        group = "dsl_gpio8";
 184 +      };
 185 +
 186 +      pinctrl_dsl_gpio9: dsl_gpio9-pins {
 187 +        function = "dsl_gpio9";
 188 +        group = "dsl_gpio9";
 189 +      };
 190 +    };