target/linux/generic/files/drivers/net/phy/ar8216.c

   1 /*
   2  * ar8216.c: AR8216 switch driver
   3  *
   4  * Copyright (C) 2009 Felix Fietkau <nbd@openwrt.org>
   5  *
   6  * This program is free software; you can redistribute it and/or
   7  * modify it under the terms of the GNU General Public License
   8  * as published by the Free Software Foundation; either version 2
   9  * of the License, or (at your option) any later version.
  10  *
  11  * This program is distributed in the hope that it will be useful,
  12  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  13  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  14  * GNU General Public License for more details.
  15  */
  16
  17 #include <linux/if.h>
  18 #include <linux/module.h>
  19 #include <linux/init.h>
  20 #include <linux/list.h>
  21 #include <linux/if_ether.h>
  22 #include <linux/skbuff.h>
  23 #include <linux/netdevice.h>
  24 #include <linux/netlink.h>
  25 #include <linux/bitops.h>
  26 #include <net/genetlink.h>
  27 #include <linux/switch.h>
  28 #include <linux/delay.h>
  29 #include <linux/phy.h>
  30 #include <linux/netdevice.h>
  31 #include <linux/etherdevice.h>
  32 #include <linux/lockdep.h>
  33 #include "ar8216.h"
  34
  35 /* size of the vlan table */
  36 #define AR8X16_MAX_VLANS        128
  37 #define AR8X16_PROBE_RETRIES    10
  38
  39 struct ar8216_priv;
  40
  41 #define AR8XXX_CAP_GIGE         BIT(0)
  42
  43 struct ar8xxx_chip {
  44         unsigned long caps;
  45
  46         int (*hw_init)(struct ar8216_priv *priv);
  47         void (*init_globals)(struct ar8216_priv *priv);
  48         void (*init_port)(struct ar8216_priv *priv, int port);
  49         void (*setup_port)(struct ar8216_priv *priv, int port, u32 egress,
  50                            u32 ingress, u32 members, u32 pvid);
  51         int (*atu_flush)(struct ar8216_priv *priv);
  52         void (*vtu_flush)(struct ar8216_priv *priv);
  53         void (*vtu_load_vlan)(struct ar8216_priv *priv, u32 vid, u32 port_mask);
  54 };
  55
  56 struct ar8216_priv {
  57         struct switch_dev dev;
  58         struct phy_device *phy;
  59         u32 (*read)(struct ar8216_priv *priv, int reg);
  60         void (*write)(struct ar8216_priv *priv, int reg, u32 val);
  61         const struct net_device_ops *ndo_old;
  62         struct net_device_ops ndo;
  63         struct mutex reg_mutex;
  64         int chip_type;
  65         const struct ar8xxx_chip *chip;
  66         bool initialized;
  67         bool port4_phy;
  68         char buf[80];
  69
  70         bool init;
  71
  72         /* all fields below are cleared on reset */
  73         bool vlan;
  74         u16 vlan_id[AR8X16_MAX_VLANS];
  75         u8 vlan_table[AR8X16_MAX_VLANS];
  76         u8 vlan_tagged;
  77         u16 pvid[AR8216_NUM_PORTS];
  78 };
  79
  80 #define to_ar8216(_dev) container_of(_dev, struct ar8216_priv, dev)
  81
  82 static inline bool ar8xxx_has_gige(struct ar8216_priv *priv)
  83 {
  84         return priv->chip->caps & AR8XXX_CAP_GIGE;
  85 }
  86
  87 static inline void
  88 split_addr(u32 regaddr, u16 *r1, u16 *r2, u16 *page)
  89 {
  90         regaddr >>= 1;
  91         *r1 = regaddr & 0x1e;
  92
  93         regaddr >>= 5;
  94         *r2 = regaddr & 0x7;
  95
  96         regaddr >>= 3;
  97         *page = regaddr & 0x1ff;
  98 }
  99
 100 static u32
 101 ar8216_mii_read(struct ar8216_priv *priv, int reg)
 102 {
 103         struct phy_device *phy = priv->phy;
 104         struct mii_bus *bus = phy->bus;
 105         u16 r1, r2, page;
 106         u16 lo, hi;
 107
 108         split_addr((u32) reg, &r1, &r2, &page);
 109
 110         mutex_lock(&bus->mdio_lock);
 111
 112         bus->write(bus, 0x18, 0, page);
 113         usleep_range(1000, 2000); /* wait for the page switch to propagate */
 114         lo = bus->read(bus, 0x10 | r2, r1);
 115         hi = bus->read(bus, 0x10 | r2, r1 + 1);
 116
 117         mutex_unlock(&bus->mdio_lock);
 118
 119         return (hi << 16) | lo;
 120 }
 121
 122 static void
 123 ar8216_mii_write(struct ar8216_priv *priv, int reg, u32 val)
 124 {
 125         struct phy_device *phy = priv->phy;
 126         struct mii_bus *bus = phy->bus;
 127         u16 r1, r2, r3;
 128         u16 lo, hi;
 129
 130         split_addr((u32) reg, &r1, &r2, &r3);
 131         lo = val & 0xffff;
 132         hi = (u16) (val >> 16);
 133
 134         mutex_lock(&bus->mdio_lock);
 135
 136         bus->write(bus, 0x18, 0, r3);
 137         usleep_range(1000, 2000); /* wait for the page switch to propagate */
 138         bus->write(bus, 0x10 | r2, r1 + 1, hi);
 139         bus->write(bus, 0x10 | r2, r1, lo);
 140
 141         mutex_unlock(&bus->mdio_lock);
 142 }
 143
 144 static void
 145 ar8216_phy_dbg_write(struct ar8216_priv *priv, int phy_addr,
 146                      u16 dbg_addr, u16 dbg_data)
 147 {
 148         struct mii_bus *bus = priv->phy->bus;
 149
 150         mutex_lock(&bus->mdio_lock);
 151         bus->write(bus, phy_addr, MII_ATH_DBG_ADDR, dbg_addr);
 152         bus->write(bus, phy_addr, MII_ATH_DBG_DATA, dbg_data);
 153         mutex_unlock(&bus->mdio_lock);
 154 }
 155
 156 static u32
 157 ar8216_rmw(struct ar8216_priv *priv, int reg, u32 mask, u32 val)
 158 {
 159         u32 v;
 160
 161         lockdep_assert_held(&priv->reg_mutex);
 162
 163         v = priv->read(priv, reg);
 164         v &= ~mask;
 165         v |= val;
 166         priv->write(priv, reg, v);
 167
 168         return v;
 169 }
 170
 171 static void
 172 ar8216_read_port_link(struct ar8216_priv *priv, int port,
 173                       struct switch_port_link *link)
 174 {
 175         u32 status;
 176         u32 speed;
 177
 178         memset(link, '\0', sizeof(*link));
 179
 180         status = priv->read(priv, AR8216_REG_PORT_STATUS(port));
 181
 182         link->aneg = !!(status & AR8216_PORT_STATUS_LINK_AUTO);
 183         if (link->aneg) {
 184                 link->link = !!(status & AR8216_PORT_STATUS_LINK_UP);
 185                 if (!link->link)
 186                         return;
 187         } else {
 188                 link->link = true;
 189         }
 190
 191         link->duplex = !!(status & AR8216_PORT_STATUS_DUPLEX);
 192         link->tx_flow = !!(status & AR8216_PORT_STATUS_TXFLOW);
 193         link->rx_flow = !!(status & AR8216_PORT_STATUS_RXFLOW);
 194
 195         speed = (status & AR8216_PORT_STATUS_SPEED) >>
 196                  AR8216_PORT_STATUS_SPEED_S;
 197
 198         switch (speed) {
 199         case AR8216_PORT_SPEED_10M:
 200                 link->speed = SWITCH_PORT_SPEED_10;
 201                 break;
 202         case AR8216_PORT_SPEED_100M:
 203                 link->speed = SWITCH_PORT_SPEED_100;
 204                 break;
 205         case AR8216_PORT_SPEED_1000M:
 206                 link->speed = SWITCH_PORT_SPEED_1000;
 207                 break;
 208         default:
 209                 link->speed = SWITCH_PORT_SPEED_UNKNOWN;
 210                 break;
 211         }
 212 }
 213
 214 static int
 215 ar8216_set_vlan(struct switch_dev *dev, const struct switch_attr *attr,
 216                 struct switch_val *val)
 217 {
 218         struct ar8216_priv *priv = to_ar8216(dev);
 219         priv->vlan = !!val->value.i;
 220         return 0;
 221 }
 222
 223 static int
 224 ar8216_get_vlan(struct switch_dev *dev, const struct switch_attr *attr,
 225                 struct switch_val *val)
 226 {
 227         struct ar8216_priv *priv = to_ar8216(dev);
 228         val->value.i = priv->vlan;
 229         return 0;
 230 }
 231
 232
 233 static int
 234 ar8216_set_pvid(struct switch_dev *dev, int port, int vlan)
 235 {
 236         struct ar8216_priv *priv = to_ar8216(dev);
 237
 238         /* make sure no invalid PVIDs get set */
 239
 240         if (vlan >= dev->vlans)
 241                 return -EINVAL;
 242
 243         priv->pvid[port] = vlan;
 244         return 0;
 245 }
 246
 247 static int
 248 ar8216_get_pvid(struct switch_dev *dev, int port, int *vlan)
 249 {
 250         struct ar8216_priv *priv = to_ar8216(dev);
 251         *vlan = priv->pvid[port];
 252         return 0;
 253 }
 254
 255 static int
 256 ar8216_set_vid(struct switch_dev *dev, const struct switch_attr *attr,
 257                struct switch_val *val)
 258 {
 259         struct ar8216_priv *priv = to_ar8216(dev);
 260         priv->vlan_id[val->port_vlan] = val->value.i;
 261         return 0;
 262 }
 263
 264 static int
 265 ar8216_get_vid(struct switch_dev *dev, const struct switch_attr *attr,
 266                struct switch_val *val)
 267 {
 268         struct ar8216_priv *priv = to_ar8216(dev);
 269         val->value.i = priv->vlan_id[val->port_vlan];
 270         return 0;
 271 }
 272
 273 static int
 274 ar8216_get_port_link(struct switch_dev *dev, int port,
 275                      struct switch_port_link *link)
 276 {
 277         struct ar8216_priv *priv = to_ar8216(dev);
 278
 279         ar8216_read_port_link(priv, port, link);
 280         return 0;
 281 }
 282
 283 static int
 284 ar8216_mangle_tx(struct sk_buff *skb, struct net_device *dev)
 285 {
 286         struct ar8216_priv *priv = dev->phy_ptr;
 287         unsigned char *buf;
 288
 289         if (unlikely(!priv))
 290                 goto error;
 291
 292         if (!priv->vlan)
 293                 goto send;
 294
 295         if (unlikely(skb_headroom(skb) < 2)) {
 296                 if (pskb_expand_head(skb, 2, 0, GFP_ATOMIC) < 0)
 297                         goto error;
 298         }
 299
 300         buf = skb_push(skb, 2);
 301         buf[0] = 0x10;
 302         buf[1] = 0x80;
 303
 304 send:
 305         return priv->ndo_old->ndo_start_xmit(skb, dev);
 306
 307 error:
 308         dev_kfree_skb_any(skb);
 309         return 0;
 310 }
 311
 312 static int
 313 ar8216_mangle_rx(struct sk_buff *skb, int napi)
 314 {
 315         struct ar8216_priv *priv;
 316         struct net_device *dev;
 317         unsigned char *buf;
 318         int port, vlan;
 319
 320         dev = skb->dev;
 321         if (!dev)
 322                 goto error;
 323
 324         priv = dev->phy_ptr;
 325         if (!priv)
 326                 goto error;
 327
 328         /* don't strip the header if vlan mode is disabled */
 329         if (!priv->vlan)
 330                 goto recv;
 331
 332         /* strip header, get vlan id */
 333         buf = skb->data;
 334         skb_pull(skb, 2);
 335
 336         /* check for vlan header presence */
 337         if ((buf[12 + 2] != 0x81) || (buf[13 + 2] != 0x00))
 338                 goto recv;
 339
 340         port = buf[0] & 0xf;
 341
 342         /* no need to fix up packets coming from a tagged source */
 343         if (priv->vlan_tagged & (1 << port))
 344                 goto recv;
 345
 346         /* lookup port vid from local table, the switch passes an invalid vlan id */
 347         vlan = priv->vlan_id[priv->pvid[port]];
 348
 349         buf[14 + 2] &= 0xf0;
 350         buf[14 + 2] |= vlan >> 8;
 351         buf[15 + 2] = vlan & 0xff;
 352
 353 recv:
 354         skb->protocol = eth_type_trans(skb, skb->dev);
 355
 356         if (napi)
 357                 return netif_receive_skb(skb);
 358         else
 359                 return netif_rx(skb);
 360
 361 error:
 362         /* no vlan? eat the packet! */
 363         dev_kfree_skb_any(skb);
 364         return NET_RX_DROP;
 365 }
 366
 367 static int
 368 ar8216_netif_rx(struct sk_buff *skb)
 369 {
 370         return ar8216_mangle_rx(skb, 0);
 371 }
 372
 373 static int
 374 ar8216_netif_receive_skb(struct sk_buff *skb)
 375 {
 376         return ar8216_mangle_rx(skb, 1);
 377 }
 378
 379
 380 static struct switch_attr ar8216_globals[] = {
 381         {
 382                 .type = SWITCH_TYPE_INT,
 383                 .name = "enable_vlan",
 384                 .description = "Enable VLAN mode",
 385                 .set = ar8216_set_vlan,
 386                 .get = ar8216_get_vlan,
 387                 .max = 1
 388         },
 389 };
 390
 391 static struct switch_attr ar8216_port[] = {
 392 };
 393
 394 static struct switch_attr ar8216_vlan[] = {
 395         {
 396                 .type = SWITCH_TYPE_INT,
 397                 .name = "vid",
 398                 .description = "VLAN ID (0-4094)",
 399                 .set = ar8216_set_vid,
 400                 .get = ar8216_get_vid,
 401                 .max = 4094,
 402         },
 403 };
 404
 405
 406 static int
 407 ar8216_get_ports(struct switch_dev *dev, struct switch_val *val)
 408 {
 409         struct ar8216_priv *priv = to_ar8216(dev);
 410         u8 ports = priv->vlan_table[val->port_vlan];
 411         int i;
 412
 413         val->len = 0;
 414         for (i = 0; i < AR8216_NUM_PORTS; i++) {
 415                 struct switch_port *p;
 416
 417                 if (!(ports & (1 << i)))
 418                         continue;
 419
 420                 p = &val->value.ports[val->len++];
 421                 p->id = i;
 422                 if (priv->vlan_tagged & (1 << i))
 423                         p->flags = (1 << SWITCH_PORT_FLAG_TAGGED);
 424                 else
 425                         p->flags = 0;
 426         }
 427         return 0;
 428 }
 429
 430 static int
 431 ar8216_set_ports(struct switch_dev *dev, struct switch_val *val)
 432 {
 433         struct ar8216_priv *priv = to_ar8216(dev);
 434         u8 *vt = &priv->vlan_table[val->port_vlan];
 435         int i, j;
 436
 437         *vt = 0;
 438         for (i = 0; i < val->len; i++) {
 439                 struct switch_port *p = &val->value.ports[i];
 440
 441                 if (p->flags & (1 << SWITCH_PORT_FLAG_TAGGED)) {
 442                         priv->vlan_tagged |= (1 << p->id);
 443                 } else {
 444                         priv->vlan_tagged &= ~(1 << p->id);
 445                         priv->pvid[p->id] = val->port_vlan;
 446
 447                         /* make sure that an untagged port does not
 448                          * appear in other vlans */
 449                         for (j = 0; j < AR8X16_MAX_VLANS; j++) {
 450                                 if (j == val->port_vlan)
 451                                         continue;
 452                                 priv->vlan_table[j] &= ~(1 << p->id);
 453                         }
 454                 }
 455
 456                 *vt |= 1 << p->id;
 457         }
 458         return 0;
 459 }
 460
 461 static int
 462 ar8216_wait_bit(struct ar8216_priv *priv, int reg, u32 mask, u32 val)
 463 {
 464         int timeout = 20;
 465         u32 t = 0;
 466
 467         while (1) {
 468                 t = priv->read(priv, reg);
 469                 if ((t & mask) == val)
 470                         return 0;
 471
 472                 if (timeout-- <= 0)
 473                         break;
 474
 475                 udelay(10);
 476         }
 477
 478         pr_err("ar8216: timeout on reg %08x: %08x & %08x != %08x\n",
 479                (unsigned int) reg, t, mask, val);
 480         return -ETIMEDOUT;
 481 }
 482
 483 static void
 484 ar8216_vtu_op(struct ar8216_priv *priv, u32 op, u32 val)
 485 {
 486         if (ar8216_wait_bit(priv, AR8216_REG_VTU, AR8216_VTU_ACTIVE, 0))
 487                 return;
 488         if ((op & AR8216_VTU_OP) == AR8216_VTU_OP_LOAD) {
 489                 val &= AR8216_VTUDATA_MEMBER;
 490                 val |= AR8216_VTUDATA_VALID;
 491                 priv->write(priv, AR8216_REG_VTU_DATA, val);
 492         }
 493         op |= AR8216_VTU_ACTIVE;
 494         priv->write(priv, AR8216_REG_VTU, op);
 495 }
 496
 497 static void
 498 ar8216_vtu_flush(struct ar8216_priv *priv)
 499 {
 500         ar8216_vtu_op(priv, AR8216_VTU_OP_FLUSH, 0);
 501 }
 502
 503 static void
 504 ar8216_vtu_load_vlan(struct ar8216_priv *priv, u32 vid, u32 port_mask)
 505 {
 506         u32 op;
 507
 508         op = AR8216_VTU_OP_LOAD | (vid << AR8216_VTU_VID_S);
 509         ar8216_vtu_op(priv, op, port_mask);
 510 }
 511
 512 static int
 513 ar8216_atu_flush(struct ar8216_priv *priv)
 514 {
 515         int ret;
 516
 517         ret = ar8216_wait_bit(priv, AR8216_REG_ATU, AR8216_ATU_ACTIVE, 0);
 518         if (!ret)
 519                 priv->write(priv, AR8216_REG_ATU, AR8216_ATU_OP_FLUSH);
 520
 521         return ret;
 522 }
 523
 524 static void
 525 ar8216_setup_port(struct ar8216_priv *priv, int port, u32 egress, u32 ingress,
 526                   u32 members, u32 pvid)
 527 {
 528         u32 header;
 529
 530         if (priv->vlan && port == AR8216_PORT_CPU && priv->chip_type == AR8216)
 531                 header = AR8216_PORT_CTRL_HEADER;
 532         else
 533                 header = 0;
 534
 535         ar8216_rmw(priv, AR8216_REG_PORT_CTRL(port),
 536                    AR8216_PORT_CTRL_LEARN | AR8216_PORT_CTRL_VLAN_MODE |
 537                    AR8216_PORT_CTRL_SINGLE_VLAN | AR8216_PORT_CTRL_STATE |
 538                    AR8216_PORT_CTRL_HEADER | AR8216_PORT_CTRL_LEARN_LOCK,
 539                    AR8216_PORT_CTRL_LEARN | header |
 540                    (egress << AR8216_PORT_CTRL_VLAN_MODE_S) |
 541                    (AR8216_PORT_STATE_FORWARD << AR8216_PORT_CTRL_STATE_S));
 542
 543         ar8216_rmw(priv, AR8216_REG_PORT_VLAN(port),
 544                    AR8216_PORT_VLAN_DEST_PORTS | AR8216_PORT_VLAN_MODE |
 545                    AR8216_PORT_VLAN_DEFAULT_ID,
 546                    (members << AR8216_PORT_VLAN_DEST_PORTS_S) |
 547                    (ingress << AR8216_PORT_VLAN_MODE_S) |
 548                    (pvid << AR8216_PORT_VLAN_DEFAULT_ID_S));
 549 }
 550
 551 static void
 552 ar8236_setup_port(struct ar8216_priv *priv, int port, u32 egress, u32 ingress,
 553                   u32 members, u32 pvid)
 554 {
 555         ar8216_rmw(priv, AR8216_REG_PORT_CTRL(port),
 556                    AR8216_PORT_CTRL_LEARN | AR8216_PORT_CTRL_VLAN_MODE |
 557                    AR8216_PORT_CTRL_SINGLE_VLAN | AR8216_PORT_CTRL_STATE |
 558                    AR8216_PORT_CTRL_HEADER | AR8216_PORT_CTRL_LEARN_LOCK,
 559                    AR8216_PORT_CTRL_LEARN |
 560                    (egress << AR8216_PORT_CTRL_VLAN_MODE_S) |
 561                    (AR8216_PORT_STATE_FORWARD << AR8216_PORT_CTRL_STATE_S));
 562
 563         ar8216_rmw(priv, AR8236_REG_PORT_VLAN(port),
 564                    AR8236_PORT_VLAN_DEFAULT_ID,
 565                    (pvid << AR8236_PORT_VLAN_DEFAULT_ID_S));
 566
 567         ar8216_rmw(priv, AR8236_REG_PORT_VLAN2(port),
 568                    AR8236_PORT_VLAN2_VLAN_MODE |
 569                    AR8236_PORT_VLAN2_MEMBER,
 570                    (ingress << AR8236_PORT_VLAN2_VLAN_MODE_S) |
 571                    (members << AR8236_PORT_VLAN2_MEMBER_S));
 572 }
 573
 574 static int
 575 ar8216_hw_apply(struct switch_dev *dev)
 576 {
 577         struct ar8216_priv *priv = to_ar8216(dev);
 578         u8 portmask[AR8216_NUM_PORTS];
 579         int i, j;
 580
 581         mutex_lock(&priv->reg_mutex);
 582         /* flush all vlan translation unit entries */
 583         priv->chip->vtu_flush(priv);
 584
 585         memset(portmask, 0, sizeof(portmask));
 586         if (!priv->init) {
 587                 /* calculate the port destination masks and load vlans
 588                  * into the vlan translation unit */
 589                 for (j = 0; j < AR8X16_MAX_VLANS; j++) {
 590                         u8 vp = priv->vlan_table[j];
 591
 592                         if (!vp)
 593                                 continue;
 594
 595                         for (i = 0; i < AR8216_NUM_PORTS; i++) {
 596                                 u8 mask = (1 << i);
 597                                 if (vp & mask)
 598                                         portmask[i] |= vp & ~mask;
 599                         }
 600
 601                         priv->chip->vtu_load_vlan(priv, priv->vlan_id[j],
 602                                                  priv->vlan_table[j]);
 603                 }
 604         } else {
 605                 /* vlan disabled:
 606                  * isolate all ports, but connect them to the cpu port */
 607                 for (i = 0; i < AR8216_NUM_PORTS; i++) {
 608                         if (i == AR8216_PORT_CPU)
 609                                 continue;
 610
 611                         portmask[i] = 1 << AR8216_PORT_CPU;
 612                         portmask[AR8216_PORT_CPU] |= (1 << i);
 613                 }
 614         }
 615
 616         /* update the port destination mask registers and tag settings */
 617         for (i = 0; i < AR8216_NUM_PORTS; i++) {
 618                 int egress, ingress;
 619                 int pvid;
 620
 621                 if (priv->vlan) {
 622                         pvid = priv->vlan_id[priv->pvid[i]];
 623                         if (priv->vlan_tagged & (1 << i))
 624                                 egress = AR8216_OUT_ADD_VLAN;
 625                         else
 626                                 egress = AR8216_OUT_STRIP_VLAN;
 627                         ingress = AR8216_IN_SECURE;
 628                 } else {
 629                         pvid = i;
 630                         egress = AR8216_OUT_KEEP;
 631                         ingress = AR8216_IN_PORT_ONLY;
 632                 }
 633
 634                 priv->chip->setup_port(priv, i, egress, ingress, portmask[i],
 635                                        pvid);
 636         }
 637         mutex_unlock(&priv->reg_mutex);
 638         return 0;
 639 }
 640
 641 static int
 642 ar8216_hw_init(struct ar8216_priv *priv)
 643 {
 644         return 0;
 645 }
 646
 647 static int
 648 ar8236_hw_init(struct ar8216_priv *priv)
 649 {
 650         int i;
 651         struct mii_bus *bus;
 652
 653         if (priv->initialized)
 654                 return 0;
 655
 656         /* Initialize the PHYs */
 657         bus = priv->phy->bus;
 658         for (i = 0; i < 5; i++) {
 659                 mdiobus_write(bus, i, MII_ADVERTISE,
 660                               ADVERTISE_ALL | ADVERTISE_PAUSE_CAP |
 661                               ADVERTISE_PAUSE_ASYM);
 662                 mdiobus_write(bus, i, MII_BMCR, BMCR_RESET | BMCR_ANENABLE);
 663         }
 664         msleep(1000);
 665
 666         priv->initialized = true;
 667         return 0;
 668 }
 669
 670 static int
 671 ar8316_hw_init(struct ar8216_priv *priv)
 672 {
 673         int i;
 674         u32 val, newval;
 675         struct mii_bus *bus;
 676
 677         val = priv->read(priv, 0x8);
 678
 679         if (priv->phy->interface == PHY_INTERFACE_MODE_RGMII) {
 680                 if (priv->port4_phy) {
 681                         /* value taken from Ubiquiti RouterStation Pro */
 682                         newval = 0x81461bea;
 683                         printk(KERN_INFO "ar8316: Using port 4 as PHY\n");
 684                 } else {
 685                         newval = 0x01261be2;
 686                         printk(KERN_INFO "ar8316: Using port 4 as switch port\n");
 687                 }
 688         } else if (priv->phy->interface == PHY_INTERFACE_MODE_GMII) {
 689                 /* value taken from AVM Fritz!Box 7390 sources */
 690                 newval = 0x010e5b71;
 691         } else {
 692                 /* no known value for phy interface */
 693                 printk(KERN_ERR "ar8316: unsupported mii mode: %d.\n",
 694                         priv->phy->interface);
 695                 return -EINVAL;
 696         }
 697
 698         if (val == newval)
 699                 goto out;
 700
 701         priv->write(priv, 0x8, newval);
 702
 703         /* Initialize the ports */
 704         bus = priv->phy->bus;
 705         for (i = 0; i < 5; i++) {
 706                 if ((i == 4) && priv->port4_phy &&
 707                     priv->phy->interface == PHY_INTERFACE_MODE_RGMII) {
 708                         /* work around for phy4 rgmii mode */
 709                         ar8216_phy_dbg_write(priv, i, 0x12, 0x480c);
 710                         /* rx delay */
 711                         ar8216_phy_dbg_write(priv, i, 0x0, 0x824e);
 712                         /* tx delay */
 713                         ar8216_phy_dbg_write(priv, i, 0x5, 0x3d47);
 714                         msleep(1000);
 715                 }
 716
 717                 /* initialize the port itself */
 718                 mdiobus_write(bus, i, MII_ADVERTISE,
 719                         ADVERTISE_ALL | ADVERTISE_PAUSE_CAP | ADVERTISE_PAUSE_ASYM);
 720                 mdiobus_write(bus, i, MII_CTRL1000, ADVERTISE_1000FULL);
 721                 mdiobus_write(bus, i, MII_BMCR, BMCR_RESET | BMCR_ANENABLE);
 722                 msleep(1000);
 723         }
 724
 725 out:
 726         priv->initialized = true;
 727         return 0;
 728 }
 729
 730 static void
 731 ar8216_init_globals(struct ar8216_priv *priv)
 732 {
 733         /* standard atheros magic */
 734         priv->write(priv, 0x38, 0xc000050e);
 735
 736         ar8216_rmw(priv, AR8216_REG_GLOBAL_CTRL,
 737                    AR8216_GCTRL_MTU, 1518 + 8 + 2);
 738 }
 739
 740 static void
 741 ar8236_init_globals(struct ar8216_priv *priv)
 742 {
 743         /* enable jumbo frames */
 744         ar8216_rmw(priv, AR8216_REG_GLOBAL_CTRL,
 745                    AR8316_GCTRL_MTU, 9018 + 8 + 2);
 746 }
 747
 748 static void
 749 ar8316_init_globals(struct ar8216_priv *priv)
 750 {
 751         /* standard atheros magic */
 752         priv->write(priv, 0x38, 0xc000050e);
 753
 754         /* enable cpu port to receive multicast and broadcast frames */
 755         priv->write(priv, AR8216_REG_FLOOD_MASK, 0x003f003f);
 756
 757         /* enable jumbo frames */
 758         ar8216_rmw(priv, AR8216_REG_GLOBAL_CTRL,
 759                    AR8316_GCTRL_MTU, 9018 + 8 + 2);
 760 }
 761
 762 static void
 763 ar8216_init_port(struct ar8216_priv *priv, int port)
 764 {
 765         /* Enable port learning and tx */
 766         priv->write(priv, AR8216_REG_PORT_CTRL(port),
 767                 AR8216_PORT_CTRL_LEARN |
 768                 (4 << AR8216_PORT_CTRL_STATE_S));
 769
 770         priv->write(priv, AR8216_REG_PORT_VLAN(port), 0);
 771
 772         if (port == AR8216_PORT_CPU) {
 773                 priv->write(priv, AR8216_REG_PORT_STATUS(port),
 774                         AR8216_PORT_STATUS_LINK_UP |
 775                         ar8xxx_has_gige(priv) ? AR8216_PORT_SPEED_1000M :
 776                                                 AR8216_PORT_SPEED_100M |
 777                         AR8216_PORT_STATUS_TXMAC |
 778                         AR8216_PORT_STATUS_RXMAC |
 779                         ((priv->chip_type == AR8316) ? AR8216_PORT_STATUS_RXFLOW : 0) |
 780                         ((priv->chip_type == AR8316) ? AR8216_PORT_STATUS_TXFLOW : 0) |
 781                         AR8216_PORT_STATUS_DUPLEX);
 782         } else {
 783                 priv->write(priv, AR8216_REG_PORT_STATUS(port),
 784                         AR8216_PORT_STATUS_LINK_AUTO);
 785         }
 786 }
 787
 788 static const struct ar8xxx_chip ar8216_chip = {
 789         .hw_init = ar8216_hw_init,
 790         .init_globals = ar8216_init_globals,
 791         .init_port = ar8216_init_port,
 792         .setup_port = ar8216_setup_port,
 793         .atu_flush = ar8216_atu_flush,
 794         .vtu_flush = ar8216_vtu_flush,
 795         .vtu_load_vlan = ar8216_vtu_load_vlan,
 796 };
 797
 798 static const struct ar8xxx_chip ar8236_chip = {
 799         .hw_init = ar8236_hw_init,
 800         .init_globals = ar8236_init_globals,
 801         .init_port = ar8216_init_port,
 802         .setup_port = ar8236_setup_port,
 803         .atu_flush = ar8216_atu_flush,
 804         .vtu_flush = ar8216_vtu_flush,
 805         .vtu_load_vlan = ar8216_vtu_load_vlan,
 806 };
 807
 808 static const struct ar8xxx_chip ar8316_chip = {
 809         .caps = AR8XXX_CAP_GIGE,
 810         .hw_init = ar8316_hw_init,
 811         .init_globals = ar8316_init_globals,
 812         .init_port = ar8216_init_port,
 813         .setup_port = ar8216_setup_port,
 814         .atu_flush = ar8216_atu_flush,
 815         .vtu_flush = ar8216_vtu_flush,
 816         .vtu_load_vlan = ar8216_vtu_load_vlan,
 817 };
 818
 819 static int
 820 ar8216_reset_switch(struct switch_dev *dev)
 821 {
 822         struct ar8216_priv *priv = to_ar8216(dev);
 823         int i;
 824
 825         mutex_lock(&priv->reg_mutex);
 826         memset(&priv->vlan, 0, sizeof(struct ar8216_priv) -
 827                 offsetof(struct ar8216_priv, vlan));
 828
 829         for (i = 0; i < AR8X16_MAX_VLANS; i++)
 830                 priv->vlan_id[i] = i;
 831
 832         /* Configure all ports */
 833         for (i = 0; i < AR8216_NUM_PORTS; i++)
 834                 priv->chip->init_port(priv, i);
 835
 836         ar8216_init_globals(priv);
 837         mutex_unlock(&priv->reg_mutex);
 838
 839         return ar8216_hw_apply(dev);
 840 }
 841
 842 static const struct switch_dev_ops ar8216_sw_ops = {
 843         .attr_global = {
 844                 .attr = ar8216_globals,
 845                 .n_attr = ARRAY_SIZE(ar8216_globals),
 846         },
 847         .attr_port = {
 848                 .attr = ar8216_port,
 849                 .n_attr = ARRAY_SIZE(ar8216_port),
 850         },
 851         .attr_vlan = {
 852                 .attr = ar8216_vlan,
 853                 .n_attr = ARRAY_SIZE(ar8216_vlan),
 854         },
 855         .get_port_pvid = ar8216_get_pvid,
 856         .set_port_pvid = ar8216_set_pvid,
 857         .get_vlan_ports = ar8216_get_ports,
 858         .set_vlan_ports = ar8216_set_ports,
 859         .apply_config = ar8216_hw_apply,
 860         .reset_switch = ar8216_reset_switch,
 861         .get_port_link = ar8216_get_port_link,
 862 };
 863
 864 static int
 865 ar8216_id_chip(struct ar8216_priv *priv)
 866 {
 867         u32 val;
 868         u16 id;
 869         int i;
 870
 871         priv->chip_type = UNKNOWN;
 872
 873         val = ar8216_mii_read(priv, AR8216_REG_CTRL);
 874         if (val == ~0)
 875                 return -ENODEV;
 876
 877         id = val & (AR8216_CTRL_REVISION | AR8216_CTRL_VERSION);
 878         for (i = 0; i < AR8X16_PROBE_RETRIES; i++) {
 879                 u16 t;
 880
 881                 val = ar8216_mii_read(priv, AR8216_REG_CTRL);
 882                 if (val == ~0)
 883                         return -ENODEV;
 884
 885                 t = val & (AR8216_CTRL_REVISION | AR8216_CTRL_VERSION);
 886                 if (t != id)
 887                         return -ENODEV;
 888         }
 889
 890         switch (id) {
 891         case 0x0101:
 892                 priv->chip_type = AR8216;
 893                 priv->chip = &ar8216_chip;
 894                 break;
 895         case 0x0301:
 896                 priv->chip_type = AR8236;
 897                 priv->chip = &ar8236_chip;
 898                 break;
 899         case 0x1000:
 900         case 0x1001:
 901                 priv->chip_type = AR8316;
 902                 priv->chip = &ar8316_chip;
 903                 break;
 904         default:
 905                 printk(KERN_DEBUG
 906                         "ar8216: Unknown Atheros device [ver=%d, rev=%d, phy_id=%04x%04x]\n",
 907                         (int)(id >> AR8216_CTRL_VERSION_S),
 908                         (int)(id & AR8216_CTRL_REVISION),
 909                         mdiobus_read(priv->phy->bus, priv->phy->addr, 2),
 910                         mdiobus_read(priv->phy->bus, priv->phy->addr, 3));
 911
 912                 return -ENODEV;
 913         }
 914
 915         return 0;
 916 }
 917
 918 static int
 919 ar8216_config_init(struct phy_device *pdev)
 920 {
 921         struct ar8216_priv *priv = pdev->priv;
 922         struct net_device *dev = pdev->attached_dev;
 923         struct switch_dev *swdev;
 924         int ret;
 925
 926         if (!priv) {
 927                 priv = kzalloc(sizeof(struct ar8216_priv), GFP_KERNEL);
 928                 if (priv == NULL)
 929                         return -ENOMEM;
 930         }
 931
 932         priv->phy = pdev;
 933
 934         ret = ar8216_id_chip(priv);
 935         if (ret)
 936                 goto err_free_priv;
 937
 938         if (pdev->addr != 0) {
 939                 if (ar8xxx_has_gige(priv)) {
 940                         pdev->supported |= SUPPORTED_1000baseT_Full;
 941                         pdev->advertising |= ADVERTISED_1000baseT_Full;
 942                 }
 943
 944                 if (priv->chip_type == AR8316) {
 945                         /* check if we're attaching to the switch twice */
 946                         pdev = pdev->bus->phy_map[0];
 947                         if (!pdev) {
 948                                 kfree(priv);
 949                                 return 0;
 950                         }
 951
 952                         /* switch device has not been initialized, reuse priv */
 953                         if (!pdev->priv) {
 954                                 priv->port4_phy = true;
 955                                 pdev->priv = priv;
 956                                 return 0;
 957                         }
 958
 959                         kfree(priv);
 960
 961                         /* switch device has been initialized, reinit */
 962                         priv = pdev->priv;
 963                         priv->dev.ports = (AR8216_NUM_PORTS - 1);
 964                         priv->initialized = false;
 965                         priv->port4_phy = true;
 966                         ar8316_hw_init(priv);
 967                         return 0;
 968                 }
 969
 970                 kfree(priv);
 971                 return 0;
 972         }
 973
 974         printk(KERN_INFO "%s: AR%d switch driver attached.\n",
 975                 pdev->attached_dev->name, priv->chip_type);
 976
 977         if (ar8xxx_has_gige(priv))
 978                 pdev->supported = SUPPORTED_1000baseT_Full;
 979         else
 980                 pdev->supported = SUPPORTED_100baseT_Full;
 981         pdev->advertising = pdev->supported;
 982
 983         mutex_init(&priv->reg_mutex);
 984         priv->read = ar8216_mii_read;
 985         priv->write = ar8216_mii_write;
 986
 987         pdev->priv = priv;
 988
 989         swdev = &priv->dev;
 990         swdev->cpu_port = AR8216_PORT_CPU;
 991         swdev->ops = &ar8216_sw_ops;
 992         swdev->ports = AR8216_NUM_PORTS;
 993
 994         if (priv->chip_type == AR8316) {
 995                 swdev->name = "Atheros AR8316";
 996                 swdev->vlans = AR8X16_MAX_VLANS;
 997
 998                 if (priv->port4_phy) {
 999                         /* port 5 connected to the other mac, therefore unusable */
1000                         swdev->ports = (AR8216_NUM_PORTS - 1);
1001                 }
1002         } else if (priv->chip_type == AR8236) {
1003                 swdev->name = "Atheros AR8236";
1004                 swdev->vlans = AR8216_NUM_VLANS;
1005                 swdev->ports = AR8216_NUM_PORTS;
1006         } else {
1007                 swdev->name = "Atheros AR8216";
1008                 swdev->vlans = AR8216_NUM_VLANS;
1009         }
1010
1011         ret = register_switch(&priv->dev, pdev->attached_dev);
1012         if (ret)
1013                 goto err_free_priv;
1014
1015         priv->init = true;
1016
1017         ret = priv->chip->hw_init(priv);
1018         if (ret)
1019                 goto err_free_priv;
1020
1021         ret = ar8216_reset_switch(&priv->dev);
1022         if (ret)
1023                 goto err_free_priv;
1024
1025         dev->phy_ptr = priv;
1026
1027         /* VID fixup only needed on ar8216 */
1028         if (pdev->addr == 0 && priv->chip_type == AR8216) {
1029                 pdev->pkt_align = 2;
1030                 pdev->netif_receive_skb = ar8216_netif_receive_skb;
1031                 pdev->netif_rx = ar8216_netif_rx;
1032                 priv->ndo_old = dev->netdev_ops;
1033                 memcpy(&priv->ndo, priv->ndo_old, sizeof(struct net_device_ops));
1034                 priv->ndo.ndo_start_xmit = ar8216_mangle_tx;
1035                 dev->netdev_ops = &priv->ndo;
1036         }
1037
1038         priv->init = false;
1039
1040         return 0;
1041
1042 err_free_priv:
1043         kfree(priv);
1044         return ret;
1045 }
1046
1047 static int
1048 ar8216_read_status(struct phy_device *phydev)
1049 {
1050         struct ar8216_priv *priv = phydev->priv;
1051         struct switch_port_link link;
1052         int ret;
1053
1054         if (phydev->addr != 0)
1055                 return genphy_read_status(phydev);
1056
1057         ar8216_read_port_link(priv, phydev->addr, &link);
1058         phydev->link = !!link.link;
1059         if (!phydev->link)
1060                 return 0;
1061
1062         switch (link.speed) {
1063         case SWITCH_PORT_SPEED_10:
1064                 phydev->speed = SPEED_10;
1065                 break;
1066         case SWITCH_PORT_SPEED_100:
1067                 phydev->speed = SPEED_100;
1068                 break;
1069         case SWITCH_PORT_SPEED_1000:
1070                 phydev->speed = SPEED_1000;
1071                 break;
1072         default:
1073                 phydev->speed = 0;
1074         }
1075         phydev->duplex = link.duplex ? DUPLEX_FULL : DUPLEX_HALF;
1076
1077         /* flush the address translation unit */
1078         mutex_lock(&priv->reg_mutex);
1079         ret = priv->chip->atu_flush(priv);
1080         mutex_unlock(&priv->reg_mutex);
1081
1082         phydev->state = PHY_RUNNING;
1083         netif_carrier_on(phydev->attached_dev);
1084         phydev->adjust_link(phydev->attached_dev);
1085
1086         return ret;
1087 }
1088
1089 static int
1090 ar8216_config_aneg(struct phy_device *phydev)
1091 {
1092         if (phydev->addr == 0)
1093                 return 0;
1094
1095         return genphy_config_aneg(phydev);
1096 }
1097
1098 static int
1099 ar8216_probe(struct phy_device *pdev)
1100 {
1101         struct ar8216_priv priv;
1102
1103         priv.phy = pdev;
1104         return ar8216_id_chip(&priv);
1105 }
1106
1107 static void
1108 ar8216_remove(struct phy_device *pdev)
1109 {
1110         struct ar8216_priv *priv = pdev->priv;
1111         struct net_device *dev = pdev->attached_dev;
1112
1113         if (!priv)
1114                 return;
1115
1116         if (priv->ndo_old && dev)
1117                 dev->netdev_ops = priv->ndo_old;
1118         if (pdev->addr == 0)
1119                 unregister_switch(&priv->dev);
1120         kfree(priv);
1121 }
1122
1123 static struct phy_driver ar8216_driver = {
1124         .phy_id         = 0x004d0000,
1125         .name           = "Atheros AR8216/AR8236/AR8316",
1126         .phy_id_mask    = 0xffff0000,
1127         .features       = PHY_BASIC_FEATURES,
1128         .probe          = ar8216_probe,
1129         .remove         = ar8216_remove,
1130         .config_init    = &ar8216_config_init,
1131         .config_aneg    = &ar8216_config_aneg,
1132         .read_status    = &ar8216_read_status,
1133         .driver         = { .owner = THIS_MODULE },
1134 };
1135
1136 int __init
1137 ar8216_init(void)
1138 {
1139         return phy_driver_register(&ar8216_driver);
1140 }
1141
1142 void __exit
1143 ar8216_exit(void)
1144 {
1145         phy_driver_unregister(&ar8216_driver);
1146 }
1147
1148 module_init(ar8216_init);
1149 module_exit(ar8216_exit);
1150 MODULE_LICENSE("GPL");
1151