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32f55576735eaa88011b47446985f387f9498072
[openwrt/staging/chunkeey.git] / target / linux / generic / patches-3.0 / 020-ssb_update.patch
1 --- a/drivers/ssb/b43_pci_bridge.c
2 +++ b/drivers/ssb/b43_pci_bridge.c
3 @@ -5,12 +5,13 @@
4 * because of its small size we include it in the SSB core
5 * instead of creating a standalone module.
6 *
7 - * Copyright 2007 Michael Buesch <mb@bu3sch.de>
8 + * Copyright 2007 Michael Buesch <m@bues.ch>
9 *
10 * Licensed under the GNU/GPL. See COPYING for details.
11 */
12
13 #include <linux/pci.h>
14 +#include <linux/module.h>
15 #include <linux/ssb/ssb.h>
16
17 #include "ssb_private.h"
18 --- a/drivers/ssb/driver_chipcommon.c
19 +++ b/drivers/ssb/driver_chipcommon.c
20 @@ -3,7 +3,7 @@
21 * Broadcom ChipCommon core driver
22 *
23 * Copyright 2005, Broadcom Corporation
24 - * Copyright 2006, 2007, Michael Buesch <mb@bu3sch.de>
25 + * Copyright 2006, 2007, Michael Buesch <m@bues.ch>
26 *
27 * Licensed under the GNU/GPL. See COPYING for details.
28 */
29 --- a/drivers/ssb/driver_chipcommon_pmu.c
30 +++ b/drivers/ssb/driver_chipcommon_pmu.c
31 @@ -2,7 +2,7 @@
32 * Sonics Silicon Backplane
33 * Broadcom ChipCommon Power Management Unit driver
34 *
35 - * Copyright 2009, Michael Buesch <mb@bu3sch.de>
36 + * Copyright 2009, Michael Buesch <m@bues.ch>
37 * Copyright 2007, Broadcom Corporation
38 *
39 * Licensed under the GNU/GPL. See COPYING for details.
40 @@ -417,9 +417,9 @@ static void ssb_pmu_resources_init(struc
41 u32 min_msk = 0, max_msk = 0;
42 unsigned int i;
43 const struct pmu_res_updown_tab_entry *updown_tab = NULL;
44 - unsigned int updown_tab_size;
45 + unsigned int updown_tab_size = 0;
46 const struct pmu_res_depend_tab_entry *depend_tab = NULL;
47 - unsigned int depend_tab_size;
48 + unsigned int depend_tab_size = 0;
49
50 switch (bus->chip_id) {
51 case 0x4312:
52 --- a/drivers/ssb/driver_extif.c
53 +++ b/drivers/ssb/driver_extif.c
54 @@ -3,7 +3,7 @@
55 * Broadcom EXTIF core driver
56 *
57 * Copyright 2005, Broadcom Corporation
58 - * Copyright 2006, 2007, Michael Buesch <mb@bu3sch.de>
59 + * Copyright 2006, 2007, Michael Buesch <m@bues.ch>
60 * Copyright 2006, 2007, Felix Fietkau <nbd@openwrt.org>
61 * Copyright 2007, Aurelien Jarno <aurelien@aurel32.net>
62 *
63 --- a/drivers/ssb/driver_gige.c
64 +++ b/drivers/ssb/driver_gige.c
65 @@ -3,7 +3,7 @@
66 * Broadcom Gigabit Ethernet core driver
67 *
68 * Copyright 2008, Broadcom Corporation
69 - * Copyright 2008, Michael Buesch <mb@bu3sch.de>
70 + * Copyright 2008, Michael Buesch <m@bues.ch>
71 *
72 * Licensed under the GNU/GPL. See COPYING for details.
73 */
74 @@ -106,8 +106,9 @@ void gige_pcicfg_write32(struct ssb_gige
75 gige_write32(dev, SSB_GIGE_PCICFG + offset, value);
76 }
77
78 -static int ssb_gige_pci_read_config(struct pci_bus *bus, unsigned int devfn,
79 - int reg, int size, u32 *val)
80 +static int __devinit ssb_gige_pci_read_config(struct pci_bus *bus,
81 + unsigned int devfn, int reg,
82 + int size, u32 *val)
83 {
84 struct ssb_gige *dev = container_of(bus->ops, struct ssb_gige, pci_ops);
85 unsigned long flags;
86 @@ -136,8 +137,9 @@ static int ssb_gige_pci_read_config(stru
87 return PCIBIOS_SUCCESSFUL;
88 }
89
90 -static int ssb_gige_pci_write_config(struct pci_bus *bus, unsigned int devfn,
91 - int reg, int size, u32 val)
92 +static int __devinit ssb_gige_pci_write_config(struct pci_bus *bus,
93 + unsigned int devfn, int reg,
94 + int size, u32 val)
95 {
96 struct ssb_gige *dev = container_of(bus->ops, struct ssb_gige, pci_ops);
97 unsigned long flags;
98 @@ -166,7 +168,8 @@ static int ssb_gige_pci_write_config(str
99 return PCIBIOS_SUCCESSFUL;
100 }
101
102 -static int ssb_gige_probe(struct ssb_device *sdev, const struct ssb_device_id *id)
103 +static int __devinit ssb_gige_probe(struct ssb_device *sdev,
104 + const struct ssb_device_id *id)
105 {
106 struct ssb_gige *dev;
107 u32 base, tmslow, tmshigh;
108 --- a/drivers/ssb/driver_mipscore.c
109 +++ b/drivers/ssb/driver_mipscore.c
110 @@ -3,7 +3,7 @@
111 * Broadcom MIPS core driver
112 *
113 * Copyright 2005, Broadcom Corporation
114 - * Copyright 2006, 2007, Michael Buesch <mb@bu3sch.de>
115 + * Copyright 2006, 2007, Michael Buesch <m@bues.ch>
116 *
117 * Licensed under the GNU/GPL. See COPYING for details.
118 */
119 --- a/drivers/ssb/driver_pcicore.c
120 +++ b/drivers/ssb/driver_pcicore.c
121 @@ -3,7 +3,7 @@
122 * Broadcom PCI-core driver
123 *
124 * Copyright 2005, Broadcom Corporation
125 - * Copyright 2006, 2007, Michael Buesch <mb@bu3sch.de>
126 + * Copyright 2006, 2007, Michael Buesch <m@bues.ch>
127 *
128 * Licensed under the GNU/GPL. See COPYING for details.
129 */
130 @@ -314,7 +314,7 @@ int ssb_pcicore_pcibios_map_irq(const st
131 return ssb_mips_irq(extpci_core->dev) + 2;
132 }
133
134 -static void ssb_pcicore_init_hostmode(struct ssb_pcicore *pc)
135 +static void __devinit ssb_pcicore_init_hostmode(struct ssb_pcicore *pc)
136 {
137 u32 val;
138
139 @@ -379,7 +379,7 @@ static void ssb_pcicore_init_hostmode(st
140 register_pci_controller(&ssb_pcicore_controller);
141 }
142
143 -static int pcicore_is_in_hostmode(struct ssb_pcicore *pc)
144 +static int __devinit pcicore_is_in_hostmode(struct ssb_pcicore *pc)
145 {
146 struct ssb_bus *bus = pc->dev->bus;
147 u16 chipid_top;
148 @@ -412,7 +412,7 @@ static int pcicore_is_in_hostmode(struct
149 * Workarounds.
150 **************************************************/
151
152 -static void ssb_pcicore_fix_sprom_core_index(struct ssb_pcicore *pc)
153 +static void __devinit ssb_pcicore_fix_sprom_core_index(struct ssb_pcicore *pc)
154 {
155 u16 tmp = pcicore_read16(pc, SSB_PCICORE_SPROM(0));
156 if (((tmp & 0xF000) >> 12) != pc->dev->core_index) {
157 @@ -514,12 +514,16 @@ static void ssb_pcicore_pcie_setup_worka
158 * Generic and Clientmode operation code.
159 **************************************************/
160
161 -static void ssb_pcicore_init_clientmode(struct ssb_pcicore *pc)
162 +static void __devinit ssb_pcicore_init_clientmode(struct ssb_pcicore *pc)
163 {
164 - ssb_pcicore_fix_sprom_core_index(pc);
165 + struct ssb_device *pdev = pc->dev;
166 + struct ssb_bus *bus = pdev->bus;
167 +
168 + if (bus->bustype == SSB_BUSTYPE_PCI)
169 + ssb_pcicore_fix_sprom_core_index(pc);
170
171 /* Disable PCI interrupts. */
172 - ssb_write32(pc->dev, SSB_INTVEC, 0);
173 + ssb_write32(pdev, SSB_INTVEC, 0);
174
175 /* Additional PCIe always once-executed workarounds */
176 if (pc->dev->id.coreid == SSB_DEV_PCIE) {
177 @@ -529,7 +533,7 @@ static void ssb_pcicore_init_clientmode(
178 }
179 }
180
181 -void ssb_pcicore_init(struct ssb_pcicore *pc)
182 +void __devinit ssb_pcicore_init(struct ssb_pcicore *pc)
183 {
184 struct ssb_device *dev = pc->dev;
185
186 --- a/drivers/ssb/embedded.c
187 +++ b/drivers/ssb/embedded.c
188 @@ -3,7 +3,7 @@
189 * Embedded systems support code
190 *
191 * Copyright 2005-2008, Broadcom Corporation
192 - * Copyright 2006-2008, Michael Buesch <mb@bu3sch.de>
193 + * Copyright 2006-2008, Michael Buesch <m@bues.ch>
194 *
195 * Licensed under the GNU/GPL. See COPYING for details.
196 */
197 --- a/drivers/ssb/main.c
198 +++ b/drivers/ssb/main.c
199 @@ -3,7 +3,7 @@
200 * Subsystem core
201 *
202 * Copyright 2005, Broadcom Corporation
203 - * Copyright 2006, 2007, Michael Buesch <mb@bu3sch.de>
204 + * Copyright 2006, 2007, Michael Buesch <m@bues.ch>
205 *
206 * Licensed under the GNU/GPL. See COPYING for details.
207 */
208 @@ -12,6 +12,7 @@
209
210 #include <linux/delay.h>
211 #include <linux/io.h>
212 +#include <linux/module.h>
213 #include <linux/ssb/ssb.h>
214 #include <linux/ssb/ssb_regs.h>
215 #include <linux/ssb/ssb_driver_gige.h>
216 @@ -557,7 +558,7 @@ error:
217 }
218
219 /* Needs ssb_buses_lock() */
220 -static int ssb_attach_queued_buses(void)
221 +static int __devinit ssb_attach_queued_buses(void)
222 {
223 struct ssb_bus *bus, *n;
224 int err = 0;
225 @@ -768,9 +769,9 @@ out:
226 return err;
227 }
228
229 -static int ssb_bus_register(struct ssb_bus *bus,
230 - ssb_invariants_func_t get_invariants,
231 - unsigned long baseaddr)
232 +static int __devinit ssb_bus_register(struct ssb_bus *bus,
233 + ssb_invariants_func_t get_invariants,
234 + unsigned long baseaddr)
235 {
236 int err;
237
238 @@ -851,8 +852,8 @@ err_disable_xtal:
239 }
240
241 #ifdef CONFIG_SSB_PCIHOST
242 -int ssb_bus_pcibus_register(struct ssb_bus *bus,
243 - struct pci_dev *host_pci)
244 +int __devinit ssb_bus_pcibus_register(struct ssb_bus *bus,
245 + struct pci_dev *host_pci)
246 {
247 int err;
248
249 @@ -875,9 +876,9 @@ EXPORT_SYMBOL(ssb_bus_pcibus_register);
250 #endif /* CONFIG_SSB_PCIHOST */
251
252 #ifdef CONFIG_SSB_PCMCIAHOST
253 -int ssb_bus_pcmciabus_register(struct ssb_bus *bus,
254 - struct pcmcia_device *pcmcia_dev,
255 - unsigned long baseaddr)
256 +int __devinit ssb_bus_pcmciabus_register(struct ssb_bus *bus,
257 + struct pcmcia_device *pcmcia_dev,
258 + unsigned long baseaddr)
259 {
260 int err;
261
262 @@ -897,8 +898,9 @@ EXPORT_SYMBOL(ssb_bus_pcmciabus_register
263 #endif /* CONFIG_SSB_PCMCIAHOST */
264
265 #ifdef CONFIG_SSB_SDIOHOST
266 -int ssb_bus_sdiobus_register(struct ssb_bus *bus, struct sdio_func *func,
267 - unsigned int quirks)
268 +int __devinit ssb_bus_sdiobus_register(struct ssb_bus *bus,
269 + struct sdio_func *func,
270 + unsigned int quirks)
271 {
272 int err;
273
274 @@ -918,9 +920,9 @@ int ssb_bus_sdiobus_register(struct ssb_
275 EXPORT_SYMBOL(ssb_bus_sdiobus_register);
276 #endif /* CONFIG_SSB_PCMCIAHOST */
277
278 -int ssb_bus_ssbbus_register(struct ssb_bus *bus,
279 - unsigned long baseaddr,
280 - ssb_invariants_func_t get_invariants)
281 +int __devinit ssb_bus_ssbbus_register(struct ssb_bus *bus,
282 + unsigned long baseaddr,
283 + ssb_invariants_func_t get_invariants)
284 {
285 int err;
286
287 @@ -1001,8 +1003,8 @@ u32 ssb_calc_clock_rate(u32 plltype, u32
288 switch (plltype) {
289 case SSB_PLLTYPE_6: /* 100/200 or 120/240 only */
290 if (m & SSB_CHIPCO_CLK_T6_MMASK)
291 - return SSB_CHIPCO_CLK_T6_M0;
292 - return SSB_CHIPCO_CLK_T6_M1;
293 + return SSB_CHIPCO_CLK_T6_M1;
294 + return SSB_CHIPCO_CLK_T6_M0;
295 case SSB_PLLTYPE_1: /* 48Mhz base, 3 dividers */
296 case SSB_PLLTYPE_3: /* 25Mhz, 2 dividers */
297 case SSB_PLLTYPE_4: /* 48Mhz, 4 dividers */
298 @@ -1259,13 +1261,34 @@ void ssb_device_disable(struct ssb_devic
299 }
300 EXPORT_SYMBOL(ssb_device_disable);
301
302 +/* Some chipsets need routing known for PCIe and 64-bit DMA */
303 +static bool ssb_dma_translation_special_bit(struct ssb_device *dev)
304 +{
305 + u16 chip_id = dev->bus->chip_id;
306 +
307 + if (dev->id.coreid == SSB_DEV_80211) {
308 + return (chip_id == 0x4322 || chip_id == 43221 ||
309 + chip_id == 43231 || chip_id == 43222);
310 + }
311 +
312 + return 0;
313 +}
314 +
315 u32 ssb_dma_translation(struct ssb_device *dev)
316 {
317 switch (dev->bus->bustype) {
318 case SSB_BUSTYPE_SSB:
319 return 0;
320 case SSB_BUSTYPE_PCI:
321 - return SSB_PCI_DMA;
322 + if (pci_is_pcie(dev->bus->host_pci) &&
323 + ssb_read32(dev, SSB_TMSHIGH) & SSB_TMSHIGH_DMA64) {
324 + return SSB_PCIE_DMA_H32;
325 + } else {
326 + if (ssb_dma_translation_special_bit(dev))
327 + return SSB_PCIE_DMA_H32;
328 + else
329 + return SSB_PCI_DMA;
330 + }
331 default:
332 __ssb_dma_not_implemented(dev);
333 }
334 --- a/drivers/ssb/pci.c
335 +++ b/drivers/ssb/pci.c
336 @@ -1,7 +1,7 @@
337 /*
338 * Sonics Silicon Backplane PCI-Hostbus related functions.
339 *
340 - * Copyright (C) 2005-2006 Michael Buesch <mb@bu3sch.de>
341 + * Copyright (C) 2005-2006 Michael Buesch <m@bues.ch>
342 * Copyright (C) 2005 Martin Langer <martin-langer@gmx.de>
343 * Copyright (C) 2005 Stefano Brivio <st3@riseup.net>
344 * Copyright (C) 2005 Danny van Dyk <kugelfang@gentoo.org>
345 @@ -607,6 +607,29 @@ static void sprom_extract_r8(struct ssb_
346 memcpy(&out->antenna_gain.ghz5, &out->antenna_gain.ghz24,
347 sizeof(out->antenna_gain.ghz5));
348
349 + /* Extract FEM info */
350 + SPEX(fem.ghz2.tssipos, SSB_SPROM8_FEM2G,
351 + SSB_SROM8_FEM_TSSIPOS, SSB_SROM8_FEM_TSSIPOS_SHIFT);
352 + SPEX(fem.ghz2.extpa_gain, SSB_SPROM8_FEM2G,
353 + SSB_SROM8_FEM_EXTPA_GAIN, SSB_SROM8_FEM_EXTPA_GAIN_SHIFT);
354 + SPEX(fem.ghz2.pdet_range, SSB_SPROM8_FEM2G,
355 + SSB_SROM8_FEM_PDET_RANGE, SSB_SROM8_FEM_PDET_RANGE_SHIFT);
356 + SPEX(fem.ghz2.tr_iso, SSB_SPROM8_FEM2G,
357 + SSB_SROM8_FEM_TR_ISO, SSB_SROM8_FEM_TR_ISO_SHIFT);
358 + SPEX(fem.ghz2.antswlut, SSB_SPROM8_FEM2G,
359 + SSB_SROM8_FEM_ANTSWLUT, SSB_SROM8_FEM_ANTSWLUT_SHIFT);
360 +
361 + SPEX(fem.ghz5.tssipos, SSB_SPROM8_FEM5G,
362 + SSB_SROM8_FEM_TSSIPOS, SSB_SROM8_FEM_TSSIPOS_SHIFT);
363 + SPEX(fem.ghz5.extpa_gain, SSB_SPROM8_FEM5G,
364 + SSB_SROM8_FEM_EXTPA_GAIN, SSB_SROM8_FEM_EXTPA_GAIN_SHIFT);
365 + SPEX(fem.ghz5.pdet_range, SSB_SPROM8_FEM5G,
366 + SSB_SROM8_FEM_PDET_RANGE, SSB_SROM8_FEM_PDET_RANGE_SHIFT);
367 + SPEX(fem.ghz5.tr_iso, SSB_SPROM8_FEM5G,
368 + SSB_SROM8_FEM_TR_ISO, SSB_SROM8_FEM_TR_ISO_SHIFT);
369 + SPEX(fem.ghz5.antswlut, SSB_SPROM8_FEM5G,
370 + SSB_SROM8_FEM_ANTSWLUT, SSB_SROM8_FEM_ANTSWLUT_SHIFT);
371 +
372 sprom_extract_r458(out, in);
373
374 /* TODO - get remaining rev 8 stuff needed */
375 @@ -734,12 +757,9 @@ out_free:
376 static void ssb_pci_get_boardinfo(struct ssb_bus *bus,
377 struct ssb_boardinfo *bi)
378 {
379 - pci_read_config_word(bus->host_pci, PCI_SUBSYSTEM_VENDOR_ID,
380 - &bi->vendor);
381 - pci_read_config_word(bus->host_pci, PCI_SUBSYSTEM_ID,
382 - &bi->type);
383 - pci_read_config_word(bus->host_pci, PCI_REVISION_ID,
384 - &bi->rev);
385 + bi->vendor = bus->host_pci->subsystem_vendor;
386 + bi->type = bus->host_pci->subsystem_device;
387 + bi->rev = bus->host_pci->revision;
388 }
389
390 int ssb_pci_get_invariants(struct ssb_bus *bus,
391 --- a/drivers/ssb/pcihost_wrapper.c
392 +++ b/drivers/ssb/pcihost_wrapper.c
393 @@ -6,7 +6,7 @@
394 * Copyright (c) 2005 Stefano Brivio <st3@riseup.net>
395 * Copyright (c) 2005 Danny van Dyk <kugelfang@gentoo.org>
396 * Copyright (c) 2005 Andreas Jaggi <andreas.jaggi@waterwave.ch>
397 - * Copyright (c) 2005-2007 Michael Buesch <mbuesch@freenet.de>
398 + * Copyright (c) 2005-2007 Michael Buesch <m@bues.ch>
399 *
400 * Licensed under the GNU/GPL. See COPYING for details.
401 */
402 @@ -53,8 +53,8 @@ static int ssb_pcihost_resume(struct pci
403 # define ssb_pcihost_resume NULL
404 #endif /* CONFIG_PM */
405
406 -static int ssb_pcihost_probe(struct pci_dev *dev,
407 - const struct pci_device_id *id)
408 +static int __devinit ssb_pcihost_probe(struct pci_dev *dev,
409 + const struct pci_device_id *id)
410 {
411 struct ssb_bus *ssb;
412 int err = -ENOMEM;
413 @@ -110,7 +110,7 @@ static void ssb_pcihost_remove(struct pc
414 pci_set_drvdata(dev, NULL);
415 }
416
417 -int ssb_pcihost_register(struct pci_driver *driver)
418 +int __devinit ssb_pcihost_register(struct pci_driver *driver)
419 {
420 driver->probe = ssb_pcihost_probe;
421 driver->remove = ssb_pcihost_remove;
422 --- a/drivers/ssb/pcmcia.c
423 +++ b/drivers/ssb/pcmcia.c
424 @@ -3,7 +3,7 @@
425 * PCMCIA-Hostbus related functions
426 *
427 * Copyright 2006 Johannes Berg <johannes@sipsolutions.net>
428 - * Copyright 2007-2008 Michael Buesch <mb@bu3sch.de>
429 + * Copyright 2007-2008 Michael Buesch <m@bues.ch>
430 *
431 * Licensed under the GNU/GPL. See COPYING for details.
432 */
433 --- a/drivers/ssb/scan.c
434 +++ b/drivers/ssb/scan.c
435 @@ -2,7 +2,7 @@
436 * Sonics Silicon Backplane
437 * Bus scanning
438 *
439 - * Copyright (C) 2005-2007 Michael Buesch <mb@bu3sch.de>
440 + * Copyright (C) 2005-2007 Michael Buesch <m@bues.ch>
441 * Copyright (C) 2005 Martin Langer <martin-langer@gmx.de>
442 * Copyright (C) 2005 Stefano Brivio <st3@riseup.net>
443 * Copyright (C) 2005 Danny van Dyk <kugelfang@gentoo.org>
444 @@ -310,8 +310,7 @@ int ssb_bus_scan(struct ssb_bus *bus,
445 } else {
446 if (bus->bustype == SSB_BUSTYPE_PCI) {
447 bus->chip_id = pcidev_to_chipid(bus->host_pci);
448 - pci_read_config_byte(bus->host_pci, PCI_REVISION_ID,
449 - &bus->chip_rev);
450 + bus->chip_rev = bus->host_pci->revision;
451 bus->chip_package = 0;
452 } else {
453 bus->chip_id = 0x4710;
454 --- a/drivers/ssb/sdio.c
455 +++ b/drivers/ssb/sdio.c
456 @@ -6,7 +6,7 @@
457 *
458 * Based on drivers/ssb/pcmcia.c
459 * Copyright 2006 Johannes Berg <johannes@sipsolutions.net>
460 - * Copyright 2007-2008 Michael Buesch <mb@bu3sch.de>
461 + * Copyright 2007-2008 Michael Buesch <m@bues.ch>
462 *
463 * Licensed under the GNU/GPL. See COPYING for details.
464 *
465 --- a/drivers/ssb/sprom.c
466 +++ b/drivers/ssb/sprom.c
467 @@ -2,7 +2,7 @@
468 * Sonics Silicon Backplane
469 * Common SPROM support routines
470 *
471 - * Copyright (C) 2005-2008 Michael Buesch <mb@bu3sch.de>
472 + * Copyright (C) 2005-2008 Michael Buesch <m@bues.ch>
473 * Copyright (C) 2005 Martin Langer <martin-langer@gmx.de>
474 * Copyright (C) 2005 Stefano Brivio <st3@riseup.net>
475 * Copyright (C) 2005 Danny van Dyk <kugelfang@gentoo.org>
476 --- a/include/linux/ssb/ssb.h
477 +++ b/include/linux/ssb/ssb.h
478 @@ -25,8 +25,10 @@ struct ssb_sprom {
479 u8 et1phyaddr; /* MII address for enet1 */
480 u8 et0mdcport; /* MDIO for enet0 */
481 u8 et1mdcport; /* MDIO for enet1 */
482 - u8 board_rev; /* Board revision number from SPROM. */
483 + u16 board_rev; /* Board revision number from SPROM. */
484 u8 country_code; /* Country Code */
485 + u16 leddc_on_time; /* LED Powersave Duty Cycle On Count */
486 + u16 leddc_off_time; /* LED Powersave Duty Cycle Off Count */
487 u8 ant_available_a; /* 2GHz antenna available bits (up to 4) */
488 u8 ant_available_bg; /* 5GHz antenna available bits (up to 4) */
489 u16 pa0b0;
490 @@ -92,6 +94,15 @@ struct ssb_sprom {
491 } ghz5; /* 5GHz band */
492 } antenna_gain;
493
494 + struct {
495 + struct {
496 + u8 tssipos, extpa_gain, pdet_range, tr_iso, antswlut;
497 + } ghz2;
498 + struct {
499 + u8 tssipos, extpa_gain, pdet_range, tr_iso, antswlut;
500 + } ghz5;
501 + } fem;
502 +
503 /* TODO - add any parameters needed from rev 2, 3, 4, 5 or 8 SPROMs */
504 };
505
506 @@ -99,7 +110,7 @@ struct ssb_sprom {
507 struct ssb_boardinfo {
508 u16 vendor;
509 u16 type;
510 - u16 rev;
511 + u8 rev;
512 };
513
514
515 @@ -229,10 +240,9 @@ struct ssb_driver {
516 #define drv_to_ssb_drv(_drv) container_of(_drv, struct ssb_driver, drv)
517
518 extern int __ssb_driver_register(struct ssb_driver *drv, struct module *owner);
519 -static inline int ssb_driver_register(struct ssb_driver *drv)
520 -{
521 - return __ssb_driver_register(drv, THIS_MODULE);
522 -}
523 +#define ssb_driver_register(drv) \
524 + __ssb_driver_register(drv, THIS_MODULE)
525 +
526 extern void ssb_driver_unregister(struct ssb_driver *drv);
527
528
529 --- a/include/linux/ssb/ssb_driver_chipcommon.h
530 +++ b/include/linux/ssb/ssb_driver_chipcommon.h
531 @@ -8,7 +8,7 @@
532 * gpio interface, extbus, and support for serial and parallel flashes.
533 *
534 * Copyright 2005, Broadcom Corporation
535 - * Copyright 2006, Michael Buesch <mb@bu3sch.de>
536 + * Copyright 2006, Michael Buesch <m@bues.ch>
537 *
538 * Licensed under the GPL version 2. See COPYING for details.
539 */
540 --- a/include/linux/ssb/ssb_regs.h
541 +++ b/include/linux/ssb/ssb_regs.h
542 @@ -432,6 +432,23 @@
543 #define SSB_SPROM8_RXPO2G 0x00FF /* 2GHz RX power offset */
544 #define SSB_SPROM8_RXPO5G 0xFF00 /* 5GHz RX power offset */
545 #define SSB_SPROM8_RXPO5G_SHIFT 8
546 +#define SSB_SPROM8_FEM2G 0x00AE
547 +#define SSB_SPROM8_FEM5G 0x00B0
548 +#define SSB_SROM8_FEM_TSSIPOS 0x0001
549 +#define SSB_SROM8_FEM_TSSIPOS_SHIFT 0
550 +#define SSB_SROM8_FEM_EXTPA_GAIN 0x0006
551 +#define SSB_SROM8_FEM_EXTPA_GAIN_SHIFT 1
552 +#define SSB_SROM8_FEM_PDET_RANGE 0x00F8
553 +#define SSB_SROM8_FEM_PDET_RANGE_SHIFT 3
554 +#define SSB_SROM8_FEM_TR_ISO 0x0700
555 +#define SSB_SROM8_FEM_TR_ISO_SHIFT 8
556 +#define SSB_SROM8_FEM_ANTSWLUT 0xF800
557 +#define SSB_SROM8_FEM_ANTSWLUT_SHIFT 11
558 +#define SSB_SPROM8_THERMAL 0x00B2
559 +#define SSB_SPROM8_MPWR_RAWTS 0x00B4
560 +#define SSB_SPROM8_TS_SLP_OPT_CORRX 0x00B6
561 +#define SSB_SPROM8_FOC_HWIQ_IQSWP 0x00B8
562 +#define SSB_SPROM8_PHYCAL_TEMPDELTA 0x00BA
563 #define SSB_SPROM8_MAXP_BG 0x00C0 /* Max Power 2GHz in path 1 */
564 #define SSB_SPROM8_MAXP_BG_MASK 0x00FF /* Mask for Max Power 2GHz */
565 #define SSB_SPROM8_ITSSI_BG 0xFF00 /* Mask for path 1 itssi_bg */
566 @@ -462,6 +479,46 @@
567 #define SSB_SPROM8_OFDM5GLPO 0x014A /* 5.2GHz OFDM power offset */
568 #define SSB_SPROM8_OFDM5GHPO 0x014E /* 5.8GHz OFDM power offset */
569
570 +/* Values for boardflags_lo read from SPROM */
571 +#define SSB_BFL_BTCOEXIST 0x0001 /* implements Bluetooth coexistance */
572 +#define SSB_BFL_PACTRL 0x0002 /* GPIO 9 controlling the PA */
573 +#define SSB_BFL_AIRLINEMODE 0x0004 /* implements GPIO 13 radio disable indication */
574 +#define SSB_BFL_RSSI 0x0008 /* software calculates nrssi slope. */
575 +#define SSB_BFL_ENETSPI 0x0010 /* has ephy roboswitch spi */
576 +#define SSB_BFL_XTAL_NOSLOW 0x0020 /* no slow clock available */
577 +#define SSB_BFL_CCKHIPWR 0x0040 /* can do high power CCK transmission */
578 +#define SSB_BFL_ENETADM 0x0080 /* has ADMtek switch */
579 +#define SSB_BFL_ENETVLAN 0x0100 /* can do vlan */
580 +#define SSB_BFL_AFTERBURNER 0x0200 /* supports Afterburner mode */
581 +#define SSB_BFL_NOPCI 0x0400 /* board leaves PCI floating */
582 +#define SSB_BFL_FEM 0x0800 /* supports the Front End Module */
583 +#define SSB_BFL_EXTLNA 0x1000 /* has an external LNA */
584 +#define SSB_BFL_HGPA 0x2000 /* had high gain PA */
585 +#define SSB_BFL_BTCMOD 0x4000 /* BFL_BTCOEXIST is given in alternate GPIOs */
586 +#define SSB_BFL_ALTIQ 0x8000 /* alternate I/Q settings */
587 +
588 +/* Values for boardflags_hi read from SPROM */
589 +#define SSB_BFH_NOPA 0x0001 /* has no PA */
590 +#define SSB_BFH_RSSIINV 0x0002 /* RSSI uses positive slope (not TSSI) */
591 +#define SSB_BFH_PAREF 0x0004 /* uses the PARef LDO */
592 +#define SSB_BFH_3TSWITCH 0x0008 /* uses a triple throw switch shared with bluetooth */
593 +#define SSB_BFH_PHASESHIFT 0x0010 /* can support phase shifter */
594 +#define SSB_BFH_BUCKBOOST 0x0020 /* has buck/booster */
595 +#define SSB_BFH_FEM_BT 0x0040 /* has FEM and switch to share antenna with bluetooth */
596 +
597 +/* Values for boardflags2_lo read from SPROM */
598 +#define SSB_BFL2_RXBB_INT_REG_DIS 0x0001 /* external RX BB regulator present */
599 +#define SSB_BFL2_APLL_WAR 0x0002 /* alternative A-band PLL settings implemented */
600 +#define SSB_BFL2_TXPWRCTRL_EN 0x0004 /* permits enabling TX Power Control */
601 +#define SSB_BFL2_2X4_DIV 0x0008 /* 2x4 diversity switch */
602 +#define SSB_BFL2_5G_PWRGAIN 0x0010 /* supports 5G band power gain */
603 +#define SSB_BFL2_PCIEWAR_OVR 0x0020 /* overrides ASPM and Clkreq settings */
604 +#define SSB_BFL2_CAESERS_BRD 0x0040 /* is Caesers board (unused) */
605 +#define SSB_BFL2_BTC3WIRE 0x0080 /* used 3-wire bluetooth coexist */
606 +#define SSB_BFL2_SKWRKFEM_BRD 0x0100 /* 4321mcm93 uses Skyworks FEM */
607 +#define SSB_BFL2_SPUR_WAR 0x0200 /* has a workaround for clock-harmonic spurs */
608 +#define SSB_BFL2_GPLL_WAR 0x0400 /* altenative G-band PLL settings implemented */
609 +
610 /* Values for SSB_SPROM1_BINF_CCODE */
611 enum {
612 SSB_SPROM1CCODE_WORLD = 0,
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