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kernel: update linux 3.0 to 3.0.17
[openwrt/staging/chunkeey.git] / target / linux / generic / patches-3.0 / 020-ssb_update.patch
1 --- a/drivers/ssb/b43_pci_bridge.c
2 +++ b/drivers/ssb/b43_pci_bridge.c
3 @@ -5,12 +5,13 @@
4 * because of its small size we include it in the SSB core
5 * instead of creating a standalone module.
6 *
7 - * Copyright 2007 Michael Buesch <mb@bu3sch.de>
8 + * Copyright 2007 Michael Buesch <m@bues.ch>
9 *
10 * Licensed under the GNU/GPL. See COPYING for details.
11 */
12
13 #include <linux/pci.h>
14 +#include <linux/module.h>
15 #include <linux/ssb/ssb.h>
16
17 #include "ssb_private.h"
18 --- a/drivers/ssb/driver_chipcommon.c
19 +++ b/drivers/ssb/driver_chipcommon.c
20 @@ -3,7 +3,7 @@
21 * Broadcom ChipCommon core driver
22 *
23 * Copyright 2005, Broadcom Corporation
24 - * Copyright 2006, 2007, Michael Buesch <mb@bu3sch.de>
25 + * Copyright 2006, 2007, Michael Buesch <m@bues.ch>
26 *
27 * Licensed under the GNU/GPL. See COPYING for details.
28 */
29 --- a/drivers/ssb/driver_chipcommon_pmu.c
30 +++ b/drivers/ssb/driver_chipcommon_pmu.c
31 @@ -2,7 +2,7 @@
32 * Sonics Silicon Backplane
33 * Broadcom ChipCommon Power Management Unit driver
34 *
35 - * Copyright 2009, Michael Buesch <mb@bu3sch.de>
36 + * Copyright 2009, Michael Buesch <m@bues.ch>
37 * Copyright 2007, Broadcom Corporation
38 *
39 * Licensed under the GNU/GPL. See COPYING for details.
40 @@ -417,9 +417,9 @@ static void ssb_pmu_resources_init(struc
41 u32 min_msk = 0, max_msk = 0;
42 unsigned int i;
43 const struct pmu_res_updown_tab_entry *updown_tab = NULL;
44 - unsigned int updown_tab_size;
45 + unsigned int updown_tab_size = 0;
46 const struct pmu_res_depend_tab_entry *depend_tab = NULL;
47 - unsigned int depend_tab_size;
48 + unsigned int depend_tab_size = 0;
49
50 switch (bus->chip_id) {
51 case 0x4312:
52 --- a/drivers/ssb/driver_extif.c
53 +++ b/drivers/ssb/driver_extif.c
54 @@ -3,7 +3,7 @@
55 * Broadcom EXTIF core driver
56 *
57 * Copyright 2005, Broadcom Corporation
58 - * Copyright 2006, 2007, Michael Buesch <mb@bu3sch.de>
59 + * Copyright 2006, 2007, Michael Buesch <m@bues.ch>
60 * Copyright 2006, 2007, Felix Fietkau <nbd@openwrt.org>
61 * Copyright 2007, Aurelien Jarno <aurelien@aurel32.net>
62 *
63 --- a/drivers/ssb/driver_gige.c
64 +++ b/drivers/ssb/driver_gige.c
65 @@ -3,7 +3,7 @@
66 * Broadcom Gigabit Ethernet core driver
67 *
68 * Copyright 2008, Broadcom Corporation
69 - * Copyright 2008, Michael Buesch <mb@bu3sch.de>
70 + * Copyright 2008, Michael Buesch <m@bues.ch>
71 *
72 * Licensed under the GNU/GPL. See COPYING for details.
73 */
74 @@ -106,8 +106,9 @@ void gige_pcicfg_write32(struct ssb_gige
75 gige_write32(dev, SSB_GIGE_PCICFG + offset, value);
76 }
77
78 -static int ssb_gige_pci_read_config(struct pci_bus *bus, unsigned int devfn,
79 - int reg, int size, u32 *val)
80 +static int __devinit ssb_gige_pci_read_config(struct pci_bus *bus,
81 + unsigned int devfn, int reg,
82 + int size, u32 *val)
83 {
84 struct ssb_gige *dev = container_of(bus->ops, struct ssb_gige, pci_ops);
85 unsigned long flags;
86 @@ -136,8 +137,9 @@ static int ssb_gige_pci_read_config(stru
87 return PCIBIOS_SUCCESSFUL;
88 }
89
90 -static int ssb_gige_pci_write_config(struct pci_bus *bus, unsigned int devfn,
91 - int reg, int size, u32 val)
92 +static int __devinit ssb_gige_pci_write_config(struct pci_bus *bus,
93 + unsigned int devfn, int reg,
94 + int size, u32 val)
95 {
96 struct ssb_gige *dev = container_of(bus->ops, struct ssb_gige, pci_ops);
97 unsigned long flags;
98 @@ -166,7 +168,8 @@ static int ssb_gige_pci_write_config(str
99 return PCIBIOS_SUCCESSFUL;
100 }
101
102 -static int ssb_gige_probe(struct ssb_device *sdev, const struct ssb_device_id *id)
103 +static int __devinit ssb_gige_probe(struct ssb_device *sdev,
104 + const struct ssb_device_id *id)
105 {
106 struct ssb_gige *dev;
107 u32 base, tmslow, tmshigh;
108 --- a/drivers/ssb/driver_mipscore.c
109 +++ b/drivers/ssb/driver_mipscore.c
110 @@ -3,7 +3,7 @@
111 * Broadcom MIPS core driver
112 *
113 * Copyright 2005, Broadcom Corporation
114 - * Copyright 2006, 2007, Michael Buesch <mb@bu3sch.de>
115 + * Copyright 2006, 2007, Michael Buesch <m@bues.ch>
116 *
117 * Licensed under the GNU/GPL. See COPYING for details.
118 */
119 --- a/drivers/ssb/driver_pcicore.c
120 +++ b/drivers/ssb/driver_pcicore.c
121 @@ -3,7 +3,7 @@
122 * Broadcom PCI-core driver
123 *
124 * Copyright 2005, Broadcom Corporation
125 - * Copyright 2006, 2007, Michael Buesch <mb@bu3sch.de>
126 + * Copyright 2006, 2007, Michael Buesch <m@bues.ch>
127 *
128 * Licensed under the GNU/GPL. See COPYING for details.
129 */
130 @@ -314,7 +314,7 @@ int ssb_pcicore_pcibios_map_irq(const st
131 return ssb_mips_irq(extpci_core->dev) + 2;
132 }
133
134 -static void ssb_pcicore_init_hostmode(struct ssb_pcicore *pc)
135 +static void __devinit ssb_pcicore_init_hostmode(struct ssb_pcicore *pc)
136 {
137 u32 val;
138
139 @@ -379,7 +379,7 @@ static void ssb_pcicore_init_hostmode(st
140 register_pci_controller(&ssb_pcicore_controller);
141 }
142
143 -static int pcicore_is_in_hostmode(struct ssb_pcicore *pc)
144 +static int __devinit pcicore_is_in_hostmode(struct ssb_pcicore *pc)
145 {
146 struct ssb_bus *bus = pc->dev->bus;
147 u16 chipid_top;
148 @@ -412,7 +412,7 @@ static int pcicore_is_in_hostmode(struct
149 * Workarounds.
150 **************************************************/
151
152 -static void ssb_pcicore_fix_sprom_core_index(struct ssb_pcicore *pc)
153 +static void __devinit ssb_pcicore_fix_sprom_core_index(struct ssb_pcicore *pc)
154 {
155 u16 tmp = pcicore_read16(pc, SSB_PCICORE_SPROM(0));
156 if (((tmp & 0xF000) >> 12) != pc->dev->core_index) {
157 @@ -514,7 +514,7 @@ static void ssb_pcicore_pcie_setup_worka
158 * Generic and Clientmode operation code.
159 **************************************************/
160
161 -static void ssb_pcicore_init_clientmode(struct ssb_pcicore *pc)
162 +static void __devinit ssb_pcicore_init_clientmode(struct ssb_pcicore *pc)
163 {
164 struct ssb_device *pdev = pc->dev;
165 struct ssb_bus *bus = pdev->bus;
166 --- a/drivers/ssb/embedded.c
167 +++ b/drivers/ssb/embedded.c
168 @@ -3,7 +3,7 @@
169 * Embedded systems support code
170 *
171 * Copyright 2005-2008, Broadcom Corporation
172 - * Copyright 2006-2008, Michael Buesch <mb@bu3sch.de>
173 + * Copyright 2006-2008, Michael Buesch <m@bues.ch>
174 *
175 * Licensed under the GNU/GPL. See COPYING for details.
176 */
177 --- a/drivers/ssb/main.c
178 +++ b/drivers/ssb/main.c
179 @@ -3,7 +3,7 @@
180 * Subsystem core
181 *
182 * Copyright 2005, Broadcom Corporation
183 - * Copyright 2006, 2007, Michael Buesch <mb@bu3sch.de>
184 + * Copyright 2006, 2007, Michael Buesch <m@bues.ch>
185 *
186 * Licensed under the GNU/GPL. See COPYING for details.
187 */
188 @@ -12,6 +12,7 @@
189
190 #include <linux/delay.h>
191 #include <linux/io.h>
192 +#include <linux/module.h>
193 #include <linux/ssb/ssb.h>
194 #include <linux/ssb/ssb_regs.h>
195 #include <linux/ssb/ssb_driver_gige.h>
196 @@ -557,7 +558,7 @@ error:
197 }
198
199 /* Needs ssb_buses_lock() */
200 -static int ssb_attach_queued_buses(void)
201 +static int __devinit ssb_attach_queued_buses(void)
202 {
203 struct ssb_bus *bus, *n;
204 int err = 0;
205 @@ -768,9 +769,9 @@ out:
206 return err;
207 }
208
209 -static int ssb_bus_register(struct ssb_bus *bus,
210 - ssb_invariants_func_t get_invariants,
211 - unsigned long baseaddr)
212 +static int __devinit ssb_bus_register(struct ssb_bus *bus,
213 + ssb_invariants_func_t get_invariants,
214 + unsigned long baseaddr)
215 {
216 int err;
217
218 @@ -851,8 +852,8 @@ err_disable_xtal:
219 }
220
221 #ifdef CONFIG_SSB_PCIHOST
222 -int ssb_bus_pcibus_register(struct ssb_bus *bus,
223 - struct pci_dev *host_pci)
224 +int __devinit ssb_bus_pcibus_register(struct ssb_bus *bus,
225 + struct pci_dev *host_pci)
226 {
227 int err;
228
229 @@ -875,9 +876,9 @@ EXPORT_SYMBOL(ssb_bus_pcibus_register);
230 #endif /* CONFIG_SSB_PCIHOST */
231
232 #ifdef CONFIG_SSB_PCMCIAHOST
233 -int ssb_bus_pcmciabus_register(struct ssb_bus *bus,
234 - struct pcmcia_device *pcmcia_dev,
235 - unsigned long baseaddr)
236 +int __devinit ssb_bus_pcmciabus_register(struct ssb_bus *bus,
237 + struct pcmcia_device *pcmcia_dev,
238 + unsigned long baseaddr)
239 {
240 int err;
241
242 @@ -897,8 +898,9 @@ EXPORT_SYMBOL(ssb_bus_pcmciabus_register
243 #endif /* CONFIG_SSB_PCMCIAHOST */
244
245 #ifdef CONFIG_SSB_SDIOHOST
246 -int ssb_bus_sdiobus_register(struct ssb_bus *bus, struct sdio_func *func,
247 - unsigned int quirks)
248 +int __devinit ssb_bus_sdiobus_register(struct ssb_bus *bus,
249 + struct sdio_func *func,
250 + unsigned int quirks)
251 {
252 int err;
253
254 @@ -918,9 +920,9 @@ int ssb_bus_sdiobus_register(struct ssb_
255 EXPORT_SYMBOL(ssb_bus_sdiobus_register);
256 #endif /* CONFIG_SSB_PCMCIAHOST */
257
258 -int ssb_bus_ssbbus_register(struct ssb_bus *bus,
259 - unsigned long baseaddr,
260 - ssb_invariants_func_t get_invariants)
261 +int __devinit ssb_bus_ssbbus_register(struct ssb_bus *bus,
262 + unsigned long baseaddr,
263 + ssb_invariants_func_t get_invariants)
264 {
265 int err;
266
267 @@ -1001,8 +1003,8 @@ u32 ssb_calc_clock_rate(u32 plltype, u32
268 switch (plltype) {
269 case SSB_PLLTYPE_6: /* 100/200 or 120/240 only */
270 if (m & SSB_CHIPCO_CLK_T6_MMASK)
271 - return SSB_CHIPCO_CLK_T6_M0;
272 - return SSB_CHIPCO_CLK_T6_M1;
273 + return SSB_CHIPCO_CLK_T6_M1;
274 + return SSB_CHIPCO_CLK_T6_M0;
275 case SSB_PLLTYPE_1: /* 48Mhz base, 3 dividers */
276 case SSB_PLLTYPE_3: /* 25Mhz, 2 dividers */
277 case SSB_PLLTYPE_4: /* 48Mhz, 4 dividers */
278 @@ -1259,13 +1261,34 @@ void ssb_device_disable(struct ssb_devic
279 }
280 EXPORT_SYMBOL(ssb_device_disable);
281
282 +/* Some chipsets need routing known for PCIe and 64-bit DMA */
283 +static bool ssb_dma_translation_special_bit(struct ssb_device *dev)
284 +{
285 + u16 chip_id = dev->bus->chip_id;
286 +
287 + if (dev->id.coreid == SSB_DEV_80211) {
288 + return (chip_id == 0x4322 || chip_id == 43221 ||
289 + chip_id == 43231 || chip_id == 43222);
290 + }
291 +
292 + return 0;
293 +}
294 +
295 u32 ssb_dma_translation(struct ssb_device *dev)
296 {
297 switch (dev->bus->bustype) {
298 case SSB_BUSTYPE_SSB:
299 return 0;
300 case SSB_BUSTYPE_PCI:
301 - return SSB_PCI_DMA;
302 + if (pci_is_pcie(dev->bus->host_pci) &&
303 + ssb_read32(dev, SSB_TMSHIGH) & SSB_TMSHIGH_DMA64) {
304 + return SSB_PCIE_DMA_H32;
305 + } else {
306 + if (ssb_dma_translation_special_bit(dev))
307 + return SSB_PCIE_DMA_H32;
308 + else
309 + return SSB_PCI_DMA;
310 + }
311 default:
312 __ssb_dma_not_implemented(dev);
313 }
314 --- a/drivers/ssb/pci.c
315 +++ b/drivers/ssb/pci.c
316 @@ -1,7 +1,7 @@
317 /*
318 * Sonics Silicon Backplane PCI-Hostbus related functions.
319 *
320 - * Copyright (C) 2005-2006 Michael Buesch <mb@bu3sch.de>
321 + * Copyright (C) 2005-2006 Michael Buesch <m@bues.ch>
322 * Copyright (C) 2005 Martin Langer <martin-langer@gmx.de>
323 * Copyright (C) 2005 Stefano Brivio <st3@riseup.net>
324 * Copyright (C) 2005 Danny van Dyk <kugelfang@gentoo.org>
325 @@ -607,6 +607,29 @@ static void sprom_extract_r8(struct ssb_
326 memcpy(&out->antenna_gain.ghz5, &out->antenna_gain.ghz24,
327 sizeof(out->antenna_gain.ghz5));
328
329 + /* Extract FEM info */
330 + SPEX(fem.ghz2.tssipos, SSB_SPROM8_FEM2G,
331 + SSB_SROM8_FEM_TSSIPOS, SSB_SROM8_FEM_TSSIPOS_SHIFT);
332 + SPEX(fem.ghz2.extpa_gain, SSB_SPROM8_FEM2G,
333 + SSB_SROM8_FEM_EXTPA_GAIN, SSB_SROM8_FEM_EXTPA_GAIN_SHIFT);
334 + SPEX(fem.ghz2.pdet_range, SSB_SPROM8_FEM2G,
335 + SSB_SROM8_FEM_PDET_RANGE, SSB_SROM8_FEM_PDET_RANGE_SHIFT);
336 + SPEX(fem.ghz2.tr_iso, SSB_SPROM8_FEM2G,
337 + SSB_SROM8_FEM_TR_ISO, SSB_SROM8_FEM_TR_ISO_SHIFT);
338 + SPEX(fem.ghz2.antswlut, SSB_SPROM8_FEM2G,
339 + SSB_SROM8_FEM_ANTSWLUT, SSB_SROM8_FEM_ANTSWLUT_SHIFT);
340 +
341 + SPEX(fem.ghz5.tssipos, SSB_SPROM8_FEM5G,
342 + SSB_SROM8_FEM_TSSIPOS, SSB_SROM8_FEM_TSSIPOS_SHIFT);
343 + SPEX(fem.ghz5.extpa_gain, SSB_SPROM8_FEM5G,
344 + SSB_SROM8_FEM_EXTPA_GAIN, SSB_SROM8_FEM_EXTPA_GAIN_SHIFT);
345 + SPEX(fem.ghz5.pdet_range, SSB_SPROM8_FEM5G,
346 + SSB_SROM8_FEM_PDET_RANGE, SSB_SROM8_FEM_PDET_RANGE_SHIFT);
347 + SPEX(fem.ghz5.tr_iso, SSB_SPROM8_FEM5G,
348 + SSB_SROM8_FEM_TR_ISO, SSB_SROM8_FEM_TR_ISO_SHIFT);
349 + SPEX(fem.ghz5.antswlut, SSB_SPROM8_FEM5G,
350 + SSB_SROM8_FEM_ANTSWLUT, SSB_SROM8_FEM_ANTSWLUT_SHIFT);
351 +
352 sprom_extract_r458(out, in);
353
354 /* TODO - get remaining rev 8 stuff needed */
355 @@ -734,12 +757,9 @@ out_free:
356 static void ssb_pci_get_boardinfo(struct ssb_bus *bus,
357 struct ssb_boardinfo *bi)
358 {
359 - pci_read_config_word(bus->host_pci, PCI_SUBSYSTEM_VENDOR_ID,
360 - &bi->vendor);
361 - pci_read_config_word(bus->host_pci, PCI_SUBSYSTEM_ID,
362 - &bi->type);
363 - pci_read_config_word(bus->host_pci, PCI_REVISION_ID,
364 - &bi->rev);
365 + bi->vendor = bus->host_pci->subsystem_vendor;
366 + bi->type = bus->host_pci->subsystem_device;
367 + bi->rev = bus->host_pci->revision;
368 }
369
370 int ssb_pci_get_invariants(struct ssb_bus *bus,
371 --- a/drivers/ssb/pcihost_wrapper.c
372 +++ b/drivers/ssb/pcihost_wrapper.c
373 @@ -6,7 +6,7 @@
374 * Copyright (c) 2005 Stefano Brivio <st3@riseup.net>
375 * Copyright (c) 2005 Danny van Dyk <kugelfang@gentoo.org>
376 * Copyright (c) 2005 Andreas Jaggi <andreas.jaggi@waterwave.ch>
377 - * Copyright (c) 2005-2007 Michael Buesch <mbuesch@freenet.de>
378 + * Copyright (c) 2005-2007 Michael Buesch <m@bues.ch>
379 *
380 * Licensed under the GNU/GPL. See COPYING for details.
381 */
382 @@ -53,8 +53,8 @@ static int ssb_pcihost_resume(struct pci
383 # define ssb_pcihost_resume NULL
384 #endif /* CONFIG_PM */
385
386 -static int ssb_pcihost_probe(struct pci_dev *dev,
387 - const struct pci_device_id *id)
388 +static int __devinit ssb_pcihost_probe(struct pci_dev *dev,
389 + const struct pci_device_id *id)
390 {
391 struct ssb_bus *ssb;
392 int err = -ENOMEM;
393 @@ -110,7 +110,7 @@ static void ssb_pcihost_remove(struct pc
394 pci_set_drvdata(dev, NULL);
395 }
396
397 -int ssb_pcihost_register(struct pci_driver *driver)
398 +int __devinit ssb_pcihost_register(struct pci_driver *driver)
399 {
400 driver->probe = ssb_pcihost_probe;
401 driver->remove = ssb_pcihost_remove;
402 --- a/drivers/ssb/pcmcia.c
403 +++ b/drivers/ssb/pcmcia.c
404 @@ -3,7 +3,7 @@
405 * PCMCIA-Hostbus related functions
406 *
407 * Copyright 2006 Johannes Berg <johannes@sipsolutions.net>
408 - * Copyright 2007-2008 Michael Buesch <mb@bu3sch.de>
409 + * Copyright 2007-2008 Michael Buesch <m@bues.ch>
410 *
411 * Licensed under the GNU/GPL. See COPYING for details.
412 */
413 --- a/drivers/ssb/scan.c
414 +++ b/drivers/ssb/scan.c
415 @@ -2,7 +2,7 @@
416 * Sonics Silicon Backplane
417 * Bus scanning
418 *
419 - * Copyright (C) 2005-2007 Michael Buesch <mb@bu3sch.de>
420 + * Copyright (C) 2005-2007 Michael Buesch <m@bues.ch>
421 * Copyright (C) 2005 Martin Langer <martin-langer@gmx.de>
422 * Copyright (C) 2005 Stefano Brivio <st3@riseup.net>
423 * Copyright (C) 2005 Danny van Dyk <kugelfang@gentoo.org>
424 @@ -310,8 +310,7 @@ int ssb_bus_scan(struct ssb_bus *bus,
425 } else {
426 if (bus->bustype == SSB_BUSTYPE_PCI) {
427 bus->chip_id = pcidev_to_chipid(bus->host_pci);
428 - pci_read_config_byte(bus->host_pci, PCI_REVISION_ID,
429 - &bus->chip_rev);
430 + bus->chip_rev = bus->host_pci->revision;
431 bus->chip_package = 0;
432 } else {
433 bus->chip_id = 0x4710;
434 --- a/drivers/ssb/sdio.c
435 +++ b/drivers/ssb/sdio.c
436 @@ -6,7 +6,7 @@
437 *
438 * Based on drivers/ssb/pcmcia.c
439 * Copyright 2006 Johannes Berg <johannes@sipsolutions.net>
440 - * Copyright 2007-2008 Michael Buesch <mb@bu3sch.de>
441 + * Copyright 2007-2008 Michael Buesch <m@bues.ch>
442 *
443 * Licensed under the GNU/GPL. See COPYING for details.
444 *
445 --- a/drivers/ssb/sprom.c
446 +++ b/drivers/ssb/sprom.c
447 @@ -2,7 +2,7 @@
448 * Sonics Silicon Backplane
449 * Common SPROM support routines
450 *
451 - * Copyright (C) 2005-2008 Michael Buesch <mb@bu3sch.de>
452 + * Copyright (C) 2005-2008 Michael Buesch <m@bues.ch>
453 * Copyright (C) 2005 Martin Langer <martin-langer@gmx.de>
454 * Copyright (C) 2005 Stefano Brivio <st3@riseup.net>
455 * Copyright (C) 2005 Danny van Dyk <kugelfang@gentoo.org>
456 --- a/include/linux/ssb/ssb.h
457 +++ b/include/linux/ssb/ssb.h
458 @@ -25,8 +25,10 @@ struct ssb_sprom {
459 u8 et1phyaddr; /* MII address for enet1 */
460 u8 et0mdcport; /* MDIO for enet0 */
461 u8 et1mdcport; /* MDIO for enet1 */
462 - u8 board_rev; /* Board revision number from SPROM. */
463 + u16 board_rev; /* Board revision number from SPROM. */
464 u8 country_code; /* Country Code */
465 + u16 leddc_on_time; /* LED Powersave Duty Cycle On Count */
466 + u16 leddc_off_time; /* LED Powersave Duty Cycle Off Count */
467 u8 ant_available_a; /* 2GHz antenna available bits (up to 4) */
468 u8 ant_available_bg; /* 5GHz antenna available bits (up to 4) */
469 u16 pa0b0;
470 @@ -92,6 +94,15 @@ struct ssb_sprom {
471 } ghz5; /* 5GHz band */
472 } antenna_gain;
473
474 + struct {
475 + struct {
476 + u8 tssipos, extpa_gain, pdet_range, tr_iso, antswlut;
477 + } ghz2;
478 + struct {
479 + u8 tssipos, extpa_gain, pdet_range, tr_iso, antswlut;
480 + } ghz5;
481 + } fem;
482 +
483 /* TODO - add any parameters needed from rev 2, 3, 4, 5 or 8 SPROMs */
484 };
485
486 @@ -99,7 +110,7 @@ struct ssb_sprom {
487 struct ssb_boardinfo {
488 u16 vendor;
489 u16 type;
490 - u16 rev;
491 + u8 rev;
492 };
493
494
495 @@ -229,10 +240,9 @@ struct ssb_driver {
496 #define drv_to_ssb_drv(_drv) container_of(_drv, struct ssb_driver, drv)
497
498 extern int __ssb_driver_register(struct ssb_driver *drv, struct module *owner);
499 -static inline int ssb_driver_register(struct ssb_driver *drv)
500 -{
501 - return __ssb_driver_register(drv, THIS_MODULE);
502 -}
503 +#define ssb_driver_register(drv) \
504 + __ssb_driver_register(drv, THIS_MODULE)
505 +
506 extern void ssb_driver_unregister(struct ssb_driver *drv);
507
508
509 --- a/include/linux/ssb/ssb_driver_chipcommon.h
510 +++ b/include/linux/ssb/ssb_driver_chipcommon.h
511 @@ -8,7 +8,7 @@
512 * gpio interface, extbus, and support for serial and parallel flashes.
513 *
514 * Copyright 2005, Broadcom Corporation
515 - * Copyright 2006, Michael Buesch <mb@bu3sch.de>
516 + * Copyright 2006, Michael Buesch <m@bues.ch>
517 *
518 * Licensed under the GPL version 2. See COPYING for details.
519 */
520 --- a/include/linux/ssb/ssb_regs.h
521 +++ b/include/linux/ssb/ssb_regs.h
522 @@ -432,6 +432,23 @@
523 #define SSB_SPROM8_RXPO2G 0x00FF /* 2GHz RX power offset */
524 #define SSB_SPROM8_RXPO5G 0xFF00 /* 5GHz RX power offset */
525 #define SSB_SPROM8_RXPO5G_SHIFT 8
526 +#define SSB_SPROM8_FEM2G 0x00AE
527 +#define SSB_SPROM8_FEM5G 0x00B0
528 +#define SSB_SROM8_FEM_TSSIPOS 0x0001
529 +#define SSB_SROM8_FEM_TSSIPOS_SHIFT 0
530 +#define SSB_SROM8_FEM_EXTPA_GAIN 0x0006
531 +#define SSB_SROM8_FEM_EXTPA_GAIN_SHIFT 1
532 +#define SSB_SROM8_FEM_PDET_RANGE 0x00F8
533 +#define SSB_SROM8_FEM_PDET_RANGE_SHIFT 3
534 +#define SSB_SROM8_FEM_TR_ISO 0x0700
535 +#define SSB_SROM8_FEM_TR_ISO_SHIFT 8
536 +#define SSB_SROM8_FEM_ANTSWLUT 0xF800
537 +#define SSB_SROM8_FEM_ANTSWLUT_SHIFT 11
538 +#define SSB_SPROM8_THERMAL 0x00B2
539 +#define SSB_SPROM8_MPWR_RAWTS 0x00B4
540 +#define SSB_SPROM8_TS_SLP_OPT_CORRX 0x00B6
541 +#define SSB_SPROM8_FOC_HWIQ_IQSWP 0x00B8
542 +#define SSB_SPROM8_PHYCAL_TEMPDELTA 0x00BA
543 #define SSB_SPROM8_MAXP_BG 0x00C0 /* Max Power 2GHz in path 1 */
544 #define SSB_SPROM8_MAXP_BG_MASK 0x00FF /* Mask for Max Power 2GHz */
545 #define SSB_SPROM8_ITSSI_BG 0xFF00 /* Mask for path 1 itssi_bg */
546 @@ -462,6 +479,46 @@
547 #define SSB_SPROM8_OFDM5GLPO 0x014A /* 5.2GHz OFDM power offset */
548 #define SSB_SPROM8_OFDM5GHPO 0x014E /* 5.8GHz OFDM power offset */
549
550 +/* Values for boardflags_lo read from SPROM */
551 +#define SSB_BFL_BTCOEXIST 0x0001 /* implements Bluetooth coexistance */
552 +#define SSB_BFL_PACTRL 0x0002 /* GPIO 9 controlling the PA */
553 +#define SSB_BFL_AIRLINEMODE 0x0004 /* implements GPIO 13 radio disable indication */
554 +#define SSB_BFL_RSSI 0x0008 /* software calculates nrssi slope. */
555 +#define SSB_BFL_ENETSPI 0x0010 /* has ephy roboswitch spi */
556 +#define SSB_BFL_XTAL_NOSLOW 0x0020 /* no slow clock available */
557 +#define SSB_BFL_CCKHIPWR 0x0040 /* can do high power CCK transmission */
558 +#define SSB_BFL_ENETADM 0x0080 /* has ADMtek switch */
559 +#define SSB_BFL_ENETVLAN 0x0100 /* can do vlan */
560 +#define SSB_BFL_AFTERBURNER 0x0200 /* supports Afterburner mode */
561 +#define SSB_BFL_NOPCI 0x0400 /* board leaves PCI floating */
562 +#define SSB_BFL_FEM 0x0800 /* supports the Front End Module */
563 +#define SSB_BFL_EXTLNA 0x1000 /* has an external LNA */
564 +#define SSB_BFL_HGPA 0x2000 /* had high gain PA */
565 +#define SSB_BFL_BTCMOD 0x4000 /* BFL_BTCOEXIST is given in alternate GPIOs */
566 +#define SSB_BFL_ALTIQ 0x8000 /* alternate I/Q settings */
567 +
568 +/* Values for boardflags_hi read from SPROM */
569 +#define SSB_BFH_NOPA 0x0001 /* has no PA */
570 +#define SSB_BFH_RSSIINV 0x0002 /* RSSI uses positive slope (not TSSI) */
571 +#define SSB_BFH_PAREF 0x0004 /* uses the PARef LDO */
572 +#define SSB_BFH_3TSWITCH 0x0008 /* uses a triple throw switch shared with bluetooth */
573 +#define SSB_BFH_PHASESHIFT 0x0010 /* can support phase shifter */
574 +#define SSB_BFH_BUCKBOOST 0x0020 /* has buck/booster */
575 +#define SSB_BFH_FEM_BT 0x0040 /* has FEM and switch to share antenna with bluetooth */
576 +
577 +/* Values for boardflags2_lo read from SPROM */
578 +#define SSB_BFL2_RXBB_INT_REG_DIS 0x0001 /* external RX BB regulator present */
579 +#define SSB_BFL2_APLL_WAR 0x0002 /* alternative A-band PLL settings implemented */
580 +#define SSB_BFL2_TXPWRCTRL_EN 0x0004 /* permits enabling TX Power Control */
581 +#define SSB_BFL2_2X4_DIV 0x0008 /* 2x4 diversity switch */
582 +#define SSB_BFL2_5G_PWRGAIN 0x0010 /* supports 5G band power gain */
583 +#define SSB_BFL2_PCIEWAR_OVR 0x0020 /* overrides ASPM and Clkreq settings */
584 +#define SSB_BFL2_CAESERS_BRD 0x0040 /* is Caesers board (unused) */
585 +#define SSB_BFL2_BTC3WIRE 0x0080 /* used 3-wire bluetooth coexist */
586 +#define SSB_BFL2_SKWRKFEM_BRD 0x0100 /* 4321mcm93 uses Skyworks FEM */
587 +#define SSB_BFL2_SPUR_WAR 0x0200 /* has a workaround for clock-harmonic spurs */
588 +#define SSB_BFL2_GPLL_WAR 0x0400 /* altenative G-band PLL settings implemented */
589 +
590 /* Values for SSB_SPROM1_BINF_CCODE */
591 enum {
592 SSB_SPROM1CCODE_WORLD = 0,
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