ec1d0e5f4d32acc3ea5dfab597d1169d7c885ecf
[openwrt/staging/chunkeey.git] / target / linux / ipq806x / patches-5.15 / 099-1-mtd-nand-raw-qcom_nandc-add-boot_layout_mode-support.patch
1 From 6949d651e3be3ebbfedb6bbd5b541cfda6ee58a9 Mon Sep 17 00:00:00 2001
2 From: Ansuel Smith <ansuelsmth@gmail.com>
3 Date: Wed, 10 Feb 2021 10:40:17 +0100
4 Subject: [PATCH 1/2] mtd: nand: raw: qcom_nandc: add boot_layout_mode support
5
6 ipq806x nand have a special ecc configuration for the boot pages. The
7 use of the non-boot pages configuration on boot pages cause I/O error
8 and can cause broken data written to the nand. Add support for this
9 special configuration if the page to be read/write is in the size of the
10 boot pages set by the dts.
11
12 Signed-off-by: Ansuel Smith <ansuelsmth@gmail.com>
13 ---
14 drivers/mtd/nand/raw/qcom_nandc.c | 82 +++++++++++++++++++++++++++++--
15 1 file changed, 77 insertions(+), 5 deletions(-)
16
17 --- a/drivers/mtd/nand/raw/qcom_nandc.c
18 +++ b/drivers/mtd/nand/raw/qcom_nandc.c
19 @@ -163,6 +163,11 @@
20 /* NAND_CTRL bits */
21 #define BAM_MODE_EN BIT(0)
22
23 +
24 +#define UD_SIZE_BYTES_MASK (0x3ff << UD_SIZE_BYTES)
25 +#define SPARE_SIZE_BYTES_MASK (0xf << SPARE_SIZE_BYTES)
26 +#define ECC_NUM_DATA_BYTES_MASK (0x3ff << ECC_NUM_DATA_BYTES)
27 +
28 /*
29 * the NAND controller performs reads/writes with ECC in 516 byte chunks.
30 * the driver calls the chunks 'step' or 'codeword' interchangeably
31 @@ -443,6 +448,13 @@ struct qcom_nand_controller {
32 * @cfg0, cfg1, cfg0_raw..: NANDc register configurations needed for
33 * ecc/non-ecc mode for the current nand flash
34 * device
35 + *
36 + * @boot_pages_conf: keep track of the current ecc configuration used by
37 + * the driver for read/write operation. (boot pages
38 + * have different configuration than normal page)
39 + * @boot_pages: number of pages starting from 0 used as boot pages
40 + * where the driver will use the boot pages ecc
41 + * configuration for read/write operation
42 */
43 struct qcom_nand_host {
44 struct nand_chip chip;
45 @@ -465,6 +477,9 @@ struct qcom_nand_host {
46 u32 ecc_bch_cfg;
47 u32 clrflashstatus;
48 u32 clrreadstatus;
49 +
50 + bool boot_pages_conf;
51 + u32 boot_pages;
52 };
53
54 /*
55 @@ -474,6 +489,7 @@ struct qcom_nand_host {
56 * @is_bam - whether NAND controller is using BAM
57 * @is_qpic - whether NAND CTRL is part of qpic IP
58 * @qpic_v2 - flag to indicate QPIC IP version 2
59 + * @has_boot_pages - whether NAND has different ecc settings for boot pages
60 * @dev_cmd_reg_start - NAND_DEV_CMD_* registers starting offset
61 */
62 struct qcom_nandc_props {
63 @@ -481,6 +497,7 @@ struct qcom_nandc_props {
64 bool is_bam;
65 bool is_qpic;
66 bool qpic_v2;
67 + bool has_boot_pages;
68 u32 dev_cmd_reg_start;
69 };
70
71 @@ -1691,7 +1708,7 @@ qcom_nandc_read_cw_raw(struct mtd_info *
72 data_size1 = mtd->writesize - host->cw_size * (ecc->steps - 1);
73 oob_size1 = host->bbm_size;
74
75 - if (qcom_nandc_is_last_cw(ecc, cw)) {
76 + if (qcom_nandc_is_last_cw(ecc, cw) && !host->boot_pages_conf) {
77 data_size2 = ecc->size - data_size1 -
78 ((ecc->steps - 1) * 4);
79 oob_size2 = (ecc->steps * 4) + host->ecc_bytes_hw +
80 @@ -1772,7 +1789,7 @@ check_for_erased_page(struct qcom_nand_h
81 }
82
83 for_each_set_bit(cw, &uncorrectable_cws, ecc->steps) {
84 - if (qcom_nandc_is_last_cw(ecc, cw)) {
85 + if (qcom_nandc_is_last_cw(ecc, cw) && !host->boot_pages_conf) {
86 data_size = ecc->size - ((ecc->steps - 1) * 4);
87 oob_size = (ecc->steps * 4) + host->ecc_bytes_hw;
88 } else {
89 @@ -1930,7 +1947,7 @@ static int read_page_ecc(struct qcom_nan
90 for (i = 0; i < ecc->steps; i++) {
91 int data_size, oob_size;
92
93 - if (qcom_nandc_is_last_cw(ecc, i)) {
94 + if (qcom_nandc_is_last_cw(ecc, i) && !host->boot_pages_conf) {
95 data_size = ecc->size - ((ecc->steps - 1) << 2);
96 oob_size = (ecc->steps << 2) + host->ecc_bytes_hw +
97 host->spare_bytes;
98 @@ -2027,6 +2044,30 @@ static int copy_last_cw(struct qcom_nand
99 return ret;
100 }
101
102 +static void
103 +check_boot_pages_conf(struct qcom_nand_host *host, int page)
104 +{
105 + bool boot_pages_conf = page < host->boot_pages;
106 +
107 + /* Skip conf write if we are already in the correct mode */
108 + if (boot_pages_conf != host->boot_pages_conf) {
109 + host->boot_pages_conf = boot_pages_conf;
110 +
111 + host->cw_data = boot_pages_conf ? 512 : 516;
112 + host->spare_bytes = host->cw_size - host->ecc_bytes_hw -
113 + host->bbm_size - host->cw_data;
114 +
115 + host->cfg0 &= ~(SPARE_SIZE_BYTES_MASK | UD_SIZE_BYTES_MASK);
116 + host->cfg0 |= host->spare_bytes << SPARE_SIZE_BYTES |
117 + host->cw_data << UD_SIZE_BYTES;
118 +
119 + host->ecc_bch_cfg &= ~ECC_NUM_DATA_BYTES_MASK;
120 + host->ecc_bch_cfg |= host->cw_data << ECC_NUM_DATA_BYTES;
121 + host->ecc_buf_cfg = (boot_pages_conf ? 0x1ff : 0x203) <<
122 + NUM_STEPS;
123 + }
124 +}
125 +
126 /* implements ecc->read_page() */
127 static int qcom_nandc_read_page(struct nand_chip *chip, uint8_t *buf,
128 int oob_required, int page)
129 @@ -2035,6 +2076,9 @@ static int qcom_nandc_read_page(struct n
130 struct qcom_nand_controller *nandc = get_qcom_nand_controller(chip);
131 u8 *data_buf, *oob_buf = NULL;
132
133 + if (host->boot_pages)
134 + check_boot_pages_conf(host, page);
135 +
136 nand_read_page_op(chip, page, 0, NULL, 0);
137 data_buf = buf;
138 oob_buf = oob_required ? chip->oob_poi : NULL;
139 @@ -2054,6 +2098,9 @@ static int qcom_nandc_read_page_raw(stru
140 int cw, ret;
141 u8 *data_buf = buf, *oob_buf = chip->oob_poi;
142
143 + if (host->boot_pages)
144 + check_boot_pages_conf(host, page);
145 +
146 for (cw = 0; cw < ecc->steps; cw++) {
147 ret = qcom_nandc_read_cw_raw(mtd, chip, data_buf, oob_buf,
148 page, cw);
149 @@ -2074,6 +2121,9 @@ static int qcom_nandc_read_oob(struct na
150 struct qcom_nand_controller *nandc = get_qcom_nand_controller(chip);
151 struct nand_ecc_ctrl *ecc = &chip->ecc;
152
153 + if (host->boot_pages)
154 + check_boot_pages_conf(host, page);
155 +
156 clear_read_regs(nandc);
157 clear_bam_transaction(nandc);
158
159 @@ -2094,6 +2144,9 @@ static int qcom_nandc_write_page(struct
160 u8 *data_buf, *oob_buf;
161 int i, ret;
162
163 + if (host->boot_pages)
164 + check_boot_pages_conf(host, page);
165 +
166 nand_prog_page_begin_op(chip, page, 0, NULL, 0);
167
168 clear_read_regs(nandc);
169 @@ -2109,7 +2162,7 @@ static int qcom_nandc_write_page(struct
170 for (i = 0; i < ecc->steps; i++) {
171 int data_size, oob_size;
172
173 - if (qcom_nandc_is_last_cw(ecc, i)) {
174 + if (qcom_nandc_is_last_cw(ecc, i) && !host->boot_pages_conf) {
175 data_size = ecc->size - ((ecc->steps - 1) << 2);
176 oob_size = (ecc->steps << 2) + host->ecc_bytes_hw +
177 host->spare_bytes;
178 @@ -2166,6 +2219,9 @@ static int qcom_nandc_write_page_raw(str
179 u8 *data_buf, *oob_buf;
180 int i, ret;
181
182 + if (host->boot_pages)
183 + check_boot_pages_conf(host, page);
184 +
185 nand_prog_page_begin_op(chip, page, 0, NULL, 0);
186 clear_read_regs(nandc);
187 clear_bam_transaction(nandc);
188 @@ -2184,7 +2240,7 @@ static int qcom_nandc_write_page_raw(str
189 data_size1 = mtd->writesize - host->cw_size * (ecc->steps - 1);
190 oob_size1 = host->bbm_size;
191
192 - if (qcom_nandc_is_last_cw(ecc, i)) {
193 + if (qcom_nandc_is_last_cw(ecc, i) && !host->boot_pages_conf) {
194 data_size2 = ecc->size - data_size1 -
195 ((ecc->steps - 1) << 2);
196 oob_size2 = (ecc->steps << 2) + host->ecc_bytes_hw +
197 @@ -2244,6 +2300,9 @@ static int qcom_nandc_write_oob(struct n
198 int data_size, oob_size;
199 int ret;
200
201 + if (host->boot_pages)
202 + check_boot_pages_conf(host, page);
203 +
204 host->use_ecc = true;
205 clear_bam_transaction(nandc);
206
207 @@ -2899,6 +2958,7 @@ static int qcom_nand_host_init_and_regis
208 struct nand_chip *chip = &host->chip;
209 struct mtd_info *mtd = nand_to_mtd(chip);
210 struct device *dev = nandc->dev;
211 + u32 boot_pages_size;
212 int ret;
213
214 ret = of_property_read_u32(dn, "reg", &host->cs);
215 @@ -2960,6 +3020,17 @@ static int qcom_nand_host_init_and_regis
216 if (ret)
217 nand_cleanup(chip);
218
219 + if (nandc->props->has_boot_pages &&
220 + of_property_read_bool(dn, "nand-is-boot-medium")) {
221 + ret = of_property_read_u32(dn, "qcom,boot_pages_size",
222 + &boot_pages_size);
223 + if (ret)
224 + dev_warn(dev, "can't get boot pages size");
225 + else
226 + /* Convert size to nand pages */
227 + host->boot_pages = boot_pages_size / mtd->writesize;
228 + }
229 +
230 return ret;
231 }
232
233 @@ -3125,6 +3196,7 @@ static int qcom_nandc_remove(struct plat
234 static const struct qcom_nandc_props ipq806x_nandc_props = {
235 .ecc_modes = (ECC_RS_4BIT | ECC_BCH_8BIT),
236 .is_bam = false,
237 + .has_boot_pages = true,
238 .dev_cmd_reg_start = 0x0,
239 };
240