ipq806x: Add support for IPQ806x chip family
[openwrt/staging/chunkeey.git] / target / linux / ipq806x / patches / 0133-spi-qup-Remove-chip-select-function.patch
1 From 9bc674f40f22596ef8c2ff6d7f9e53da0baa57e9 Mon Sep 17 00:00:00 2001
2 From: Andy Gross <agross@codeaurora.org>
3 Date: Thu, 12 Jun 2014 14:34:10 -0500
4 Subject: [PATCH 133/182] spi: qup: Remove chip select function
5
6 This patch removes the chip select function. Chip select should instead be
7 supported using GPIOs, defining the DT entry "cs-gpios", and letting the SPI
8 core assert/deassert the chip select as it sees fit.
9
10 Signed-off-by: Andy Gross <agross@codeaurora.org>
11 ---
12 .../devicetree/bindings/spi/qcom,spi-qup.txt | 6 ++++
13 drivers/spi/spi-qup.c | 33 ++++----------------
14 2 files changed, 12 insertions(+), 27 deletions(-)
15
16 diff --git a/Documentation/devicetree/bindings/spi/qcom,spi-qup.txt b/Documentation/devicetree/bindings/spi/qcom,spi-qup.txt
17 index b82a268..bee6ff2 100644
18 --- a/Documentation/devicetree/bindings/spi/qcom,spi-qup.txt
19 +++ b/Documentation/devicetree/bindings/spi/qcom,spi-qup.txt
20 @@ -23,6 +23,12 @@ Optional properties:
21 - spi-max-frequency: Specifies maximum SPI clock frequency,
22 Units - Hz. Definition as per
23 Documentation/devicetree/bindings/spi/spi-bus.txt
24 +- num-cs: total number of chipselects
25 +- cs-gpios: should specify GPIOs used for chipselects.
26 + The gpios will be referred to as reg = <index> in the SPI child
27 + nodes. If unspecified, a single SPI device without a chip
28 + select can be used.
29 +
30
31 SPI slave nodes must be children of the SPI master node and can contain
32 properties described in Documentation/devicetree/bindings/spi/spi-bus.txt
33 diff --git a/drivers/spi/spi-qup.c b/drivers/spi/spi-qup.c
34 index 65bf18e..dc128ac 100644
35 --- a/drivers/spi/spi-qup.c
36 +++ b/drivers/spi/spi-qup.c
37 @@ -424,31 +424,6 @@ static int spi_qup_io_config(struct spi_device *spi, struct spi_transfer *xfer)
38 return 0;
39 }
40
41 -static void spi_qup_set_cs(struct spi_device *spi, bool enable)
42 -{
43 - struct spi_qup *controller = spi_master_get_devdata(spi->master);
44 -
45 - u32 iocontol, mask;
46 -
47 - iocontol = readl_relaxed(controller->base + SPI_IO_CONTROL);
48 -
49 - /* Disable auto CS toggle and use manual */
50 - iocontol &= ~SPI_IO_C_MX_CS_MODE;
51 - iocontol |= SPI_IO_C_FORCE_CS;
52 -
53 - iocontol &= ~SPI_IO_C_CS_SELECT_MASK;
54 - iocontol |= SPI_IO_C_CS_SELECT(spi->chip_select);
55 -
56 - mask = SPI_IO_C_CS_N_POLARITY_0 << spi->chip_select;
57 -
58 - if (enable)
59 - iocontol |= mask;
60 - else
61 - iocontol &= ~mask;
62 -
63 - writel_relaxed(iocontol, controller->base + SPI_IO_CONTROL);
64 -}
65 -
66 static int spi_qup_transfer_one(struct spi_master *master,
67 struct spi_device *spi,
68 struct spi_transfer *xfer)
69 @@ -571,12 +546,16 @@ static int spi_qup_probe(struct platform_device *pdev)
70 return -ENOMEM;
71 }
72
73 + /* use num-cs unless not present or out of range */
74 + if (of_property_read_u16(dev->of_node, "num-cs",
75 + &master->num_chipselect) ||
76 + (master->num_chipselect > SPI_NUM_CHIPSELECTS))
77 + master->num_chipselect = SPI_NUM_CHIPSELECTS;
78 +
79 master->bus_num = pdev->id;
80 master->mode_bits = SPI_CPOL | SPI_CPHA | SPI_CS_HIGH | SPI_LOOP;
81 - master->num_chipselect = SPI_NUM_CHIPSELECTS;
82 master->bits_per_word_mask = SPI_BPW_RANGE_MASK(4, 32);
83 master->max_speed_hz = max_freq;
84 - master->set_cs = spi_qup_set_cs;
85 master->transfer_one = spi_qup_transfer_one;
86 master->dev.of_node = pdev->dev.of_node;
87 master->auto_runtime_pm = true;
88 --
89 1.7.10.4
90