target/linux/layerscape/patches-5.4/302-dts-0093-arm64-dts-fsl-Specify-phy-mode-for-CPU-ports.patch

   1 From a55a0d71c2b1000c514f30573ced00879754f223 Mon Sep 17 00:00:00 2001
   2 From: Vladimir Oltean <vladimir.oltean@nxp.com>
   3 Date: Fri, 29 Nov 2019 03:07:14 +0200
   4 Subject: [PATCH] arm64: dts: fsl: Specify phy-mode for CPU ports
   5
   6 PHYLINK requires that device tree nodes have a phy-mode or
   7 phy-connection-type property. The internal Felix ports really are
   8 connected to the ENETC via 2 back-to-back MACs, so the correct MII type
   9 is GMII (one of which is overclocked at 2.5Gbaud, but still GMII).
  10
  11 Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com>
  12 ---
  13  arch/arm64/boot/dts/freescale/fsl-ls1028a.dtsi | 4 ++++
  14  1 file changed, 4 insertions(+)
  15
  16 --- a/arch/arm64/boot/dts/freescale/fsl-ls1028a.dtsi
  17 +++ b/arch/arm64/boot/dts/freescale/fsl-ls1028a.dtsi
  18 @@ -813,6 +813,8 @@
  19                                         /* internal to-cpu ports */
  20                                         port@4 {
  21                                                 reg = <4>;
  22 +                                               phy-mode = "gmii";
  23 +
  24                                                 fixed-link {
  25                                                         speed = <1000>;
  26                                                         full-duplex;
  27 @@ -821,6 +823,8 @@
  28                                         port@5 {
  29                                                 reg = <5>;
  30                                                 ethernet = <&enetc_port3>;
  31 +                                               phy-mode = "gmii";
  32 +
  33                                                 fixed-link {
  34                                                         speed = <1000>;
  35                                                         full-duplex;