target/linux/mediatek/patches/0075-sd.patch

   1 From a5982c5e4b58c4335e789969e04f9e24b894f510 Mon Sep 17 00:00:00 2001
   2 From: John Crispin <blogic@openwrt.org>
   3 Date: Fri, 3 Jul 2015 05:46:39 +0200
   4 Subject: [PATCH 75/76] sd
   5
   6 ---
   7  drivers/mmc/host/mtk-sd.c |   12 ++++++++----
   8  1 file changed, 8 insertions(+), 4 deletions(-)
   9
  10 diff --git a/drivers/mmc/host/mtk-sd.c b/drivers/mmc/host/mtk-sd.c
  11 index 7c20f28..be2b00c 100644
  12 --- a/drivers/mmc/host/mtk-sd.c
  13 +++ b/drivers/mmc/host/mtk-sd.c
  14 @@ -227,11 +227,13 @@ struct mt_gpdma_desc {
  15  #define GPDMA_DESC_BDP         (0x1 << 1)
  16  #define GPDMA_DESC_CHECKSUM    (0xff << 8) /* bit8 ~ bit15 */
  17  #define GPDMA_DESC_INT         (0x1 << 16)
  18 +#define GPDMA_DESC_GPDH4B      (0x1 << 24)
  19 +#define GPDMA_DESC_BDH4B       (0x1 << 28)
  20         u32 next;
  21         u32 ptr;
  22         u32 gpd_data_len;
  23 -#define GPDMA_DESC_BUFLEN      (0xffff) /* bit0 ~ bit15 */
  24 -#define GPDMA_DESC_EXTLEN      (0xff << 16) /* bit16 ~ bit23 */
  25 +#define GPDMA_DESC_BUFLEN      (0xffffff) /* bit0 ~ bit15 */
  26 +#define GPDMA_DESC_EXTLEN      (0xff << 24) /* bit16 ~ bit23 */
  27         u32 arg;
  28         u32 blknum;
  29         u32 cmd;
  30 @@ -243,10 +245,12 @@ struct mt_bdma_desc {
  31  #define BDMA_DESC_CHECKSUM     (0xff << 8) /* bit8 ~ bit15 */
  32  #define BDMA_DESC_BLKPAD       (0x1 << 17)
  33  #define BDMA_DESC_DWPAD                (0x1 << 18)
  34 +#define BDMA_DESC_GPDH4B       (0x1 << 24)
  35 +#define BDMA_DESC_BDH4B                (0x1 << 28)
  36         u32 next;
  37         u32 ptr;
  38         u32 bd_data_len;
  39 -#define BDMA_DESC_BUFLEN       (0xffff) /* bit0 ~ bit15 */
  40 +#define BDMA_DESC_BUFLEN       (0xffffff) /* bit0 ~ bit15 */
  41  };
  42
  43  struct msdc_dma {
  44 @@ -1115,7 +1119,7 @@ static void msdc_init_hw(struct msdc_host *host)
  45         sdr_set_field(host->base + MSDC_IOCON, MSDC_IOCON_DDLSEL, 1);
  46         writel(0x403c004f, host->base + MSDC_PATCH_BIT);
  47         sdr_set_field(host->base + MSDC_PATCH_BIT, MSDC_CKGEN_MSDC_DLY_SEL, 1);
  48 -       writel(0xffff0089, host->base + MSDC_PATCH_BIT1);
  49 +//     writel(0xffff0089, host->base + MSDC_PATCH_BIT1);
  50         /* Configure to enable SDIO mode.
  51          * it's must otherwise sdio cmd5 failed
  52          */
  53 --
  54 1.7.10.4
  55