9fbd7356c496130b61c38a229cc8aed08e5f13dd
[openwrt/staging/chunkeey.git] / target / linux / ramips / dts / DIR-615-H1.dts
1 /dts-v1/;
2
3 #include "rt3352.dtsi"
4
5 #include <dt-bindings/input/input.h>
6
7 / {
8 compatible = "DIR-615-H1", "ralink,rt3352-soc";
9 model = "D-Link DIR-615 H1";
10
11 gpio-leds {
12 compatible = "gpio-leds";
13
14 status {
15 label = "dir-615-h1:amber:status";
16 gpios = <&gpio0 7 0>;
17 };
18
19 status2 {
20 label = "dir-615-h1:green:status";
21 gpios = <&gpio0 9 0>;
22 };
23
24 wan {
25 label = "dir-615-h1:amber:wan";
26 gpios = <&gpio0 12 1>;
27 };
28
29 wan2 {
30 label = "dir-615-h1:green:wan";
31 gpios = <&gpio0 13 1>;
32 };
33
34 wps {
35 label = "dir-615-h1:blue:wps";
36 gpios = <&gpio0 14 1>;
37 };
38 };
39
40 gpio-keys-polled {
41 compatible = "gpio-keys-polled";
42 #address-cells = <1>;
43 #size-cells = <0>;
44 poll-interval = <20>;
45
46 reset {
47 label = "reset";
48 gpios = <&gpio0 10 1>;
49 linux,code = <KEY_RESTART>;
50 };
51
52 wps {
53 label = "wps";
54 gpios = <&gpio0 0 1>;
55 linux,code = <KEY_WPS_BUTTON>;
56 };
57 };
58 };
59
60 &spi0 {
61 status = "okay";
62
63 m25p80@0 {
64 #address-cells = <1>;
65 #size-cells = <1>;
66 compatible = "jedec,spi-nor";
67 reg = <0>;
68 linux,modalias = "m25p80", "mx25l3205d";
69 spi-max-frequency = <10000000>;
70
71 partition@0 {
72 label = "u-boot";
73 reg = <0x0 0x30000>;
74 read-only;
75 };
76
77 partition@30000 {
78 label = "u-boot-env";
79 reg = <0x30000 0x10000>;
80 read-only;
81 };
82
83 factory: partition@40000 {
84 label = "factory";
85 reg = <0x40000 0x10000>;
86 read-only;
87 };
88
89 partition@50000 {
90 label = "firmware";
91 reg = <0x50000 0x3b0000>;
92 };
93 };
94 };
95
96 &pinctrl {
97 state_default: pinctrl0 {
98 gpio {
99 ralink,group = "i2c", "jtag", "uartf";
100 ralink,function = "gpio";
101 };
102
103 rgmii {
104 ralink,group = "rgmii";
105 ralink,function = "rgmii";
106 };
107
108 mdio {
109 ralink,group = "mdio";
110 ralink,function = "mdio";
111 };
112 };
113 };
114
115 &ethernet {
116 mtd-mac-address = <&factory 0x28>;
117 };
118
119 &esw {
120 mediatek,portmap = <0x2f>;
121 };
122
123 &wmac {
124 ralink,mtd-eeprom = <&factory 0>;
125 };