ralink: use fe_reset to control all reset
[openwrt/staging/chunkeey.git] / target / linux / ramips / files / drivers / net / ethernet / ralink / soc_rt3883.c
1 /*
2 * This program is free software; you can redistribute it and/or modify
3 * it under the terms of the GNU General Public License as published by
4 * the Free Software Foundation; version 2 of the License
5 *
6 * This program is distributed in the hope that it will be useful,
7 * but WITHOUT ANY WARRANTY; without even the implied warranty of
8 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
9 * GNU General Public License for more details.
10 *
11 * You should have received a copy of the GNU General Public License
12 * along with this program; if not, write to the Free Software
13 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307, USA.
14 *
15 * Copyright (C) 2009-2013 John Crispin <blogic@openwrt.org>
16 */
17
18 #include <linux/module.h>
19
20 #include <asm/mach-ralink/ralink_regs.h>
21
22 #include "ralink_soc_eth.h"
23 #include "mdio_rt2880.h"
24
25 #define RT3883_RSTCTRL_FE BIT(21)
26
27 static void rt3883_fe_reset(void)
28 {
29 fe_reset(RT3883_RSTCTRL_FE);
30 }
31
32 static int rt3883_fwd_config(struct fe_priv *priv)
33 {
34 int ret;
35
36 ret = fe_set_clock_cycle(priv);
37 if (ret)
38 return ret;
39
40 fe_fwd_config(priv);
41 fe_w32(FE_PSE_FQFC_CFG_256Q, FE_PSE_FQ_CFG);
42 fe_csum_config(priv);
43
44 return ret;
45 }
46
47 static void rt3883_init_data(struct fe_soc_data *data,
48 struct net_device *netdev)
49 {
50 struct fe_priv *priv = netdev_priv(netdev);
51
52 priv->flags = FE_FLAG_PADDING_64B | FE_FLAG_PADDING_BUG |
53 FE_FLAG_JUMBO_FRAME;
54 netdev->hw_features = NETIF_F_SG | NETIF_F_IP_CSUM |
55 NETIF_F_RXCSUM | NETIF_F_HW_VLAN_CTAG_TX;
56 }
57
58 static struct fe_soc_data rt3883_data = {
59 .mac = { 0x00, 0x11, 0x22, 0x33, 0x44, 0x55 },
60 .init_data = rt3883_init_data,
61 .reset_fe = rt3883_fe_reset,
62 .fwd_config = rt3883_fwd_config,
63 .pdma_glo_cfg = FE_PDMA_SIZE_8DWORDS,
64 .rx_int = FE_RX_DONE_INT,
65 .tx_int = FE_TX_DONE_INT,
66 .checksum_bit = RX_DMA_L4VALID,
67 .tx_udf_bit = TX_DMA_UDF,
68 .mdio_read = rt2880_mdio_read,
69 .mdio_write = rt2880_mdio_write,
70 .mdio_adjust_link = rt2880_mdio_link_adjust,
71 .port_init = rt2880_port_init,
72 };
73
74 const struct of_device_id of_fe_match[] = {
75 { .compatible = "ralink,rt3883-eth", .data = &rt3883_data },
76 {},
77 };
78
79 MODULE_DEVICE_TABLE(of, of_fe_match);
80