kernel: update kernel 3.18 to version 3.18.23
[openwrt/staging/chunkeey.git] / target / linux / sunxi / patches-4.1 / 162-clk-sunxi-codec-clock.patch
1 From 9b95732096c11d84bd0082aed0d575d8c09e3ab6 Mon Sep 17 00:00:00 2001
2 From: =?UTF-8?q?Emilio=20L=C3=B3pez?= <emilio@elopez.com.ar>
3 Date: Fri, 18 Jul 2014 15:49:37 -0300
4 Subject: [PATCH] clk: sunxi: codec clock support
5 MIME-Version: 1.0
6 Content-Type: text/plain; charset=UTF-8
7 Content-Transfer-Encoding: 8bit
8
9 The codec clock on sun4i, sun5i and sun7i is a simple gate with PLL2 as
10 parent.
11
12 Signed-off-by: Emilio López <emilio@elopez.com.ar>
13 Signed-off-by: Hans de Goede <hdegoede@redhat.com>
14 ---
15 drivers/clk/sunxi/Makefile | 1 +
16 drivers/clk/sunxi/clk-a10-codec.c | 41 +++++++++++++++++++++++++++++++++++++++
17 2 files changed, 42 insertions(+)
18 create mode 100644 drivers/clk/sunxi/clk-a10-codec.c
19
20 --- a/drivers/clk/sunxi/Makefile
21 +++ b/drivers/clk/sunxi/Makefile
22 @@ -3,6 +3,7 @@
23 #
24
25 obj-y += clk-sunxi.o clk-factors.o
26 +obj-y += clk-a10-codec.o
27 obj-y += clk-a10-hosc.o
28 obj-y += clk-a10-pll2.o
29 obj-y += clk-a20-gmac.o
30 --- /dev/null
31 +++ b/drivers/clk/sunxi/clk-a10-codec.c
32 @@ -0,0 +1,41 @@
33 +/*
34 + * Copyright 2013 Emilio López
35 + *
36 + * Emilio López <emilio@elopez.com.ar>
37 + *
38 + * This program is free software; you can redistribute it and/or modify
39 + * it under the terms of the GNU General Public License as published by
40 + * the Free Software Foundation; either version 2 of the License, or
41 + * (at your option) any later version.
42 + *
43 + * This program is distributed in the hope that it will be useful,
44 + * but WITHOUT ANY WARRANTY; without even the implied warranty of
45 + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
46 + * GNU General Public License for more details.
47 + */
48 +
49 +#include <linux/clk-provider.h>
50 +#include <linux/clkdev.h>
51 +#include <linux/of.h>
52 +#include <linux/of_address.h>
53 +
54 +#define SUN4I_CODEC_GATE 31
55 +
56 +static void __init sun4i_codec_clk_setup(struct device_node *node)
57 +{
58 + struct clk *clk;
59 + const char *clk_name = node->name, *parent_name;
60 + void __iomem *reg;
61 +
62 + of_property_read_string(node, "clock-output-names", &clk_name);
63 + parent_name = of_clk_get_parent_name(node, 0);
64 + reg = of_iomap(node, 0);
65 +
66 + clk = clk_register_gate(NULL, clk_name, parent_name,
67 + CLK_SET_RATE_PARENT, reg,
68 + SUN4I_CODEC_GATE, 0, NULL);
69 +
70 + if (!IS_ERR(clk))
71 + of_clk_add_provider(node, of_clk_src_simple_get, clk);
72 +}
73 +CLK_OF_DECLARE(sun4i_codec, "allwinner,sun4i-a10-codec-clk", sun4i_codec_clk_setup);