sunxi: Backport patches from kernel 4.11 for A64
[openwrt/staging/chunkeey.git] / target / linux / sunxi / patches-4.9 / 0020-arm64-allwinner-a64-Add-MMC-pinctrl-nodes.patch
1 From a3e8f4926248b3c12933aacec4432e9b6de004bb Mon Sep 17 00:00:00 2001
2 From: Maxime Ripard <maxime.ripard@free-electrons.com>
3 Date: Mon, 9 Jan 2017 16:39:15 +0100
4 Subject: arm64: allwinner: a64: Add MMC pinctrl nodes
5
6 The A64 only has a single set of pins for each MMC controller. Since we
7 already have boards that require all of them, let's add them to the DTSI.
8
9 Reviewed-by: Andre Przywara <andre.przywara@arm.com>
10 Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
11 Tested-by: Florian Vaussard <florian.vaussard@heig-vd.ch>
12 Acked-by: Chen-Yu Tsai <wens@csie.org>
13 ---
14 arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi | 25 +++++++++++++++++++++++++
15 1 file changed, 25 insertions(+)
16
17 --- a/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi
18 +++ b/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi
19 @@ -243,6 +243,31 @@
20 function = "i2c1";
21 };
22
23 + mmc0_pins: mmc0-pins {
24 + pins = "PF0", "PF1", "PF2", "PF3",
25 + "PF4", "PF5";
26 + function = "mmc0";
27 + drive-strength = <30>;
28 + bias-pull-up;
29 + };
30 +
31 + mmc1_pins: mmc1-pins {
32 + pins = "PG0", "PG1", "PG2", "PG3",
33 + "PG4", "PG5";
34 + function = "mmc1";
35 + drive-strength = <30>;
36 + bias-pull-up;
37 + };
38 +
39 + mmc2_pins: mmc2-pins {
40 + pins = "PC1", "PC5", "PC6", "PC8", "PC9",
41 + "PC10","PC11", "PC12", "PC13",
42 + "PC14", "PC15", "PC16";
43 + function = "mmc2";
44 + drive-strength = <30>;
45 + bias-pull-up;
46 + };
47 +
48 uart0_pins_a: uart0@0 {
49 pins = "PB8", "PB9";
50 function = "uart0";