imx6: add support for gw51xx
authorLuka Perkov <luka@openwrt.org>
Wed, 25 Sep 2013 18:07:24 +0000 (18:07 +0000)
committerLuka Perkov <luka@openwrt.org>
Wed, 25 Sep 2013 18:07:24 +0000 (18:07 +0000)
The Gateworks GW51xx family of products is based on the Freescale
i.MX6DL SoC and offers a small form-factor with peripherals such as:

 - i.MX6DL 512MB DDR3
 - 256MB NAND FLASH
 - 1x PCIe
 - 1x USB EHCI (to PCIe socket)
 - 1x USB OTG
 - HDMI out
 - Analog Video in
 - Gateworks System Controller

Signed-off-by: Tim Harvey <tharvey@gateworks.com>
SVN-Revision: 38189

target/linux/imx6/files-3.10/arch/arm/boot/dts/imx6dl-gw51xx.dts [new file with mode: 0644]
target/linux/imx6/patches-3.10/112-gw51xx.patch [new file with mode: 0644]

diff --git a/target/linux/imx6/files-3.10/arch/arm/boot/dts/imx6dl-gw51xx.dts b/target/linux/imx6/files-3.10/arch/arm/boot/dts/imx6dl-gw51xx.dts
new file mode 100644 (file)
index 0000000..2f92150
--- /dev/null
@@ -0,0 +1,236 @@
+/*
+ * Copyright 2013 Gateworks Corporation
+ *
+ * The code contained herein is licensed under the GNU General Public
+ * License. You may obtain a copy of the GNU General Public License
+ * Version 2 or later at the following locations:
+ *
+ * http://www.opensource.org/licenses/gpl-license.html
+ * http://www.gnu.org/copyleft/gpl.html
+ */
+
+/dts-v1/;
+#include "imx6dl.dtsi"
+
+/ {
+       model = "Gateworks Ventana GW51XX";
+       compatible = "gw,imx6dl-gw51xx", "gw,ventana", "fsl,imx6dl";
+
+       /* these are used by bootloader for disabling nodes */
+       aliases {
+               can0 = &can1;
+               ethernet0 = &fec;
+               i2c0 = &i2c1;
+               i2c1 = &i2c2;
+               i2c2 = &i2c3;
+               ipu0 = &ipu1;
+               led0 = &led0;
+               led1 = &led1;
+               nand = &gpmi;
+               pwm0 = &pwm1;
+               pwm1 = &pwm2;
+               pwm2 = &pwm3;
+               pwm3 = &pwm4;
+               spi0 = &ecspi1;
+               spi1 = &ecspi2;
+               spi2 = &ecspi3;
+               spi3 = &ecspi4;
+               ssi0 = &ssi1;
+               ssi1 = &ssi2;
+               usb0 = &usbh3;
+               usb1 = &usbotg;
+               usdhc0 = &usdhc1;
+               usdhc1 = &usdhc2;
+               usdhc2 = &usdhc3;
+               usdhc3 = &usdhc4;
+       };
+
+       memory {
+               reg = <0x10000000 0x40000000>;
+       };
+
+       leds {
+               compatible = "gpio-leds";
+
+               led0: user1 {
+                       label = "user1";
+                       gpios = <&gpio4 6 0>; /* 102 -> MX6_PANLEDG */
+                       default-state = "on";
+                       linux,default-trigger = "heartbeat";
+               };
+
+               led1: user2 {
+                       label = "user2";
+                       gpios = <&gpio4 7 0>; /* 103 -> MX6_PANLEDR */
+                       default-state = "off";
+               };
+       };
+
+       regulators {
+               compatible = "simple-bus";
+
+               reg_2p5v: 2p5v {
+                       compatible = "regulator-fixed";
+                       regulator-name = "2P5V";
+                       regulator-min-microvolt = <2500000>;
+                       regulator-max-microvolt = <2500000>;
+                       regulator-always-on;
+               };
+
+               reg_3p3v: 3p3v {
+                       compatible = "regulator-fixed";
+                       regulator-name = "3P3V";
+                       regulator-min-microvolt = <3300000>;
+                       regulator-max-microvolt = <3300000>;
+                       regulator-always-on;
+               };
+
+               reg_usb_otg_vbus: usb_otg_vbus {
+                       compatible = "regulator-fixed";
+                       regulator-name = "usb_otg_vbus";
+                       regulator-min-microvolt = <5000000>;
+                       regulator-max-microvolt = <5000000>;
+                       gpio = <&gpio3 22 0>;
+                       enable-active-high;
+               };
+       };
+};
+
+&fec {
+       pinctrl-names = "default";
+       pinctrl-0 = <&pinctrl_enet_1>;
+       phy-mode = "rgmii";
+       phy-reset-gpios = <&gpio1 30 0>;
+       status = "okay";
+};
+
+&gpmi {
+       pinctrl-names = "default";
+       pinctrl-0 = <&pinctrl_gpmi_nand_2>;
+       status = "okay";
+};
+
+&i2c1 {
+       status = "okay";
+       clock-frequency = <100000>;
+       pinctrl-names = "default";
+       pinctrl-0 = <&pinctrl_i2c1_1>;
+
+       eeprom: eeprom@50 {
+               compatible = "atmel,24c02";
+               reg = <0x50>;
+               pagesize = <16>;
+       };
+
+       eeprom1: eeprom@50 {
+               compatible = "atmel,24c02";
+               reg = <0x50>;
+               pagesize = <16>;
+       };
+
+       eeprom2: eeprom@51 {
+               compatible = "atmel,24c02";
+               reg = <0x51>;
+               pagesize = <16>;
+       };
+
+       eeprom3: eeprom@52 {
+               compatible = "atmel,24c02";
+               reg = <0x52>;
+               pagesize = <16>;
+       };
+
+       eeprom4: eeprom@53 {
+               compatible = "atmel,24c02";
+               reg = <0x53>;
+               pagesize = <16>;
+       };
+
+       rtc: ds1672@68 {
+               compatible = "dallas,ds1672";
+               reg = <0x68>;
+       };
+
+       gpio: pca9555@23 {
+               compatible = "nxp,pca9555";
+               reg = <0x23>;
+               gpio-controller;
+               #gpio-cells = <2>;
+       };
+
+       hwmon: gsc@29 {
+               compatible = "gw,gsp";
+               reg = <0x29>;
+       };
+};
+
+&i2c2 {
+       status = "okay";
+       clock-frequency = <100000>;
+       pinctrl-names = "default";
+       pinctrl-0 = <&pinctrl_i2c2_2>;
+};
+
+&i2c3 {
+       status = "okay";
+       clock-frequency = <100000>;
+       pinctrl-names = "default";
+       pinctrl-0 = <&pinctrl_i2c3_2>;
+
+       videoin: adv7180@20 {
+               compatible = "adi,adv7180";
+               reg = <0x20>;
+       };
+};
+
+&iomuxc {
+       pinctrl-names = "default";
+       pinctrl-0 = <&pinctrl_hog>;
+
+       hog {
+               pinctrl_hog: hoggrp {
+                       fsl,pins = <
+                               MX6DL_PAD_KEY_COL0__GPIO4_IO06  0x80000000 /* user1 led */
+                               MX6DL_PAD_KEY_ROW0__GPIO4_IO07  0x80000000 /* user2 led */
+                               MX6DL_PAD_ENET_TXD0__GPIO1_IO30 0x80000000 /* PHY Reset */
+                               MX6DL_PAD_EIM_D22__GPIO3_IO22   0x80000000 /* OTG_PWR_EN */
+                               MX6DL_PAD_GPIO_0__GPIO1_IO00    0x80000000 /* PCIE_RST# */
+                               MX6DL_PAD_EIM_A19__GPIO2_IO19   0x80000000 /* MEZZ_DIO0 */
+                               MX6DL_PAD_EIM_A20__GPIO2_IO18   0x80000000 /* MEZZ_DIO1 */
+                        >;
+               };
+       };
+};
+
+&pcie {
+       reset-gpio = <&gpio1 0 0>;
+       status = "okay";
+};
+
+&uart1 {
+       pinctrl-names = "default";
+       pinctrl-0 = <&pinctrl_uart1_2>;
+       status = "okay";
+};
+
+&uart2 {
+       pinctrl-names = "default";
+       pinctrl-0 = <&pinctrl_uart2_1>;
+       status = "okay";
+};
+
+&uart3 {
+       pinctrl-names = "default";
+       pinctrl-0 = <&pinctrl_uart3_1>;
+       status = "okay";
+};
+
+&uart5 {
+       pinctrl-names = "default";
+       pinctrl-0 = <&pinctrl_uart5_1>;
+       status = "okay";
+};
+
+&usbh1 {
+       status = "okay";
+};
diff --git a/target/linux/imx6/patches-3.10/112-gw51xx.patch b/target/linux/imx6/patches-3.10/112-gw51xx.patch
new file mode 100644 (file)
index 0000000..1749c28
--- /dev/null
@@ -0,0 +1,161 @@
+--- a/arch/arm/boot/dts/imx6dl.dtsi
++++ b/arch/arm/boot/dts/imx6dl.dtsi
+@@ -80,6 +80,95 @@
+                                       };
+                               };
++                              gpmi-nand {
++                                      pinctrl_gpmi_nand_1: gpmi-nand-1 {
++                                              fsl,pins = <
++                                                      MX6DL_PAD_NANDF_CLE__NAND_CLE     0xb0b1
++                                                      MX6DL_PAD_NANDF_ALE__NAND_ALE     0xb0b1
++                                                      MX6DL_PAD_NANDF_WP_B__NAND_WP_B   0xb0b1
++                                                      MX6DL_PAD_NANDF_RB0__NAND_READY_B 0xb000
++                                                      MX6DL_PAD_NANDF_CS0__NAND_CE0_B   0xb0b1
++                                                      MX6DL_PAD_NANDF_CS1__NAND_CE1_B   0xb0b1
++                                                      MX6DL_PAD_NANDF_CS2__NAND_CE2_B   0xb0b1
++                                                      MX6DL_PAD_NANDF_CS3__NAND_CE3_B   0xb0b1
++                                                      MX6DL_PAD_SD4_CMD__NAND_RE_B      0xb0b1
++                                                      MX6DL_PAD_SD4_CLK__NAND_WE_B      0xb0b1
++                                                      MX6DL_PAD_NANDF_D0__NAND_DATA00   0xb0b1
++                                                      MX6DL_PAD_NANDF_D1__NAND_DATA01   0xb0b1
++                                                      MX6DL_PAD_NANDF_D2__NAND_DATA02   0xb0b1
++                                                      MX6DL_PAD_NANDF_D3__NAND_DATA03   0xb0b1
++                                                      MX6DL_PAD_NANDF_D4__NAND_DATA04   0xb0b1
++                                                      MX6DL_PAD_NANDF_D5__NAND_DATA05   0xb0b1
++                                                      MX6DL_PAD_NANDF_D6__NAND_DATA06   0xb0b1
++                                                      MX6DL_PAD_NANDF_D7__NAND_DATA07   0xb0b1
++                                                      MX6DL_PAD_SD4_DAT0__NAND_DQS      0x00b1
++                                              >;
++                                      };
++
++                                      /* No strobe */
++                                      pinctrl_gpmi_nand_2: gpmi-nand-2 {
++                                              fsl,pins = <
++                                                      MX6DL_PAD_NANDF_CLE__NAND_CLE     0xb0b1
++                                                      MX6DL_PAD_NANDF_ALE__NAND_ALE     0xb0b1
++                                                      MX6DL_PAD_NANDF_WP_B__NAND_WP_B   0xb0b1
++                                                      MX6DL_PAD_NANDF_RB0__NAND_READY_B 0xb000
++                                                      MX6DL_PAD_NANDF_CS0__NAND_CE0_B   0xb0b1
++                                                      MX6DL_PAD_NANDF_CS1__NAND_CE1_B   0xb0b1
++                                                      MX6DL_PAD_NANDF_CS2__NAND_CE2_B   0xb0b1
++                                                      MX6DL_PAD_NANDF_CS3__NAND_CE3_B   0xb0b1
++                                                      MX6DL_PAD_SD4_CMD__NAND_RE_B      0xb0b1
++                                                      MX6DL_PAD_SD4_CLK__NAND_WE_B      0xb0b1
++                                                      MX6DL_PAD_NANDF_D0__NAND_DATA00   0xb0b1
++                                                      MX6DL_PAD_NANDF_D1__NAND_DATA01   0xb0b1
++                                                      MX6DL_PAD_NANDF_D2__NAND_DATA02   0xb0b1
++                                                      MX6DL_PAD_NANDF_D3__NAND_DATA03   0xb0b1
++                                                      MX6DL_PAD_NANDF_D4__NAND_DATA04   0xb0b1
++                                                      MX6DL_PAD_NANDF_D5__NAND_DATA05   0xb0b1
++                                                      MX6DL_PAD_NANDF_D6__NAND_DATA06   0xb0b1
++                                                      MX6DL_PAD_NANDF_D7__NAND_DATA07   0xb0b1
++                                              >;
++                                      };
++                              };
++
++                              i2c1 {
++                                      pinctrl_i2c1_1: i2c1grp-1 {
++                                              fsl,pins = <
++                                                      MX6DL_PAD_EIM_D21__I2C1_SCL 0x4001b8b1
++                                                      MX6DL_PAD_EIM_D28__I2C1_SDA 0x4001b8b1
++                                              >;
++                                      };
++                              };
++
++                              i2c2 {
++                                      pinctrl_i2c2_1: i2c2grp-1 {
++                                              fsl,pins = <
++                                                      MX6DL_PAD_EIM_EB2__I2C2_SCL 0x4001b8b1
++                                                      MX6DL_PAD_EIM_D16__I2C2_SDA 0x4001b8b1
++                                              >;
++                                      };
++                                      pinctrl_i2c2_2: i2c2grp-2 {
++                                              fsl,pins = <
++                                                      MX6DL_PAD_KEY_COL3__I2C2_SCL 0x4001b8b1
++                                                      MX6DL_PAD_KEY_ROW3__I2C2_SDA 0x4001b8b1
++                                              >;
++                                      };
++                              };
++
++                              i2c3 {
++                                      pinctrl_i2c3_1: i2c3grp-1 {
++                                              fsl,pins = <
++                                                      MX6DL_PAD_EIM_D17__I2C3_SCL 0x4001b8b1
++                                                      MX6DL_PAD_EIM_D18__I2C3_SDA 0x4001b8b1
++                                              >;
++                                      };
++                                      pinctrl_i2c3_2: i2c3grp-2 {
++                                              fsl,pins = <
++                                                      MX6DL_PAD_GPIO_3__I2C3_SCL 0x4001b8b1
++                                                      MX6DL_PAD_GPIO_6__I2C3_SDA 0x4001b8b1
++                                              >;
++                                      };
++                              };
++
+                               uart1 {
+                                       pinctrl_uart1_1: uart1grp-1 {
+                                               fsl,pins = <
+@@ -87,6 +176,36 @@
+                                                       MX6DL_PAD_CSI0_DAT11__UART1_RX_DATA 0x1b0b1
+                                               >;
+                                       };
++                                      pinctrl_uart1_2: uart1grp-2 {
++                                              fsl,pins = <
++                                                      MX6DL_PAD_SD3_DAT6__UART1_RX_DATA 0x1b0b1
++                                                      MX6DL_PAD_SD3_DAT7__UART1_TX_DATA 0x1b0b1
++                                              >;
++                                      };
++                              };
++
++                              uart2 {
++                                      pinctrl_uart2_1: uart2grp-1 {
++                                              fsl,pins = <
++                                                      MX6DL_PAD_SD4_DAT7__UART2_TX_DATA 0x1b0b1
++                                                      MX6DL_PAD_SD4_DAT4__UART2_RX_DATA 0x1b0b1
++                                              >;
++                                      };
++                                      pinctrl_uart2_2: uart2grp-2 {
++                                              fsl,pins = <
++                                                      MX6DL_PAD_SD4_DAT7__UART2_RX_DATA 0x1b0b1
++                                                      MX6DL_PAD_SD4_DAT4__UART2_TX_DATA 0x1b0b1
++                                              >;
++                                      };
++                              };
++
++                              uart3 {
++                                      pinctrl_uart3_1: uart3grp-1 {
++                                              fsl,pins = <
++                                                      MX6DL_PAD_EIM_D24__UART3_TX_DATA 0x1b0b1
++                                                      MX6DL_PAD_EIM_D25__UART3_RX_DATA 0x1b0b1
++                                              >;
++                                      };
+                               };
+                               uart4 {
+@@ -97,6 +216,15 @@
+                                               >;
+                                       };
+                               };
++
++                              uart5 {
++                                      pinctrl_uart5_1: uart5grp-1 {
++                                              fsl,pins = <
++                                                      MX6DL_PAD_KEY_COL1__UART5_TX_DATA 0x1b0b1
++                                                      MX6DL_PAD_KEY_ROW1__UART5_RX_DATA 0x1b0b1
++                                              >;
++                                      };
++                              };
+                               usbotg {
+                                       pinctrl_usbotg_2: usbotggrp-2 {
+--- a/arch/arm/boot/dts/Makefile
++++ b/arch/arm/boot/dts/Makefile
+@@ -119,6 +119,7 @@ dtb-$(CONFIG_ARCH_MXC) += \
+       imx6q-arm2.dtb \
+       imx6q-gw5400-a.dtb \
+       imx6q-gw54xx.dtb \
++      imx6dl-gw51xx.dtb \
+       imx6q-sabreauto.dtb \
+       imx6q-sabrelite.dtb \
+       imx6q-sabresd.dtb \