This patch 220-add-sunxi50i-nanopi-neo-plus2.patch was merged upstream.
The u-boot-sunxi-with-spl.bin is now also created for the ARM64 sunxi
boards by U-Boot itself, no need to do it manually any more.
This was tested on a H2+ Orange Pi R1 and a H5 Orange Pi Zero Plus.
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
include $(TOPDIR)/rules.mk
include $(INCLUDE_DIR)/kernel.mk
-PKG_VERSION:=2017.11
+PKG_VERSION:=2018.05
-PKG_HASH:=6a018fd3caf58f3dcfa23ee989a82bd35df03af71872b9dca8c6d758a0d26c05
+PKG_HASH:=4da13c2a6139a78cc08608f21fd4741db27eda336cfad7ab8264fda923b9c048
PKG_MAINTAINER:=Zoltan HERPAI <wigyori@uid0.hu>
define Build/InstallDev
$(INSTALL_DIR) $(STAGING_DIR_IMAGE)
-ifeq ($(SUBTARGET),cortexa53)
- cat $(PKG_BUILD_DIR)/spl/sunxi-spl.bin $(PKG_BUILD_DIR)/u-boot.itb > $(STAGING_DIR_IMAGE)/$(BUILD_DEVICES)-u-boot-with-spl.bin
-else
$(CP) $(PKG_BUILD_DIR)/$(UBOOT_IMAGE) $(STAGING_DIR_IMAGE)/$(BUILD_DEVICES)-u-boot-with-spl.bin
-endif
mkimage -C none -A arm -T script -d uEnv-$(UENV).txt \
$(STAGING_DIR_IMAGE)/$(BUILD_DEVICES)-boot.scr
endef
--- a/arch/arm/dts/Makefile
+++ b/arch/arm/dts/Makefile
-@@ -261,6 +261,7 @@ dtb-$(CONFIG_MACH_SUN6I) += \
+@@ -290,6 +290,7 @@ dtb-$(CONFIG_MACH_SUN6I) += \
sun6i-a31-m9.dtb \
sun6i-a31-mele-a1000g-quad.dtb \
sun6i-a31-mixtile-loftq.dtb \
+CONFIG_SUNXI_SPI=y
--- a/arch/arm/mach-sunxi/Kconfig
+++ b/arch/arm/mach-sunxi/Kconfig
-@@ -752,6 +752,14 @@ config VIDEO_LCD_PANEL_I2C_SCL
+@@ -836,6 +836,14 @@ config VIDEO_LCD_PANEL_I2C_SCL
Set the SCL pin for the LCD i2c interface. This takes a string in the
format understood by sunxi_name_to_gpio, e.g. PH1 for pin 1 of port H.
--- a/configs/A20-OLinuXino-Lime2_defconfig
+++ b/configs/A20-OLinuXino-Lime2_defconfig
-@@ -24,6 +24,7 @@ CONFIG_DFU_RAM=y
+@@ -22,6 +22,7 @@ CONFIG_DFU_RAM=y
CONFIG_ETH_DESIGNWARE=y
CONFIG_RGMII=y
CONFIG_SUN7I_GMAC=y
--- a/arch/arm/mach-sunxi/clock_sun6i.c
+++ b/arch/arm/mach-sunxi/clock_sun6i.c
-@@ -113,11 +113,12 @@ void clock_set_pll1(unsigned int clk)
+@@ -112,11 +112,12 @@ void clock_set_pll1(unsigned int clk)
struct sunxi_ccm_reg * const ccm =
(struct sunxi_ccm_reg *)SUNXI_CCM_BASE;
const int p = 0;
--- a/arch/arm/mach-sunxi/clock_sun6i.c
+++ b/arch/arm/mach-sunxi/clock_sun6i.c
-@@ -26,13 +26,26 @@ void clock_init_safe(void)
+@@ -25,13 +25,26 @@ void clock_init_safe(void)
struct sunxi_prcm_reg * const prcm =
(struct sunxi_prcm_reg *)SUNXI_PRCM_BASE;
#if defined(CONFIG_MACH_SUN8I_R40) || defined(CONFIG_MACH_SUN50I)
--- a/arch/arm/include/asm/arch-sunxi/prcm.h
+++ b/arch/arm/include/asm/arch-sunxi/prcm.h
-@@ -111,13 +111,13 @@
+@@ -110,13 +110,13 @@
#define PRCM_PLL_CTRL_LDO_OUT_MASK \
__PRCM_PLL_CTRL_LDO_OUT(0x7)
/* When using the low voltage 20 mV steps, and high voltage 30 mV steps */
--- a/arch/arm/include/asm/arch-sunxi/gpio.h
+++ b/arch/arm/include/asm/arch-sunxi/gpio.h
-@@ -186,6 +186,7 @@ enum sunxi_gpio_number {
+@@ -185,6 +185,7 @@ enum sunxi_gpio_number {
#define SUN6I_GPG_SDC1 2
#define SUN8I_GPG_SDC1 2
#define SUN6I_GPG_TWI3 2
--- a/arch/arm/mach-sunxi/board.c
+++ b/arch/arm/mach-sunxi/board.c
-@@ -124,6 +124,10 @@ static int gpio_init(void)
+@@ -123,6 +123,10 @@ static int gpio_init(void)
sunxi_gpio_set_cfgpin(SUNXI_GPG(3), SUN5I_GPG_UART1);
sunxi_gpio_set_cfgpin(SUNXI_GPG(4), SUN5I_GPG_UART1);
sunxi_gpio_set_pull(SUNXI_GPG(4), SUNXI_GPIO_PULL_UP);
--- a/arch/arm/mach-sunxi/Kconfig
+++ b/arch/arm/mach-sunxi/Kconfig
-@@ -416,6 +416,14 @@ config SYS_BOARD
+@@ -500,6 +500,14 @@ config SYS_BOARD
config SYS_SOC
default "sunxi"
--- a/tools/fit_image.c
+++ b/tools/fit_image.c
-@@ -650,9 +650,14 @@ static int fit_handle_file(struct image_
+@@ -649,9 +649,14 @@ static int fit_handle_file(struct image_
}
*cmd = '\0';
} else if (params->datafile) {
+ if (!dtc)
+ dtc = MKIMAGE_DTC;
+
- /* dtc -I dts -O dtb -p 500 datafile > tmpfile */
- snprintf(cmd, sizeof(cmd), "%s %s \"%s\" > \"%s\"",
-- MKIMAGE_DTC, params->dtc, params->datafile, tmpfile);
-+ dtc, params->dtc, params->datafile, tmpfile);
+ /* dtc -I dts -O dtb -p 500 -o tmpfile datafile */
+ snprintf(cmd, sizeof(cmd), "%s %s -o \"%s\" \"%s\"",
+- MKIMAGE_DTC, params->dtc, tmpfile, params->datafile);
++ dtc, params->dtc, tmpfile, params->datafile);
debug("Trying to execute \"%s\"\n", cmd);
} else {
snprintf(cmd, sizeof(cmd), "cp \"%s\" \"%s\"",
--- a/Makefile
+++ b/Makefile
-@@ -1144,9 +1144,10 @@ u-boot-x86-16bit.bin: u-boot FORCE
- endif
+@@ -1215,8 +1215,10 @@ endif
ifneq ($(CONFIG_ARCH_SUNXI),)
--u-boot-sunxi-with-spl.bin: spl/sunxi-spl.bin u-boot.img u-boot.dtb \
-- checkbinman FORCE
+ ifeq ($(CONFIG_ARM64),)
+-u-boot-sunxi-with-spl.bin: spl/sunxi-spl.bin u-boot.img u-boot.dtb FORCE
- $(call if_changed,binman)
+OBJCOPYFLAGS_u-boot-sunxi-with-spl.bin = -I binary -O binary \
+ --pad-to=$(CONFIG_SPL_PAD_TO) --gap-fill=0xff
+u-boot-sunxi-with-spl.bin: spl/sunxi-spl.bin u-boot.img FORCE
+ $(call if_changed,pad_cat)
- endif
+ else
+ u-boot-sunxi-with-spl.bin: spl/sunxi-spl.bin u-boot.itb FORCE
+ $(call if_changed,cat)
+--- a/arch/arm/Kconfig
++++ b/arch/arm/Kconfig
+@@ -711,7 +711,6 @@ config ARCH_SOCFPGA
- ifneq ($(CONFIG_TEGRA),)
+ config ARCH_SUNXI
+ bool "Support sunxi (Allwinner) SoCs"
+- select BINMAN
+ select CMD_GPIO
+ select CMD_MMC if MMC
+ select CMD_USB if DISTRO_DEFAULTS
+++ /dev/null
-From 77f54e8698001d8a987f2aa4870f71b65dc089eb Mon Sep 17 00:00:00 2001
-In-Reply-To: <20170921152217.4011-1-antony@phenome.org>
-References: <20170921152217.4011-1-antony@phenome.org>
-From: Antony Antony <antony@phenome.org>
-Date: Thu, 21 Sep 2017 13:34:07 +0200
-Subject: [PATCH v5 1/2] sun50i: h5: Add NanoPi Neo Plus2 DT initial support
-
-Add initial DT for NanoPi NEO Plus2 by FriendlyARM
-- Allwinner quad core H5 Cortex A53 with an ARM Mali-450MP GPU
-- 1 GB DDR3 RAM
-- 8GB eMMC flash (Samsung KLM8G1WEPD-B031)
-- micro SD card slot
-- Gigabit Ethernet (external RTL8211E-VB-CG chip)
-- 802.11 b/g/n WiFi, Bluetooth 4.0 (Ampak AP6212A module)
-- 2x USB 2.0 host ports
-
-Signed-off-by: Antony Antony <antony@phenome.org>
----
- arch/arm/dts/Makefile | 1 +
- arch/arm/dts/sun50i-h5-nanopi-neo-plus2.dts | 106 ++++++++++++++++++++++++++++
- configs/nanopi_neo_plus2_defconfig | 18 +++++
- 3 files changed, 125 insertions(+)
- create mode 100644 arch/arm/dts/sun50i-h5-nanopi-neo-plus2.dts
- create mode 100644 configs/nanopi_neo_plus2_defconfig
-
---- a/arch/arm/dts/Makefile
-+++ b/arch/arm/dts/Makefile
-@@ -337,6 +337,7 @@ dtb-$(CONFIG_MACH_SUN8I_V3S) += \
- sun8i-v3s-licheepi-zero.dtb
- dtb-$(CONFIG_MACH_SUN50I_H5) += \
- sun50i-h5-nanopi-neo2.dtb \
-+ sun50i-h5-nanopi-neo-plus2.dtb \
- sun50i-h5-orangepi-pc2.dtb \
- sun50i-h5-orangepi-prime.dtb \
- sun50i-h5-orangepi-zero-plus2.dtb
---- /dev/null
-+++ b/arch/arm/dts/sun50i-h5-nanopi-neo-plus2.dts
-@@ -0,0 +1,106 @@
-+/*
-+ * Copyright (C) 2017 Antony Antony <antony@phenome.org>
-+ * Copyright (c) 2016 ARM Ltd.
-+ *
-+ * This file is dual-licensed: you can use it either under the terms
-+ * of the GPL or the X11 license, at your option. Note that this dual
-+ * licensing only applies to this file, and not this project as a
-+ * whole.
-+ *
-+ * a) This library is free software; you can redistribute it and/or
-+ * modify it under the terms of the GNU General Public License as
-+ * published by the Free Software Foundation; either version 2 of the
-+ * License, or (at your option) any later version.
-+ *
-+ * This library is distributed in the hope that it will be useful,
-+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
-+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-+ * GNU General Public License for more details.
-+ *
-+ * Or, alternatively,
-+ *
-+ * b) Permission is hereby granted, free of charge, to any person
-+ * obtaining a copy of this software and associated documentation
-+ * files (the "Software"), to deal in the Software without
-+ * restriction, including without limitation the rights to use,
-+ * copy, modify, merge, publish, distribute, sublicense, and/or
-+ * sell copies of the Software, and to permit persons to whom the
-+ * Software is furnished to do so, subject to the following
-+ * conditions:
-+ *
-+ * The above copyright notice and this permission notice shall be
-+ * included in all copies or substantial portions of the Software.
-+ *
-+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
-+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
-+ * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
-+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
-+ * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
-+ * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
-+ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
-+ * OTHER DEALINGS IN THE SOFTWARE.
-+ */
-+
-+/dts-v1/;
-+
-+#include "sun50i-h5.dtsi"
-+
-+#include <dt-bindings/gpio/gpio.h>
-+
-+/ {
-+ model = "FriendlyARM NanoPi NEO Plus 2";
-+ compatible = "friendlyarm,nanopi-neo-plus2", "allwinner,sun50i-h5";
-+
-+ aliases {
-+ serial0 = &uart0;
-+ };
-+
-+ chosen {
-+ stdout-path = "serial0:115200n8";
-+ };
-+
-+ reg_vcc3v3: vcc3v3 {
-+ compatible = "regulator-fixed";
-+ regulator-name = "vcc3v3";
-+ regulator-min-microvolt = <3300000>;
-+ regulator-max-microvolt = <3300000>;
-+ };
-+};
-+
-+&ehci1 {
-+ status = "okay";
-+};
-+
-+&mmc0 {
-+ pinctrl-names = "default";
-+ pinctrl-0 = <&mmc0_pins_a>, <&mmc0_cd_pin>;
-+ vmmc-supply = <®_vcc3v3>;
-+ bus-width = <4>;
-+ cd-gpios = <&pio 5 6 GPIO_ACTIVE_HIGH>;
-+ cd-inverted;
-+ status = "okay";
-+};
-+
-+&mmc2 {
-+ pinctrl-names = "default";
-+ pinctrl-0 = <&mmc2_8bit_pins>;
-+ vmmc-supply = <®_vcc3v3>;
-+ bus-width = <8>;
-+ non-removable;
-+ cap-mmc-hw-reset;
-+ status = "okay";
-+};
-+
-+&ohci1 {
-+ status = "okay";
-+};
-+
-+&uart0 {
-+ pinctrl-names = "default";
-+ pinctrl-0 = <&uart0_pins_a>;
-+ status = "okay";
-+};
-+
-+&usbphy {
-+ status = "okay";
-+};
---- /dev/null
-+++ b/configs/nanopi_neo_plus2_defconfig
-@@ -0,0 +1,18 @@
-+CONFIG_ARM=y
-+CONFIG_ARCH_SUNXI=y
-+CONFIG_MACH_SUN50I_H5=y
-+CONFIG_DRAM_CLK=408
-+CONFIG_DRAM_ZQ=3881977
-+CONFIG_MACPWR="PD6"
-+CONFIG_DEFAULT_DEVICE_TREE="sun50i-h5-nanopi-neo-plus2"
-+# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
-+CONFIG_SPL=y
-+# CONFIG_CMD_IMLS is not set
-+# CONFIG_CMD_FLASH is not set
-+# CONFIG_CMD_FPGA is not set
-+# CONFIG_SPL_DOS_PARTITION is not set
-+# CONFIG_SPL_ISO_PARTITION is not set
-+# CONFIG_SPL_EFI_PARTITION is not set
-+CONFIG_SUN8I_EMAC=y
-+CONFIG_USB_EHCI_HCD=y
-+CONFIG_MMC_SUNXI_SLOT_EXTRA=2
###
--- a/scripts/Makefile.extrawarn
+++ b/scripts/Makefile.extrawarn
-@@ -58,8 +58,8 @@ endif
+@@ -56,8 +56,8 @@ endif
KBUILD_CFLAGS += $(warning)
dtc-warning := $(dtc-warning-$(findstring 1, $(KBUILD_ENABLE_EXTRA_GCC_CHECKS)))
dtc-warning += $(dtc-warning-$(findstring 2, $(KBUILD_ENABLE_EXTRA_GCC_CHECKS)))
-@@ -70,11 +70,11 @@ DTC_FLAGS += $(dtc-warning)
+@@ -68,11 +68,11 @@ DTC_FLAGS += $(dtc-warning)
else
# Disable noisy checks by default
--- a/arch/arm/dts/Makefile
+++ b/arch/arm/dts/Makefile
-@@ -318,6 +318,7 @@ dtb-$(CONFIG_MACH_SUN8I_A83T) += \
- sun8i-a83t-bananapi-m3.dtb \
- sun8i-a83t-cubietruck-plus.dtb
+@@ -350,6 +350,7 @@ dtb-$(CONFIG_MACH_SUN8I_A83T) += \
+ sun8i-a83t-cubietruck-plus.dtb \
+ sun8i-a83t-tbs-a711.dts
dtb-$(CONFIG_MACH_SUN8I_H3) += \
+ sun8i-h2-plus-orangepi-r1.dtb \
sun8i-h2-plus-orangepi-zero.dtb \
sun8i-h3-bananapi-m2-plus.dtb \
- sun8i-h3-orangepi-2.dtb \
+ sun8i-h3-libretech-all-h3-cc.dtb \
--- /dev/null
+++ b/arch/arm/dts/sun8i-h2-plus-orangepi-r1.dts
@@ -0,0 +1,91 @@
+};
--- a/board/sunxi/MAINTAINERS
+++ b/board/sunxi/MAINTAINERS
-@@ -326,6 +326,11 @@ M: Jagan Teki <jagan@amarulasolutions.co
+@@ -342,6 +342,11 @@ M: Jagan Teki <jagan@amarulasolutions.co
S: Maintained
F: configs/orangepi_prime_defconfig
--- a/arch/arm/dts/Makefile
+++ b/arch/arm/dts/Makefile
-@@ -339,6 +339,7 @@ dtb-$(CONFIG_MACH_SUN8I_V3S) += \
+@@ -372,6 +372,7 @@ dtb-$(CONFIG_MACH_SUN8I_V3S) += \
dtb-$(CONFIG_MACH_SUN50I_H5) += \
sun50i-h5-nanopi-neo2.dtb \
sun50i-h5-nanopi-neo-plus2.dtb \
projects / openwrt / staging / chunkeey.git / commitdiff