package/kernel/mac80211/patches/652-0054-rtl8xxxu-Implement-rtl8188eu_power_off.patch

   1 From 034fb94799289990283082eef61934f5eb9e939f Mon Sep 17 00:00:00 2001
   2 From: Jes Sorensen <Jes.Sorensen@redhat.com>
   3 Date: Fri, 26 Aug 2016 16:09:00 -0400
   4 Subject: [PATCH] rtl8xxxu: Implement rtl8188eu_power_off()
   5
   6 This allows the firmware to reload correctly upon rmmod/insmod.
   7 However the device still doesn't receive data upon reloading.
   8
   9 Signed-off-by: Jes Sorensen <Jes.Sorensen@redhat.com>
  10 ---
  11  .../net/wireless/realtek/rtl8xxxu/rtl8xxxu_8188e.c | 130 ++++++++++++++++++++-
  12  .../net/wireless/realtek/rtl8xxxu/rtl8xxxu_regs.h  |   2 +
  13  2 files changed, 131 insertions(+), 1 deletion(-)
  14
  15 --- a/drivers/net/wireless/realtek/rtl8xxxu/rtl8xxxu_8188e.c
  16 +++ b/drivers/net/wireless/realtek/rtl8xxxu/rtl8xxxu_8188e.c
  17 @@ -1191,6 +1191,71 @@ exit:
  18         return ret;
  19  }
  20
  21 +static int rtl8188eu_emu_to_disabled(struct rtl8xxxu_priv *priv)
  22 +{
  23 +       u8 val8;
  24 +
  25 +       /* 0x04[12:11] = 01 enable WL suspend */
  26 +       val8 = rtl8xxxu_read8(priv, REG_APS_FSMCO + 2);
  27 +       val8 &= ~BIT(0);
  28 +       rtl8xxxu_write8(priv, REG_APS_FSMCO + 2, val8);
  29 +
  30 +       val8 = rtl8xxxu_read8(priv, REG_APS_FSMCO + 1);
  31 +       val8 |= BIT(7);
  32 +       rtl8xxxu_write8(priv, REG_APS_FSMCO + 1, val8);
  33 +
  34 +       return 0;
  35 +}
  36 +
  37 +static int rtl8188eu_active_to_lps(struct rtl8xxxu_priv *priv)
  38 +{
  39 +       struct device *dev = &priv->udev->dev;
  40 +       u8 val8;
  41 +       u16 val16;
  42 +       u32 val32;
  43 +       int retry, retval;
  44 +
  45 +       rtl8xxxu_write8(priv, REG_TXPAUSE, 0x7f);
  46 +
  47 +       retry = 100;
  48 +       retval = -EBUSY;
  49 +       /*
  50 +        * Poll 32 bit wide 0x05f8 for 0x00000000 to ensure no TX is pending.
  51 +        */
  52 +       do {
  53 +               val32 = rtl8xxxu_read32(priv, 0x05f8);
  54 +               if (!val32) {
  55 +                       retval = 0;
  56 +                       break;
  57 +               }
  58 +       } while (retry--);
  59 +
  60 +       if (!retry) {
  61 +               dev_warn(dev, "Failed to flush TX queue\n");
  62 +               retval = -EBUSY;
  63 +               goto out;
  64 +       }
  65 +
  66 +       /* Disable CCK and OFDM, clock gated */
  67 +       val8 = rtl8xxxu_read8(priv, REG_SYS_FUNC);
  68 +       val8 &= ~SYS_FUNC_BBRSTB;
  69 +       rtl8xxxu_write8(priv, REG_SYS_FUNC, val8);
  70 +
  71 +       udelay(2);
  72 +
  73 +       /* Reset MAC TRX */
  74 +       val16 = rtl8xxxu_read16(priv, REG_CR);
  75 +       val16 &= ~(CR_MAC_TX_ENABLE | CR_MAC_RX_ENABLE | CR_SECURITY_ENABLE);
  76 +       rtl8xxxu_write16(priv, REG_CR, val8);
  77 +
  78 +       val8 = rtl8xxxu_read8(priv, REG_DUAL_TSF_RST);
  79 +       val8 |= DUAL_TSF_TX_OK;
  80 +       rtl8xxxu_write8(priv, REG_DUAL_TSF_RST, val8);
  81 +
  82 +out:
  83 +       return retval;
  84 +}
  85 +
  86  static int rtl8188eu_power_on(struct rtl8xxxu_priv *priv)
  87  {
  88         u16 val16;
  89 @@ -1221,6 +1286,69 @@ exit:
  90         return ret;
  91  }
  92
  93 +void rtl8188eu_power_off(struct rtl8xxxu_priv *priv)
  94 +{
  95 +       u8 val8;
  96 +       u16 val16;
  97 +
  98 +       rtl8xxxu_flush_fifo(priv);
  99 +
 100 +       val8 = rtl8xxxu_read8(priv, REG_TX_REPORT_CTRL);
 101 +       val8 &= ~TX_REPORT_CTRL_TIMER_ENABLE;
 102 +       rtl8xxxu_write8(priv, REG_TX_REPORT_CTRL, val8);
 103 +
 104 +       /* Turn off RF */
 105 +       rtl8xxxu_write8(priv, REG_RF_CTRL, 0x00);
 106 +
 107 +       rtl8188eu_active_to_lps(priv);
 108 +
 109 +       /* Reset Firmware if running in RAM */
 110 +       if (rtl8xxxu_read8(priv, REG_MCU_FW_DL) & MCU_FW_RAM_SEL)
 111 +               rtl8xxxu_firmware_self_reset(priv);
 112 +
 113 +       /* Reset MCU */
 114 +       val16 = rtl8xxxu_read16(priv, REG_SYS_FUNC);
 115 +       val16 &= ~SYS_FUNC_CPU_ENABLE;
 116 +       rtl8xxxu_write16(priv, REG_SYS_FUNC, val16);
 117 +
 118 +       /* Reset MCU ready status */
 119 +       rtl8xxxu_write8(priv, REG_MCU_FW_DL, 0x00);
 120 +
 121 +       /* 32K_CTRL looks to be very 8188e specific */
 122 +       val8 = rtl8xxxu_read8(priv, REG_32K_CTRL);
 123 +       val8 &= ~BIT(0);
 124 +       rtl8xxxu_write8(priv, REG_32K_CTRL, val8);
 125 +
 126 +       rtl8188eu_active_to_emu(priv);
 127 +       rtl8188eu_emu_to_disabled(priv);
 128 +
 129 +       /* Reset MCU IO Wrapper */
 130 +       val8 = rtl8xxxu_read8(priv, REG_RSV_CTRL + 1);
 131 +       val8 &= ~BIT(3);
 132 +       rtl8xxxu_write8(priv, REG_RSV_CTRL + 1, val8);
 133 +
 134 +       val8 = rtl8xxxu_read8(priv, REG_RSV_CTRL + 1);
 135 +       val8 |= BIT(3);
 136 +       rtl8xxxu_write8(priv, REG_RSV_CTRL + 1, val8);
 137 +
 138 +       /* Vendor driver refers to GPIO_IN */
 139 +       val8 = rtl8xxxu_read8(priv, REG_GPIO_PIN_CTRL);
 140 +       /* Vendor driver refers to GPIO_OUT */
 141 +       rtl8xxxu_write8(priv, REG_GPIO_PIN_CTRL + 1, val8);
 142 +       rtl8xxxu_write8(priv, REG_GPIO_PIN_CTRL + 2, 0xff);
 143 +
 144 +       val8 = rtl8xxxu_read8(priv, REG_GPIO_IO_SEL);
 145 +       rtl8xxxu_write8(priv, REG_GPIO_IO_SEL + 1, val8 << 4);
 146 +       val8 = rtl8xxxu_read8(priv, REG_GPIO_IO_SEL + 1);
 147 +       rtl8xxxu_write8(priv, REG_GPIO_IO_SEL + 1, val8 | 0x0f);
 148 +
 149 +       /*
 150 +        * Set LNA, TRSW, EX_PA Pin to output mode
 151 +        * Referred to as REG_BB_PAD_CTRL in 8188eu vendor driver
 152 +        */
 153 +       rtl8xxxu_write32(priv, REG_PAD_CTRL1, 0x00080808);
 154 +}
 155 +
 156  static void rtl8188e_enable_rf(struct rtl8xxxu_priv *priv)
 157  {
 158         rtl8xxxu_write8(priv, REG_TXPAUSE, 0x00);
 159 @@ -1265,7 +1393,7 @@ struct rtl8xxxu_fileops rtl8188eu_fops =
 160         .parse_efuse = rtl8188eu_parse_efuse,
 161         .load_firmware = rtl8188eu_load_firmware,
 162         .power_on = rtl8188eu_power_on,
 163 -       .power_off = rtl8xxxu_power_off,
 164 +       .power_off = rtl8188eu_power_off,
 165         .reset_8051 = rtl8188eu_reset_8051,
 166         .llt_init = rtl8xxxu_init_llt_table,
 167         .init_phy_bb = rtl8188eu_init_phy_bb,
 168 --- a/drivers/net/wireless/realtek/rtl8xxxu/rtl8xxxu_regs.h
 169 +++ b/drivers/net/wireless/realtek/rtl8xxxu/rtl8xxxu_regs.h
 170 @@ -413,6 +413,8 @@
 171  #define REG_MBIST_START                        0x0174
 172  #define REG_MBIST_DONE                 0x0178
 173  #define REG_MBIST_FAIL                 0x017c
 174 +/* 8188EU */
 175 +#define REG_32K_CTRL                   0x0194
 176  #define REG_C2HEVT_MSG_NORMAL          0x01a0
 177  /* 8192EU/8723BU/8812 */
 178  #define REG_C2HEVT_CMD_ID_8723B                0x01ae