ath79: add support for Compex WPJ531 (16M)
[openwrt/staging/dedeckeh.git] / target / linux / ath79 / dts / ar7161_dlink_dir-825-b1.dts
1 // SPDX-License-Identifier: GPL-2.0-or-later OR MIT
2 /dts-v1/;
3
4 #include <dt-bindings/gpio/gpio.h>
5 #include <dt-bindings/input/input.h>
6
7 #include "ar7100.dtsi"
8
9 / {
10 compatible = "dlink,dir-825-b1", "qca,ar7161";
11 model = "D-Link DIR825B1";
12
13 aliases {
14 led-boot = &led_power_orange;
15 led-failsafe = &led_power_orange;
16 led-running = &led_power_blue;
17 led-upgrade = &led_power_orange;
18 };
19
20 extosc: ref {
21 compatible = "fixed-clock";
22 #clock-cells = <0>;
23 clock-output-names = "ref";
24 clock-frequency = <40000000>;
25 };
26
27 leds {
28 compatible = "gpio-leds";
29
30 usb {
31 label = "d-link:blue:usb";
32 gpios = <&gpio 0 GPIO_ACTIVE_LOW>;
33 trigger-sources = <&usb_ohci_port>, <&usb_ehci_port>;
34 linux,default-trigger = "usbport";
35 };
36
37 led_power_orange: power_orange {
38 label = "d-link:orange:power";
39 gpios = <&gpio 1 GPIO_ACTIVE_LOW>;
40 default-state = "on";
41 };
42
43 led_power_blue: power_blue {
44 label = "d-link:blue:power";
45 gpios = <&gpio 2 GPIO_ACTIVE_LOW>;
46 };
47
48 wps {
49 label = "d-link:blue:wps";
50 gpios = <&gpio 4 GPIO_ACTIVE_LOW>;
51 };
52
53 planet_orange {
54 label = "d-link:orange:planet";
55 gpios = <&gpio 6 GPIO_ACTIVE_LOW>;
56 };
57
58 planet_blue {
59 label = "d-link:blue:planet";
60 gpios = <&gpio 11 GPIO_ACTIVE_LOW>;
61 };
62 };
63
64 ath9k-leds {
65 compatible = "gpio-leds";
66
67 wlan2g {
68 label = "d-link:blue:wlan2g";
69 gpios = <&ath9k0 5 GPIO_ACTIVE_LOW>;
70 linux,default-trigger = "phy0tpt";
71 };
72
73 wlan5g {
74 label = "d-link:blue:wlan5g";
75 gpios = <&ath9k1 5 GPIO_ACTIVE_LOW>;
76 linux,default-trigger = "phy1tpt";
77 };
78 };
79
80 keys {
81 compatible = "gpio-keys";
82
83 reset {
84 label = "reset";
85 linux,code = <KEY_RESTART>;
86 gpios = <&gpio 3 GPIO_ACTIVE_LOW>;
87 };
88
89 wps {
90 label = "wps";
91 linux,code = <KEY_WPS_BUTTON>;
92 gpios = <&gpio 8 GPIO_ACTIVE_LOW>;
93 };
94 };
95
96 rtl8366s {
97 compatible = "realtek,rtl8366s";
98 gpio-sda = <&gpio 5 GPIO_ACTIVE_HIGH>;
99 gpio-sck = <&gpio 7 GPIO_ACTIVE_HIGH>;
100 realtek,initvals = <0x06 0x0108>;
101
102 mdio-bus {
103 #address-cells = <1>;
104 #size-cells = <0>;
105 status = "okay";
106
107 phy-mask = <0x10>;
108
109 phy4: ethernet-phy@4 {
110 reg = <4>;
111 phy-mode = "rgmii";
112 };
113 };
114 };
115 };
116
117 &usb1 {
118 #address-cells = <1>;
119 #size-cells = <0>;
120 status = "okay";
121
122 usb_ohci_port: port@1 {
123 reg = <1>;
124 #trigger-source-cells = <0>;
125 };
126 };
127
128 &usb2 {
129 #address-cells = <1>;
130 #size-cells = <0>;
131 status = "okay";
132
133 usb_ehci_port: port@1 {
134 reg = <1>;
135 #trigger-source-cells = <0>;
136 };
137 };
138
139 &usb_phy {
140 status = "okay";
141 };
142
143 &pcie0 {
144 status = "okay";
145
146 ath9k0: wifi@0,11 {
147 compatible = "pci168c,0029";
148 reg = <0x8800 0 0 0 0>;
149 qca,no-eeprom;
150 #gpio-cells = <2>;
151 gpio-controller;
152 };
153
154 ath9k1: wifi@0,12 {
155 compatible = "pci168c,0029";
156 reg = <0x9000 0 0 0 0>;
157 qca,no-eeprom;
158 #gpio-cells = <2>;
159 gpio-controller;
160 };
161 };
162
163 &uart {
164 status = "okay";
165 };
166
167 &pll {
168 clocks = <&extosc>;
169 };
170
171 &spi {
172 status = "okay";
173
174 num-cs = <1>;
175
176 flash@0 {
177 compatible = "jedec,spi-nor";
178 reg = <0>;
179 spi-max-frequency = <25000000>;
180
181 partitions {
182 compatible = "fixed-partitions";
183 #address-cells = <1>;
184 #size-cells = <1>;
185
186 partition@0 {
187 label = "u-boot";
188 reg = <0x000000 0x040000>;
189 read-only;
190 };
191
192 partition@40000 {
193 label = "config";
194 reg = <0x040000 0x010000>;
195 read-only;
196 };
197
198 partition@50000 {
199 compatible = "denx,uimage";
200 label = "firmware";
201 reg = <0x050000 0x610000>;
202 };
203
204 caldata: partition@60000 {
205 label = "caldata";
206 reg = <0x660000 0x010000>;
207 read-only;
208 };
209
210 partition@670000 {
211 label = "unknown";
212 reg = <0x670000 0x190000>;
213 read-only;
214 };
215 };
216 };
217 };
218
219 &eth0 {
220 status = "okay";
221
222 pll-data = <0x11110000 0x00001099 0x00991099>;
223
224 fixed-link {
225 speed = <1000>;
226 full-duplex;
227 };
228 };
229
230 &eth1 {
231 status = "okay";
232
233 pll-data = <0x11110000 0x00001099 0x00991099>;
234
235 phy-handle = <&phy4>;
236 };