259af4f1a8aa5a6106506227824da1aeeae7db65
[openwrt/staging/dedeckeh.git] / target / linux / brcm47xx / patches-3.2 / 184-USB-Add-driver-for-the-bcma-bus.patch
1 From 70fc4b2a6200ef7a1b99a6aa28234b919f23b43c Mon Sep 17 00:00:00 2001
2 From: Hauke Mehrtens <hauke@hauke-m.de>
3 Date: Sat, 26 Nov 2011 21:33:41 +0100
4 Subject: [PATCH 184/186] USB: Add driver for the bcma bus
5
6 This adds a USB driver using the generic platform device driver for the
7 USB controller found on the Broadcom bcma bus. The bcma bus just
8 exposes one device which serves the OHCI and the EHCI controller at the
9 same time. This driver probes for this USB controller and creates and
10 registers two new platform devices which will be probed by the new
11 generic platform device driver. This makes it possible to use the EHCI
12 and the OCHI controller on the bcma bus at the same time.
13
14 Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
15 ---
16 drivers/usb/host/Kconfig | 12 ++
17 drivers/usb/host/Makefile | 1 +
18 drivers/usb/host/bcma-hcd.c | 328 +++++++++++++++++++++++++++++++++++++++++++
19 3 files changed, 341 insertions(+), 0 deletions(-)
20 create mode 100644 drivers/usb/host/bcma-hcd.c
21
22 --- a/drivers/usb/host/Kconfig
23 +++ b/drivers/usb/host/Kconfig
24 @@ -618,3 +618,15 @@ config USB_PXA168_EHCI
25 help
26 Enable support for Marvell PXA168 SoC's on-chip EHCI
27 host controller
28 +
29 +config USB_HCD_BCMA
30 + tristate "BCMA usb host driver"
31 + depends on BCMA && EXPERIMENTAL
32 + select USB_OHCI_HCD_PLATFORM if USB_OHCI_HCD
33 + select USB_EHCI_HCD_PLATFORM if USB_EHCI_HCD
34 + help
35 + Enbale support for the EHCI and OCHI host controller on an bcma bus.
36 + It converts the bcma driver into two platform device drivers
37 + for ehci and ohci.
38 +
39 + If unsure, say N.
40 --- a/drivers/usb/host/Makefile
41 +++ b/drivers/usb/host/Makefile
42 @@ -37,3 +37,4 @@ obj-$(CONFIG_USB_IMX21_HCD) += imx21-hcd
43 obj-$(CONFIG_USB_FSL_MPH_DR_OF) += fsl-mph-dr-of.o
44 obj-$(CONFIG_USB_OCTEON2_COMMON) += octeon2-common.o
45 obj-$(CONFIG_MIPS_ALCHEMY) += alchemy-common.o
46 +obj-$(CONFIG_USB_HCD_BCMA) += bcma-hcd.o
47 --- /dev/null
48 +++ b/drivers/usb/host/bcma-hcd.c
49 @@ -0,0 +1,328 @@
50 +/*
51 + * Broadcom specific Advanced Microcontroller Bus
52 + * Broadcom USB-core driver (BCMA bus glue)
53 + *
54 + * Copyright 2011 Hauke Mehrtens <hauke@hauke-m.de>
55 + *
56 + * Based on ssb-ohci driver
57 + * Copyright 2007 Michael Buesch <m@bues.ch>
58 + *
59 + * Derived from the OHCI-PCI driver
60 + * Copyright 1999 Roman Weissgaerber
61 + * Copyright 2000-2002 David Brownell
62 + * Copyright 1999 Linus Torvalds
63 + * Copyright 1999 Gregory P. Smith
64 + *
65 + * Derived from the USBcore related parts of Broadcom-SB
66 + * Copyright 2005-2011 Broadcom Corporation
67 + *
68 + * Licensed under the GNU/GPL. See COPYING for details.
69 + */
70 +#include <linux/bcma/bcma.h>
71 +#include <linux/delay.h>
72 +#include <linux/platform_device.h>
73 +#include <linux/module.h>
74 +#include <linux/usb/hci_driver.h>
75 +
76 +MODULE_AUTHOR("Hauke Mehrtens");
77 +MODULE_DESCRIPTION("Common USB driver for BCMA Bus");
78 +MODULE_LICENSE("GPL");
79 +
80 +struct bcma_hcd_device {
81 + struct platform_device *ehci_dev;
82 + struct platform_device *ohci_dev;
83 +};
84 +
85 +/* Wait for bitmask in a register to get set or cleared.
86 + * timeout is in units of ten-microseconds.
87 + */
88 +static int bcma_wait_bits(struct bcma_device *dev, u16 reg, u32 bitmask,
89 + int timeout)
90 +{
91 + int i;
92 + u32 val;
93 +
94 + for (i = 0; i < timeout; i++) {
95 + val = bcma_read32(dev, reg);
96 + if ((val & bitmask) == bitmask)
97 + return 0;
98 + udelay(10);
99 + }
100 +
101 + return -ETIMEDOUT;
102 +}
103 +
104 +static void __devinit bcma_hcd_4716wa(struct bcma_device *dev)
105 +{
106 +#ifdef CONFIG_BCMA_DRIVER_MIPS
107 + /* Work around for 4716 failures. */
108 + if (dev->bus->chipinfo.id == 0x4716) {
109 + u32 tmp;
110 +
111 + tmp = bcma_cpu_clock(&dev->bus->drv_mips);
112 + if (tmp >= 480000000)
113 + tmp = 0x1846b; /* set CDR to 0x11(fast) */
114 + else if (tmp == 453000000)
115 + tmp = 0x1046b; /* set CDR to 0x10(slow) */
116 + else
117 + tmp = 0;
118 +
119 + /* Change Shim mdio control reg to fix host not acking at
120 + * high frequencies
121 + */
122 + if (tmp) {
123 + bcma_write32(dev, 0x524, 0x1); /* write sel to enable */
124 + udelay(500);
125 +
126 + bcma_write32(dev, 0x524, tmp);
127 + udelay(500);
128 + bcma_write32(dev, 0x524, 0x4ab);
129 + udelay(500);
130 + bcma_read32(dev, 0x528);
131 + bcma_write32(dev, 0x528, 0x80000000);
132 + }
133 + }
134 +#endif /* CONFIG_BCMA_DRIVER_MIPS */
135 +}
136 +
137 +/* based on arch/mips/brcm-boards/bcm947xx/pcibios.c */
138 +static void __devinit bcma_hcd_init_chip(struct bcma_device *dev)
139 +{
140 + u32 tmp;
141 +
142 + /*
143 + * USB 2.0 special considerations:
144 + *
145 + * 1. Since the core supports both OHCI and EHCI functions, it must
146 + * only be reset once.
147 + *
148 + * 2. In addition to the standard SI reset sequence, the Host Control
149 + * Register must be programmed to bring the USB core and various
150 + * phy components out of reset.
151 + */
152 + if (!bcma_core_is_enabled(dev)) {
153 + bcma_core_enable(dev, 0);
154 + mdelay(10);
155 + if (dev->id.rev >= 5) {
156 + /* Enable Misc PLL */
157 + tmp = bcma_read32(dev, 0x1e0);
158 + tmp |= 0x100;
159 + bcma_write32(dev, 0x1e0, tmp);
160 + if (bcma_wait_bits(dev, 0x1e0, 1 << 24, 100))
161 + printk(KERN_EMERG "Failed to enable misc PPL!\n");
162 +
163 + /* Take out of resets */
164 + bcma_write32(dev, 0x200, 0x4ff);
165 + udelay(25);
166 + bcma_write32(dev, 0x200, 0x6ff);
167 + udelay(25);
168 +
169 + /* Make sure digital and AFE are locked in USB PHY */
170 + bcma_write32(dev, 0x524, 0x6b);
171 + udelay(50);
172 + tmp = bcma_read32(dev, 0x524);
173 + udelay(50);
174 + bcma_write32(dev, 0x524, 0xab);
175 + udelay(50);
176 + tmp = bcma_read32(dev, 0x524);
177 + udelay(50);
178 + bcma_write32(dev, 0x524, 0x2b);
179 + udelay(50);
180 + tmp = bcma_read32(dev, 0x524);
181 + udelay(50);
182 + bcma_write32(dev, 0x524, 0x10ab);
183 + udelay(50);
184 + tmp = bcma_read32(dev, 0x524);
185 +
186 + if (bcma_wait_bits(dev, 0x528, 0xc000, 10000)) {
187 + tmp = bcma_read32(dev, 0x528);
188 + printk(KERN_EMERG
189 + "USB20H mdio_rddata 0x%08x\n", tmp);
190 + }
191 + bcma_write32(dev, 0x528, 0x80000000);
192 + tmp = bcma_read32(dev, 0x314);
193 + udelay(265);
194 + bcma_write32(dev, 0x200, 0x7ff);
195 + udelay(10);
196 +
197 + /* Take USB and HSIC out of non-driving modes */
198 + bcma_write32(dev, 0x510, 0);
199 + } else {
200 + bcma_write32(dev, 0x200, 0x7ff);
201 +
202 + udelay(1);
203 + }
204 +
205 + bcma_hcd_4716wa(dev);
206 + }
207 +}
208 +
209 +static const struct usb_hci_pdata p_data = {
210 + .flags = USB_HCI_PDATA_PORT_POWER_SET,
211 + .power_set_is_on = 1,
212 +};
213 +
214 +static struct platform_device * __devinit
215 +bcma_hcd_create_pdev(struct bcma_device *dev, char *name, u32 addr)
216 +{
217 + struct platform_device *hci_dev;
218 + struct resource hci_res[2];
219 + int ret = -ENOMEM;
220 +
221 + memset(hci_res, 0, sizeof(hci_res));
222 +
223 + hci_res[0].start = addr;
224 + hci_res[0].end = hci_res[0].start + 0x1000 - 1;
225 + hci_res[0].flags = IORESOURCE_MEM;
226 +
227 + hci_res[1].start = dev->irq;
228 + hci_res[1].flags = IORESOURCE_IRQ;
229 +
230 + hci_dev = platform_device_alloc(name, 0);
231 + if (!hci_dev)
232 + return NULL;
233 +
234 + hci_dev->dev.parent = &dev->dev;
235 + hci_dev->dev.dma_mask = &hci_dev->dev.coherent_dma_mask;
236 +
237 + ret = platform_device_add_resources(hci_dev, hci_res,
238 + ARRAY_SIZE(hci_res));
239 + if (ret)
240 + goto err_alloc;
241 + ret = platform_device_add_data(hci_dev, &p_data, sizeof(p_data));
242 + if (ret)
243 + goto err_alloc;
244 + ret = platform_device_add(hci_dev);
245 + if (ret)
246 + goto err_alloc;
247 +
248 + return hci_dev;
249 +
250 +err_alloc:
251 + platform_device_put(hci_dev);
252 + return ERR_PTR(ret);
253 +}
254 +
255 +static int __devinit bcma_hcd_probe(struct bcma_device *dev)
256 +{
257 + int err;
258 + u16 chipid_top;
259 + u32 ohci_addr;
260 + struct bcma_hcd_device *usb_dev;
261 + struct bcma_chipinfo *chipinfo;
262 +
263 + chipinfo = &dev->bus->chipinfo;
264 + /* USBcores are only connected on embedded devices. */
265 + chipid_top = (chipinfo->id & 0xFF00);
266 + if (chipid_top != 0x4700 && chipid_top != 0x5300)
267 + return -ENODEV;
268 +
269 + /* TODO: Probably need checks here; is the core connected? */
270 +
271 + if (dma_set_mask(dev->dma_dev, DMA_BIT_MASK(32)) ||
272 + dma_set_coherent_mask(dev->dma_dev, DMA_BIT_MASK(32)))
273 + return -EOPNOTSUPP;
274 +
275 + usb_dev = kzalloc(sizeof(struct bcma_hcd_device), GFP_KERNEL);
276 + if (!usb_dev)
277 + return -ENOMEM;
278 +
279 + bcma_hcd_init_chip(dev);
280 +
281 + /* In AI chips EHCI is addrspace 0, OHCI is 1 */
282 + ohci_addr = dev->addr1;
283 + if ((chipinfo->id == 0x5357 || chipinfo->id == 0x4749)
284 + && chipinfo->rev == 0)
285 + ohci_addr = 0x18009000;
286 +
287 + usb_dev->ohci_dev = bcma_hcd_create_pdev(dev, "ohci-platform",
288 + ohci_addr);
289 + if (IS_ERR(usb_dev->ohci_dev)) {
290 + err = PTR_ERR(usb_dev->ohci_dev);
291 + goto err_free_usb_dev;
292 + }
293 +
294 + usb_dev->ehci_dev = bcma_hcd_create_pdev(dev, "ehci-platform",
295 + dev->addr);
296 + if (IS_ERR(usb_dev->ehci_dev)) {
297 + err = PTR_ERR(usb_dev->ehci_dev);
298 + goto err_unregister_ohci_dev;
299 + }
300 +
301 + bcma_set_drvdata(dev, usb_dev);
302 + return 0;
303 +
304 +err_unregister_ohci_dev:
305 + platform_device_unregister(usb_dev->ohci_dev);
306 +err_free_usb_dev:
307 + kfree(usb_dev);
308 + return err;
309 +}
310 +
311 +static void __devexit bcma_hcd_remove(struct bcma_device *dev)
312 +{
313 + struct bcma_hcd_device *usb_dev = bcma_get_drvdata(dev);
314 + struct platform_device *ohci_dev = usb_dev->ohci_dev;
315 + struct platform_device *ehci_dev = usb_dev->ehci_dev;
316 +
317 + if (ohci_dev)
318 + platform_device_unregister(ohci_dev);
319 + if (ehci_dev)
320 + platform_device_unregister(ehci_dev);
321 +
322 + bcma_core_disable(dev, 0);
323 +}
324 +
325 +static void bcma_hcd_shutdown(struct bcma_device *dev)
326 +{
327 + bcma_core_disable(dev, 0);
328 +}
329 +
330 +#ifdef CONFIG_PM
331 +
332 +static int bcma_hcd_suspend(struct bcma_device *dev, pm_message_t state)
333 +{
334 + bcma_core_disable(dev, 0);
335 +
336 + return 0;
337 +}
338 +
339 +static int bcma_hcd_resume(struct bcma_device *dev)
340 +{
341 + bcma_core_enable(dev, 0);
342 +
343 + return 0;
344 +}
345 +
346 +#else /* !CONFIG_PM */
347 +#define bcma_hcd_suspend NULL
348 +#define bcma_hcd_resume NULL
349 +#endif /* CONFIG_PM */
350 +
351 +static const struct bcma_device_id bcma_hcd_table[] __devinitconst = {
352 + BCMA_CORE(BCMA_MANUF_BCM, BCMA_CORE_USB20_HOST, BCMA_ANY_REV, BCMA_ANY_CLASS),
353 + BCMA_CORETABLE_END
354 +};
355 +MODULE_DEVICE_TABLE(bcma, bcma_hcd_table);
356 +
357 +static struct bcma_driver bcma_hcd_driver = {
358 + .name = KBUILD_MODNAME,
359 + .id_table = bcma_hcd_table,
360 + .probe = bcma_hcd_probe,
361 + .remove = __devexit_p(bcma_hcd_remove),
362 + .shutdown = bcma_hcd_shutdown,
363 + .suspend = bcma_hcd_suspend,
364 + .resume = bcma_hcd_resume,
365 +};
366 +
367 +static int __init bcma_hcd_init(void)
368 +{
369 + return bcma_driver_register(&bcma_hcd_driver);
370 +}
371 +module_init(bcma_hcd_init);
372 +
373 +static void __exit bcma_hcd_exit(void)
374 +{
375 + bcma_driver_unregister(&bcma_hcd_driver);
376 +}
377 +module_exit(bcma_hcd_exit);