target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4018-whw01-v1.dts

   1 // SPDX-License-Identifier: GPL-2.0-or-later OR MIT
   2
   3 #include "qcom-ipq4019.dtsi"
   4 #include <dt-bindings/leds/common.h>
   5 #include <dt-bindings/gpio/gpio.h>
   6 #include <dt-bindings/input/input.h>
   7
   8 / {
   9         model = "Linksys WHW01 v1";
  10         compatible = "linksys,whw01-v1";
  11
  12         aliases {
  13                 serial0 = &blsp1_uart1;
  14                 led-boot = &led_system_blue;
  15                 led-running = &led_system_blue;
  16         };
  17
  18         chosen {
  19                 stdout-path = "serial0:115200n8";
  20                 bootargs-append = " root=/dev/ubiblock0_0";
  21         };
  22
  23         soc {
  24                 keys {
  25                         compatible = "gpio-keys";
  26
  27                         reset {
  28                                 label = "reset";
  29                                 gpios = <&tlmm 63 GPIO_ACTIVE_LOW>;
  30                                 linux,code = <KEY_RESTART>;
  31                         };
  32                 };
  33
  34                 ess-psgmii@98000 {
  35                         status = "okay";
  36                 };
  37
  38                 ess_tcsr@1953000 {
  39                         status = "okay";
  40                 };
  41
  42                 ess-switch@c000000 {
  43                         status = "okay";
  44                 };
  45
  46                 edma@c080000 {
  47                         status = "okay";
  48                 };
  49         };
  50 };
  51
  52 &blsp_dma {
  53         status = "okay";
  54 };
  55
  56 &blsp1_i2c3 {
  57         status = "okay";
  58         pinctrl-0 = <&i2c_0_pins>;
  59         pinctrl-1 = <&i2c_0_pins>;
  60         pinctrl-names = "i2c_active", "i2c_sleep";
  61
  62         leds@62 {
  63                 compatible = "nxp,pca9633";
  64                 #address-cells = <1>;
  65                 #size-cells = <0>;
  66                 reg = <0x62>;
  67
  68                 /* RGB? */
  69                 led@0 {
  70                         reg = <0>;
  71                         color = <LED_COLOR_ID_RED>;
  72                         function = LED_FUNCTION_POWER;
  73                 };
  74
  75                 led@1 {
  76                         reg = <1>;
  77                         color = <LED_COLOR_ID_GREEN>;
  78                         function = LED_FUNCTION_POWER;
  79                 };
  80
  81                 led_system_blue: led@2 {
  82                         reg = <2>;
  83                         color = <LED_COLOR_ID_BLUE>;
  84                         function = LED_FUNCTION_POWER;
  85                         linux,default-trigger = "default-on";
  86                 };
  87         };
  88 };
  89
  90 &blsp1_spi1 {
  91         status = "okay";
  92         pinctrl-0 = <&spi_0_pins>;
  93         pinctrl-names = "default";
  94         cs-gpios = <&tlmm 54 GPIO_ACTIVE_HIGH>, <&tlmm 4 GPIO_ACTIVE_HIGH>;
  95
  96         nor@0 {
  97                 reg = <0>;
  98                 compatible = "jedec,spi-nor";
  99                 spi-max-frequency = <24000000>;
 100
 101                 partitions {
 102                         compatible = "fixed-partitions";
 103                         #address-cells = <1>;
 104                         #size-cells = <1>;
 105
 106                         partition@0 {
 107                                 label = "0:SBL1";
 108                                 reg = <0x0 0x40000>;
 109                                 read-only;
 110                         };
 111
 112                         partition@40000 {
 113                                 label = "0:MIBIB";
 114                                 reg = <0x40000 0x20000>;
 115                                 read-only;
 116                         };
 117
 118                         partition@60000 {
 119                                 label = "0:QSEE";
 120                                 reg = <0x60000 0x60000>;
 121                                 read-only;
 122                         };
 123
 124                         partition@c0000 {
 125                                 label = "0:CDT";
 126                                 reg = <0xc0000 0x10000>;
 127                                 read-only;
 128                         };
 129
 130                         partition@d0000 {
 131                                 label = "APPSBL";
 132                                 reg = <0xd0000 0xa0000>;
 133                                 read-only;
 134                         };
 135
 136                         partition@170000 {
 137                                 label = "0:ART";
 138                                 reg = <0x170000 0x10000>;
 139                                 read-only;
 140
 141                                 compatible = "nvmem-cells";
 142                                 #address-cells = <1>;
 143                                 #size-cells = <1>;
 144
 145                                 precal_art_1000: precal@1000 {
 146                                         reg = <0x1000 0x2f20>;
 147                                 };
 148
 149                                 precal_art_5000: precal@5000 {
 150                                         reg = <0x5000 0x2f20>;
 151                                 };
 152                         };
 153
 154                         partition@180000 {
 155                                 label = "u_env";
 156                                 reg = <0x180000 0x40000>;
 157                         };
 158
 159                         partition@1c0000 {
 160                                 label = "s_env";
 161                                 reg = <0x1c0000 0x20000>;
 162                         };
 163
 164                         partition@1e0000 {
 165                                 label = "devinfo";
 166                                 reg = <0x1e0000 0x20000>;
 167                                 read-only;
 168                         };
 169                 };
 170         };
 171
 172         nand@1 {
 173                 reg = <1>;
 174                 compatible = "spi-nand";
 175                 spi-max-frequency = <24000000>;
 176
 177                 partitions {
 178                         compatible = "fixed-partitions";
 179                         #address-cells = <1>;
 180                         #size-cells = <1>;
 181
 182                         partition@0 {
 183                                 label = "kernel";
 184                                 reg = <0x0000000 0x5000000>;
 185                         };
 186
 187                         partition@600000 {
 188                                 label = "rootfs";
 189                                 reg = <0x0600000 0x4a00000>;
 190                         };
 191
 192                         partition@5000000 {
 193                                 label = "alt_kernel";
 194                                 reg = <0x5000000 0x5000000>;
 195                         };
 196
 197                         partition@5600000 {
 198                                 label = "alt_rootfs";
 199                                 reg = <0x5600000 0x4a00000>;
 200                         };
 201
 202                         partition@a000000 {
 203                                 label = "sysdiag";
 204                                 reg = <0xa000000 0x0200000>;
 205                                 read-only;
 206                         };
 207
 208                         partition@a200000 {
 209                                 label = "syscfg";
 210                                 reg = <0xa200000 0x5e00000>;
 211                                 read-only;
 212                         };
 213                 };
 214         };
 215 };
 216
 217 &blsp1_uart1 {
 218         pinctrl-0 = <&serial_pins>;
 219         pinctrl-names = "default";
 220         status = "okay";
 221 };
 222
 223 &mdio {
 224         status = "okay";
 225         pinctrl-0 = <&mdio_pins>;
 226         pinctrl-names = "default";
 227         phy-reset-gpio = <&tlmm 62 GPIO_ACTIVE_HIGH>;
 228 };
 229
 230 &tlmm {
 231         mdio_pins: mdio_pinmux {
 232                 mux_mdio {
 233                         pins = "gpio53";
 234                         function = "mdio";
 235                         bias-pull-up;
 236                 };
 237
 238                 mux_mdc {
 239                         pins = "gpio52";
 240                         function = "mdc";
 241                         bias-pull-up;
 242                 };
 243         };
 244
 245         serial_pins: serial_pinmux {
 246                 mux {
 247                         pins = "gpio60", "gpio61";
 248                         function = "blsp_uart0";
 249                         bias-disable;
 250                 };
 251         };
 252
 253         spi_0_pins: spi_0_pinmux {
 254                 pinmux {
 255                         function = "blsp_spi0";
 256                         pins = "gpio55", "gpio56", "gpio57";
 257                 };
 258
 259                 pinmux_cs {
 260                         function = "gpio";
 261                         pins = "gpio54", "gpio4";
 262                 };
 263
 264                 pinconf {
 265                         pins = "gpio55", "gpio56", "gpio57";
 266                         drive-strength = <12>;
 267                         bias-disable;
 268                 };
 269
 270                 pinconf_cs {
 271                         pins = "gpio54", "gpio4";
 272                         drive-strength = <2>;
 273                         bias-disable;
 274                         output-high;
 275                 };
 276         };
 277
 278         i2c_0_pins: i2c_0_pinmux {
 279                 mux {
 280                         function = "blsp_i2c0";
 281                         pins = "gpio58", "gpio59";
 282                         bias-disable;
 283                 };
 284         };
 285
 286         reset_pinmux {
 287                 mux {
 288                         pins = "gpio63";
 289                         bias-pull-up;
 290                 };
 291         };
 292 };
 293
 294 &usb2 {
 295         status = "okay";
 296 };
 297
 298 &usb2_hs_phy {
 299         status = "okay";
 300 };
 301
 302 &usb3 {
 303         status = "okay";
 304 };
 305
 306 &usb3_hs_phy {
 307         status = "okay";
 308 };
 309
 310 &usb3_ss_phy {
 311         status = "okay";
 312 };
 313
 314 &watchdog {
 315         status = "okay";
 316 };
 317
 318 &wifi0 {
 319         status = "okay";
 320         qcom,ath10k-calibration-variant = "linksys-whw01-v1";
 321         nvmem-cell-names = "pre-calibration";
 322         nvmem-cells = <&precal_art_1000>;
 323 };
 324
 325 &wifi1 {
 326         status = "okay";
 327         qcom,ath10k-calibration-variant = "linksys-whw01-v1";
 328         nvmem-cell-names = "pre-calibration";
 329         nvmem-cells = <&precal_art_5000>;
 330 };