target/linux/ipq806x/patches-5.10/094-v5.7-ipq806x-net-mdio-add-ipq8064-mdio-driver.patch

   1 From caaa71fac36ec8c19145dbf8262a9b77ab09f1a1 Mon Sep 17 00:00:00 2001
   2 From: Ansuel Smith <ansuelsmth@gmail.com>
   3 Date: Wed, 4 Mar 2020 22:38:32 +0100
   4 Subject: net: mdio: add ipq8064 mdio driver
   5
   6 Currently ipq806x soc use generic bitbang driver to
   7 comunicate with the gmac ethernet interface.
   8 Add a dedicated driver created by chunkeey to fix this.
   9
  10 Co-developed-by: Christian Lamparter <chunkeey@gmail.com>
  11 Signed-off-by: Christian Lamparter <chunkeey@gmail.com>
  12 Signed-off-by: Ansuel Smith <ansuelsmth@gmail.com>
  13 Signed-off-by: David S. Miller <davem@davemloft.net>
  14 ---
  15  drivers/net/phy/Kconfig        |   8 ++
  16  drivers/net/phy/Makefile       |   1 +
  17  drivers/net/phy/mdio-ipq8064.c | 166 +++++++++++++++++++++++++++++++++++++++++
  18  3 files changed, 175 insertions(+)
  19  create mode 100644 drivers/net/phy/mdio-ipq8064.c
  20
  21 --- a/drivers/net/phy/Kconfig
  22 +++ b/drivers/net/phy/Kconfig
  23 @@ -156,6 +156,14 @@ config MDIO_I2C
  24
  25           This is library mode.
  26
  27 +config MDIO_IPQ8064
  28 +       tristate "Qualcomm IPQ8064 MDIO interface support"
  29 +       depends on HAS_IOMEM && OF_MDIO
  30 +       depends on MFD_SYSCON
  31 +       help
  32 +         This driver supports the MDIO interface found in the network
  33 +         interface units of the IPQ8064 SoC
  34 +
  35  config MDIO_MOXART
  36         tristate "MOXA ART MDIO interface support"
  37         depends on ARCH_MOXART || COMPILE_TEST
  38 --- a/drivers/net/phy/Makefile
  39 +++ b/drivers/net/phy/Makefile
  40 @@ -50,6 +50,7 @@ obj-$(CONFIG_MDIO_CAVIUM)     += mdio-cavium
  41  obj-$(CONFIG_MDIO_GPIO)                += mdio-gpio.o
  42  obj-$(CONFIG_MDIO_HISI_FEMAC)  += mdio-hisi-femac.o
  43  obj-$(CONFIG_MDIO_I2C)         += mdio-i2c.o
  44 +obj-$(CONFIG_MDIO_IPQ8064)     += mdio-ipq8064.o
  45  obj-$(CONFIG_MDIO_MOXART)      += mdio-moxart.o
  46  obj-$(CONFIG_MDIO_MSCC_MIIM)   += mdio-mscc-miim.o
  47  obj-$(CONFIG_MDIO_OCTEON)      += mdio-octeon.o
  48 --- /dev/null
  49 +++ b/drivers/net/phy/mdio-ipq8064.c
  50 @@ -0,0 +1,166 @@
  51 +// SPDX-License-Identifier: GPL-2.0
  52 +/* Qualcomm IPQ8064 MDIO interface driver
  53 + *
  54 + * Copyright (C) 2019 Christian Lamparter <chunkeey@gmail.com>
  55 + * Copyright (C) 2020 Ansuel Smith <ansuelsmth@gmail.com>
  56 + */
  57 +
  58 +#include <linux/delay.h>
  59 +#include <linux/kernel.h>
  60 +#include <linux/module.h>
  61 +#include <linux/regmap.h>
  62 +#include <linux/of_mdio.h>
  63 +#include <linux/phy.h>
  64 +#include <linux/platform_device.h>
  65 +#include <linux/mfd/syscon.h>
  66 +
  67 +/* MII address register definitions */
  68 +#define MII_ADDR_REG_ADDR                       0x10
  69 +#define MII_BUSY                                BIT(0)
  70 +#define MII_WRITE                               BIT(1)
  71 +#define MII_CLKRANGE_60_100M                    (0 << 2)
  72 +#define MII_CLKRANGE_100_150M                   (1 << 2)
  73 +#define MII_CLKRANGE_20_35M                     (2 << 2)
  74 +#define MII_CLKRANGE_35_60M                     (3 << 2)
  75 +#define MII_CLKRANGE_150_250M                   (4 << 2)
  76 +#define MII_CLKRANGE_250_300M                   (5 << 2)
  77 +#define MII_CLKRANGE_MASK                      GENMASK(4, 2)
  78 +#define MII_REG_SHIFT                          6
  79 +#define MII_REG_MASK                           GENMASK(10, 6)
  80 +#define MII_ADDR_SHIFT                         11
  81 +#define MII_ADDR_MASK                          GENMASK(15, 11)
  82 +
  83 +#define MII_DATA_REG_ADDR                       0x14
  84 +
  85 +#define MII_MDIO_DELAY_USEC                     (1000)
  86 +#define MII_MDIO_RETRY_MSEC                     (10)
  87 +
  88 +struct ipq8064_mdio {
  89 +       struct regmap *base; /* NSS_GMAC0_BASE */
  90 +};
  91 +
  92 +static int
  93 +ipq8064_mdio_wait_busy(struct ipq8064_mdio *priv)
  94 +{
  95 +       u32 busy;
  96 +
  97 +       return regmap_read_poll_timeout(priv->base, MII_ADDR_REG_ADDR, busy,
  98 +                                       !(busy & MII_BUSY), MII_MDIO_DELAY_USEC,
  99 +                                       MII_MDIO_RETRY_MSEC * USEC_PER_MSEC);
 100 +}
 101 +
 102 +static int
 103 +ipq8064_mdio_read(struct mii_bus *bus, int phy_addr, int reg_offset)
 104 +{
 105 +       u32 miiaddr = MII_BUSY | MII_CLKRANGE_250_300M;
 106 +       struct ipq8064_mdio *priv = bus->priv;
 107 +       u32 ret_val;
 108 +       int err;
 109 +
 110 +       /* Reject clause 45 */
 111 +       if (reg_offset & MII_ADDR_C45)
 112 +               return -EOPNOTSUPP;
 113 +
 114 +       miiaddr |= ((phy_addr << MII_ADDR_SHIFT) & MII_ADDR_MASK) |
 115 +                  ((reg_offset << MII_REG_SHIFT) & MII_REG_MASK);
 116 +
 117 +       regmap_write(priv->base, MII_ADDR_REG_ADDR, miiaddr);
 118 +       usleep_range(8, 10);
 119 +
 120 +       err = ipq8064_mdio_wait_busy(priv);
 121 +       if (err)
 122 +               return err;
 123 +
 124 +       regmap_read(priv->base, MII_DATA_REG_ADDR, &ret_val);
 125 +       return (int)ret_val;
 126 +}
 127 +
 128 +static int
 129 +ipq8064_mdio_write(struct mii_bus *bus, int phy_addr, int reg_offset, u16 data)
 130 +{
 131 +       u32 miiaddr = MII_WRITE | MII_BUSY | MII_CLKRANGE_250_300M;
 132 +       struct ipq8064_mdio *priv = bus->priv;
 133 +
 134 +       /* Reject clause 45 */
 135 +       if (reg_offset & MII_ADDR_C45)
 136 +               return -EOPNOTSUPP;
 137 +
 138 +       regmap_write(priv->base, MII_DATA_REG_ADDR, data);
 139 +
 140 +       miiaddr |= ((phy_addr << MII_ADDR_SHIFT) & MII_ADDR_MASK) |
 141 +                  ((reg_offset << MII_REG_SHIFT) & MII_REG_MASK);
 142 +
 143 +       regmap_write(priv->base, MII_ADDR_REG_ADDR, miiaddr);
 144 +       usleep_range(8, 10);
 145 +
 146 +       return ipq8064_mdio_wait_busy(priv);
 147 +}
 148 +
 149 +static int
 150 +ipq8064_mdio_probe(struct platform_device *pdev)
 151 +{
 152 +       struct device_node *np = pdev->dev.of_node;
 153 +       struct ipq8064_mdio *priv;
 154 +       struct mii_bus *bus;
 155 +       int ret;
 156 +
 157 +       bus = devm_mdiobus_alloc_size(&pdev->dev, sizeof(*priv));
 158 +       if (!bus)
 159 +               return -ENOMEM;
 160 +
 161 +       bus->name = "ipq8064_mdio_bus";
 162 +       bus->read = ipq8064_mdio_read;
 163 +       bus->write = ipq8064_mdio_write;
 164 +       snprintf(bus->id, MII_BUS_ID_SIZE, "%s-mii", dev_name(&pdev->dev));
 165 +       bus->parent = &pdev->dev;
 166 +
 167 +       priv = bus->priv;
 168 +       priv->base = device_node_to_regmap(np);
 169 +       if (IS_ERR(priv->base)) {
 170 +               if (priv->base == ERR_PTR(-EPROBE_DEFER))
 171 +                       return -EPROBE_DEFER;
 172 +
 173 +               dev_err(&pdev->dev, "error getting device regmap, error=%pe\n",
 174 +                       priv->base);
 175 +               return PTR_ERR(priv->base);
 176 +       }
 177 +
 178 +       ret = of_mdiobus_register(bus, np);
 179 +       if (ret)
 180 +               return ret;
 181 +
 182 +       platform_set_drvdata(pdev, bus);
 183 +       return 0;
 184 +}
 185 +
 186 +static int
 187 +ipq8064_mdio_remove(struct platform_device *pdev)
 188 +{
 189 +       struct mii_bus *bus = platform_get_drvdata(pdev);
 190 +
 191 +       mdiobus_unregister(bus);
 192 +
 193 +       return 0;
 194 +}
 195 +
 196 +static const struct of_device_id ipq8064_mdio_dt_ids[] = {
 197 +       { .compatible = "qcom,ipq8064-mdio" },
 198 +       { }
 199 +};
 200 +MODULE_DEVICE_TABLE(of, ipq8064_mdio_dt_ids);
 201 +
 202 +static struct platform_driver ipq8064_mdio_driver = {
 203 +       .probe = ipq8064_mdio_probe,
 204 +       .remove = ipq8064_mdio_remove,
 205 +       .driver = {
 206 +               .name = "ipq8064-mdio",
 207 +               .of_match_table = ipq8064_mdio_dt_ids,
 208 +       },
 209 +};
 210 +
 211 +module_platform_driver(ipq8064_mdio_driver);
 212 +
 213 +MODULE_DESCRIPTION("Qualcomm IPQ8064 MDIO interface driver");
 214 +MODULE_AUTHOR("Christian Lamparter <chunkeey@gmail.com>");
 215 +MODULE_AUTHOR("Ansuel Smith <ansuelsmth@gmail.com>");
 216 +MODULE_LICENSE("GPL");