target/linux/ipq806x/patches/0007-ARM-qcom-Rename-various-msm-prefixed-functions-to-qc.patch

   1 From 35eb6f73546d3b9475652a38fa641bd1a05a1ea1 Mon Sep 17 00:00:00 2001
   2 From: Kumar Gala <galak@codeaurora.org>
   3 Date: Tue, 4 Feb 2014 15:38:45 -0600
   4 Subject: [PATCH 007/182] ARM: qcom: Rename various msm prefixed functions to
   5  qcom
   6
   7 As mach-qcom will support a number of different Qualcomm SoC platforms
   8 we replace the msm prefix on function names with qcom to be a bit more
   9 generic.
  10
  11 Signed-off-by: Kumar Gala <galak@codeaurora.org>
  12 ---
  13  arch/arm/mach-qcom/board.c   |    4 ++--
  14  arch/arm/mach-qcom/platsmp.c |   22 +++++++++++-----------
  15  2 files changed, 13 insertions(+), 13 deletions(-)
  16
  17 diff --git a/arch/arm/mach-qcom/board.c b/arch/arm/mach-qcom/board.c
  18 index 4529f6b..830f69c 100644
  19 --- a/arch/arm/mach-qcom/board.c
  20 +++ b/arch/arm/mach-qcom/board.c
  21 @@ -17,7 +17,7 @@
  22  #include <asm/mach/arch.h>
  23  #include <asm/mach/map.h>
  24
  25 -extern struct smp_operations msm_smp_ops;
  26 +extern struct smp_operations qcom_smp_ops;
  27
  28  static const char * const qcom_dt_match[] __initconst = {
  29         "qcom,msm8660-surf",
  30 @@ -31,7 +31,7 @@ static const char * const apq8074_dt_match[] __initconst = {
  31  };
  32
  33  DT_MACHINE_START(QCOM_DT, "Qualcomm (Flattened Device Tree)")
  34 -       .smp = smp_ops(msm_smp_ops),
  35 +       .smp = smp_ops(qcom_smp_ops),
  36         .dt_compat = qcom_dt_match,
  37  MACHINE_END
  38
  39 diff --git a/arch/arm/mach-qcom/platsmp.c b/arch/arm/mach-qcom/platsmp.c
  40 index 67823a7..9c53ea7 100644
  41 --- a/arch/arm/mach-qcom/platsmp.c
  42 +++ b/arch/arm/mach-qcom/platsmp.c
  43 @@ -30,7 +30,7 @@ extern void secondary_startup(void);
  44  static DEFINE_SPINLOCK(boot_lock);
  45
  46  #ifdef CONFIG_HOTPLUG_CPU
  47 -static void __ref msm_cpu_die(unsigned int cpu)
  48 +static void __ref qcom_cpu_die(unsigned int cpu)
  49  {
  50         wfi();
  51  }
  52 @@ -42,7 +42,7 @@ static inline int get_core_count(void)
  53         return ((read_cpuid_id() >> 4) & 3) + 1;
  54  }
  55
  56 -static void msm_secondary_init(unsigned int cpu)
  57 +static void qcom_secondary_init(unsigned int cpu)
  58  {
  59         /*
  60          * Synchronise with the boot thread.
  61 @@ -70,7 +70,7 @@ static void prepare_cold_cpu(unsigned int cpu)
  62                                   "address\n");
  63  }
  64
  65 -static int msm_boot_secondary(unsigned int cpu, struct task_struct *idle)
  66 +static int qcom_boot_secondary(unsigned int cpu, struct task_struct *idle)
  67  {
  68         static int cold_boot_done;
  69
  70 @@ -108,7 +108,7 @@ static int msm_boot_secondary(unsigned int cpu, struct task_struct *idle)
  71   * does not support the ARM SCU, so just set the possible cpu mask to
  72   * NR_CPUS.
  73   */
  74 -static void __init msm_smp_init_cpus(void)
  75 +static void __init qcom_smp_init_cpus(void)
  76  {
  77         unsigned int i, ncores = get_core_count();
  78
  79 @@ -122,16 +122,16 @@ static void __init msm_smp_init_cpus(void)
  80                 set_cpu_possible(i, true);
  81  }
  82
  83 -static void __init msm_smp_prepare_cpus(unsigned int max_cpus)
  84 +static void __init qcom_smp_prepare_cpus(unsigned int max_cpus)
  85  {
  86  }
  87
  88 -struct smp_operations msm_smp_ops __initdata = {
  89 -       .smp_init_cpus          = msm_smp_init_cpus,
  90 -       .smp_prepare_cpus       = msm_smp_prepare_cpus,
  91 -       .smp_secondary_init     = msm_secondary_init,
  92 -       .smp_boot_secondary     = msm_boot_secondary,
  93 +struct smp_operations qcom_smp_ops __initdata = {
  94 +       .smp_init_cpus          = qcom_smp_init_cpus,
  95 +       .smp_prepare_cpus       = qcom_smp_prepare_cpus,
  96 +       .smp_secondary_init     = qcom_secondary_init,
  97 +       .smp_boot_secondary     = qcom_boot_secondary,
  98  #ifdef CONFIG_HOTPLUG_CPU
  99 -       .cpu_die                = msm_cpu_die,
 100 +       .cpu_die                = qcom_cpu_die,
 101  #endif
 102  };
 103 --
 104 1.7.10.4
 105