lantiq: enable cpu temp driver for all vr9 boards
[openwrt/staging/dedeckeh.git] / target / linux / lantiq / dts / vr9.dtsi
1 #include <dt-bindings/gpio/gpio.h>
2 #include <dt-bindings/input/input.h>
3
4 / {
5 #address-cells = <1>;
6 #size-cells = <1>;
7 compatible = "lantiq,xway", "lantiq,vr9";
8
9 cpus {
10 cpu@0 {
11 compatible = "mips,mips34Kc";
12 };
13 };
14
15 memory@0 {
16 device_type = "memory";
17 };
18
19 cputemp@0 {
20 compatible = "lantiq,cputemp";
21 };
22
23 biu@1F800000 {
24 #address-cells = <1>;
25 #size-cells = <1>;
26 compatible = "lantiq,biu", "simple-bus";
27 reg = <0x1F800000 0x800000>;
28 ranges = <0x0 0x1F800000 0x7FFFFF>;
29
30 icu0: icu@80200 {
31 #interrupt-cells = <1>;
32 interrupt-controller;
33 compatible = "lantiq,icu";
34 reg = <0x80200 0x28
35 0x80228 0x28
36 0x80250 0x28
37 0x80278 0x28
38 0x802a0 0x28>;
39 };
40
41 watchdog@803F0 {
42 compatible = "lantiq,wdt";
43 reg = <0x803F0 0x10>;
44 };
45 };
46
47 sram@1F000000 {
48 #address-cells = <1>;
49 #size-cells = <1>;
50 compatible = "lantiq,sram", "simple-bus";
51 reg = <0x1F000000 0x800000>;
52 ranges = <0x0 0x1F000000 0x7FFFFF>;
53
54 eiu0: eiu@101000 {
55 #interrupt-cells = <1>;
56 interrupt-controller;
57 compatible = "lantiq,eiu-xway";
58 reg = <0x101000 0x1000>;
59 interrupt-parent = <&icu0>;
60 lantiq,eiu-irqs = <166 135 66 40 41 42>;
61 };
62
63 pmu0: pmu@102000 {
64 compatible = "lantiq,pmu-xway";
65 reg = <0x102000 0x1000>;
66 };
67
68 cgu0: cgu@103000 {
69 compatible = "lantiq,cgu-xway";
70 reg = <0x103000 0x1000>;
71 };
72
73 dcdc@106a00 {
74 compatible = "lantiq,dcdc-xrx200";
75 reg = <0x106a00 0x200>;
76 };
77
78 rcu0: rcu@203000 {
79 compatible = "lantiq,rcu-xrx200";
80 reg = <0x203000 0x1000>;
81 /* irq for thermal sensor */
82 interrupt-parent = <&icu0>;
83 interrupts = <115>;
84 };
85
86 xbar0: xbar@400000 {
87 compatible = "lantiq,xbar-xway";
88 reg = <0x400000 0x1000>;
89 };
90 };
91
92 fpi@10000000 {
93 #address-cells = <1>;
94 #size-cells = <1>;
95 compatible = "lantiq,fpi", "simple-bus";
96 ranges = <0x0 0x10000000 0xEEFFFFF>;
97 reg = <0x10000000 0xEF00000>;
98
99 localbus@0 {
100 #address-cells = <2>;
101 #size-cells = <1>;
102 ranges = <0 0 0x0 0x3ffffff /* addrsel0 */
103 1 0 0x4000000 0x4000010>; /* addsel1 */
104 compatible = "lantiq,localbus", "simple-bus";
105 };
106
107 gptu@E100A00 {
108 compatible = "lantiq,gptu-xway";
109 reg = <0xE100A00 0x100>;
110 interrupt-parent = <&icu0>;
111 interrupts = <126 127 128 129 130 131>;
112 };
113
114 asc0: serial@E100400 {
115 compatible = "lantiq,asc";
116 reg = <0xE100400 0x400>;
117 interrupt-parent = <&icu0>;
118 interrupts = <104 105 106>;
119 status = "disabled";
120 };
121
122 spi: spi@E100800 {
123 compatible = "lantiq,xrx200-spi";
124 reg = <0xE100800 0x100>;
125 interrupt-parent = <&icu0>;
126 interrupts = <22 23 24>;
127 interrupt-names = "spi_rx", "spi_tx", "spi_err",
128 "spi_frm";
129 #address-cells = <1>;
130 #size-cells = <1>;
131 status = "disabled";
132 };
133
134 gpio: pinmux@E100B10 {
135 compatible = "lantiq,xrx200-pinctrl";
136 #gpio-cells = <2>;
137 gpio-controller;
138 reg = <0xE100B10 0xA0>;
139 };
140
141 asc1: serial@E100C00 {
142 compatible = "lantiq,asc";
143 reg = <0xE100C00 0x400>;
144 interrupt-parent = <&icu0>;
145 interrupts = <112 113 114>;
146 };
147
148 deu@E103100 {
149 compatible = "lantiq,deu-xrx200";
150 reg = <0xE103100 0xf00>;
151 };
152
153 dma0: dma@E104100 {
154 compatible = "lantiq,dma-xway";
155 reg = <0xE104100 0x800>;
156 };
157
158 ebu0: ebu@E105300 {
159 compatible = "lantiq,ebu-xway";
160 reg = <0xE105300 0x100>;
161 };
162
163 ifxhcd@E101000 {
164 status = "disabled";
165 compatible = "lantiq,ifxhcd-xrx200", "lantiq,ifxhcd-xrx200-dwc2";
166 reg = <0xE101000 0x1000
167 0xE120000 0x3f000>;
168 interrupt-parent = <&icu0>;
169 interrupts = <62 91>;
170 };
171
172 ifxhcd@E106000 {
173 status = "disabled";
174 compatible = "lantiq,ifxhcd-xrx200-dwc2";
175 reg = <0xE106000 0x1000>;
176 interrupt-parent = <&icu0>;
177 interrupts = <91>;
178 };
179
180 eth0: eth@E108000 {
181 #address-cells = <1>;
182 #size-cells = <0>;
183 compatible = "lantiq,xrx200-net";
184 reg = < 0xE108000 0x3000 /* switch */
185 0xE10B100 0x70 /* mdio */
186 0xE10B1D8 0x30 /* mii */
187 0xE10B308 0x30 /* pmac */
188 >;
189 interrupt-parent = <&icu0>;
190 interrupts = <75 73 72>;
191 };
192
193 mei@E116000 {
194 compatible = "lantiq,mei-xrx200";
195 reg = <0xE116000 0x9c>;
196 interrupt-parent = <&icu0>;
197 interrupts = <63>;
198 };
199
200 ppe@E234000 {
201 compatible = "lantiq,ppe-xrx200";
202 interrupt-parent = <&icu0>;
203 interrupts = <96>;
204 };
205
206 pcie@d900000 {
207 interrupt-parent = <&icu0>;
208 interrupts = <161 144>;
209 compatible = "lantiq,pcie-xrx200";
210 gpio-reset = <&gpio 38 GPIO_ACTIVE_HIGH>;
211 };
212
213 pci0: pci@E105400 {
214 #address-cells = <3>;
215 #size-cells = <2>;
216 #interrupt-cells = <1>;
217 compatible = "lantiq,pci-xway";
218 bus-range = <0x0 0x0>;
219 ranges = <0x2000000 0 0x8000000 0x8000000 0 0x2000000 /* pci memory */
220 0x1000000 0 0x00000000 0xAE00000 0 0x200000>; /* io space */
221 reg = <0x7000000 0x8000 /* config space */
222 0xE105400 0x400>; /* pci bridge */
223 status = "disabled";
224 };
225 };
226
227 vdsl {
228 compatible = "lantiq,vdsl-vrx200";
229 };
230 };