target/linux/oxnas/files/drivers/net/ethernet/stmicro/stmmac/dwmac-oxnas.c

   1 /* Copyright OpenWrt.org (C) 2015.
   2  * Copyright Altera Corporation (C) 2014. All rights reserved.
   3  *
   4  * This program is free software; you can redistribute it and/or modify
   5  * it under the terms of the GNU General Public License, version 2,
   6  * as published by the Free Software Foundation.
   7  *
   8  * This program is distributed in the hope that it will be useful,
   9  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  10  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  11  * GNU General Public License for more details.
  12  *
  13  * You should have received a copy of the GNU General Public License
  14  * along with this program.  If not, see <http://www.gnu.org/licenses/>.
  15  *
  16  * Adopted from dwmac-socfpga.c
  17  * Based on code found in mach-oxnas.c
  18  */
  19
  20 #include <linux/mfd/syscon.h>
  21 #include <linux/of.h>
  22 #include <linux/of_address.h>
  23 #include <linux/of_net.h>
  24 #include <linux/phy.h>
  25 #include <linux/regmap.h>
  26 #include <linux/reset.h>
  27 #include <linux/stmmac.h>
  28
  29 #include <mach/hardware.h>
  30
  31 #include "stmmac.h"
  32 #include "stmmac_platform.h"
  33
  34 struct oxnas_gmac {
  35         struct clk *clk;
  36 };
  37
  38 static int oxnas_gmac_init(struct platform_device *pdev, void *priv)
  39 {
  40         struct oxnas_gmac *bsp_priv = priv;
  41         int ret = 0;
  42         unsigned value;
  43
  44         ret = device_reset(&pdev->dev);
  45         if (ret)
  46                 return ret;
  47
  48         if (IS_ERR(bsp_priv->clk))
  49                 return PTR_ERR(bsp_priv->clk);
  50         clk_prepare_enable(bsp_priv->clk);
  51
  52         value = readl(SYS_CTRL_GMAC_CTRL);
  53
  54         /* Enable GMII_GTXCLK to follow GMII_REFCLK, required for gigabit PHY */
  55         value |= BIT(SYS_CTRL_GMAC_CKEN_GTX);
  56         /* Use simple mux for 25/125 Mhz clock switching */
  57         value |= BIT(SYS_CTRL_GMAC_SIMPLE_MUX);
  58         /* set auto switch tx clock source */
  59         value |= BIT(SYS_CTRL_GMAC_AUTO_TX_SOURCE);
  60         /* enable tx & rx vardelay */
  61         value |= BIT(SYS_CTRL_GMAC_CKEN_TX_OUT);
  62         value |= BIT(SYS_CTRL_GMAC_CKEN_TXN_OUT);
  63         value |= BIT(SYS_CTRL_GMAC_CKEN_TX_IN);
  64         value |= BIT(SYS_CTRL_GMAC_CKEN_RX_OUT);
  65         value |= BIT(SYS_CTRL_GMAC_CKEN_RXN_OUT);
  66         value |= BIT(SYS_CTRL_GMAC_CKEN_RX_IN);
  67         writel(value, SYS_CTRL_GMAC_CTRL);
  68
  69         /* set tx & rx vardelay */
  70         value = 0;
  71         value |= SYS_CTRL_GMAC_TX_VARDELAY(4);
  72         value |= SYS_CTRL_GMAC_TXN_VARDELAY(2);
  73         value |= SYS_CTRL_GMAC_RX_VARDELAY(10);
  74         value |= SYS_CTRL_GMAC_RXN_VARDELAY(8);
  75         writel(value, SYS_CTRL_GMAC_DELAY_CTRL);
  76
  77         return 0;
  78 }
  79
  80 static void oxnas_gmac_exit(struct platform_device *pdev, void *priv)
  81 {
  82         struct reset_control *rstc;
  83
  84         clk_disable_unprepare(priv);
  85         devm_clk_put(&pdev->dev, priv);
  86
  87         rstc = reset_control_get(&pdev->dev, NULL);
  88         if (!IS_ERR(rstc)) {
  89                 reset_control_assert(rstc);
  90                 reset_control_put(rstc);
  91         }
  92 }
  93
  94 static int oxnas_gmac_probe(struct platform_device *pdev)
  95 {
  96         struct plat_stmmacenet_data *plat_dat;
  97         struct stmmac_resources stmmac_res;
  98         int                     ret;
  99         struct device           *dev = &pdev->dev;
 100         struct oxnas_gmac       *bsp_priv;
 101
 102         bsp_priv = devm_kzalloc(dev, sizeof(*bsp_priv), GFP_KERNEL);
 103         if (!bsp_priv)
 104                 return -ENOMEM;
 105         bsp_priv->clk = devm_clk_get(dev, "gmac");
 106         if (IS_ERR(bsp_priv->clk))
 107                 return PTR_ERR(bsp_priv->clk);
 108
 109         ret = stmmac_get_platform_resources(pdev, &stmmac_res);
 110         if (ret)
 111                 return ret;
 112
 113         plat_dat = stmmac_probe_config_dt(pdev, &stmmac_res.mac);
 114         if (IS_ERR(plat_dat))
 115                 return PTR_ERR(plat_dat);
 116
 117         plat_dat->bsp_priv = bsp_priv;
 118         plat_dat->init = oxnas_gmac_init;
 119         plat_dat->exit = oxnas_gmac_exit;
 120
 121         ret = oxnas_gmac_init(pdev, bsp_priv);
 122         if (ret)
 123                 return ret;
 124
 125         return stmmac_dvr_probe(dev, plat_dat, &stmmac_res);
 126 }
 127
 128 static const struct of_device_id oxnas_gmac_match[] = {
 129         { .compatible = "plxtech,nas782x-gmac" },
 130         { }
 131 };
 132 MODULE_DEVICE_TABLE(of, oxnas_gmac_match);
 133
 134 static struct platform_driver oxnas_gmac_driver = {
 135         .probe  = oxnas_gmac_probe,
 136         .remove = stmmac_pltfr_remove,
 137         .driver = {
 138                 .name           = "oxnas-gmac",
 139                 .pm             = &stmmac_pltfr_pm_ops,
 140                 .of_match_table = oxnas_gmac_match,
 141         },
 142 };
 143 module_platform_driver(oxnas_gmac_driver);
 144
 145 MODULE_LICENSE("GPL v2");