47e342c66a588f729ea16f6fcda6e35d4d6f06a1
[openwrt/staging/dedeckeh.git] / target / linux / sunxi / patches-3.14 / 145-1-dt-sun7i-add-a20-spi.patch
1 From c9bfaadf8973cb4d9074e80c4bf8708deca62712 Mon Sep 17 00:00:00 2001
2 From: Maxime Ripard <maxime.ripard@free-electrons.com>
3 Date: Sat, 22 Feb 2014 22:35:54 +0100
4 Subject: [PATCH] ARM: dt: sun7i: Add A20 SPI controller nodes
5
6 The A20 has 4 SPI controllers compatible with the one found in the A10. Add
7 them in the DT.
8
9 Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
10 ---
11 arch/arm/boot/dts/sun7i-a20.dtsi | 44 ++++++++++++++++++++++++++++++++++++++++
12 1 file changed, 44 insertions(+)
13
14 diff --git a/arch/arm/boot/dts/sun7i-a20.dtsi b/arch/arm/boot/dts/sun7i-a20.dtsi
15 index d00fbf8..0f0ee58 100644
16 --- a/arch/arm/boot/dts/sun7i-a20.dtsi
17 +++ b/arch/arm/boot/dts/sun7i-a20.dtsi
18 @@ -401,6 +401,28 @@
19 #size-cells = <1>;
20 ranges;
21
22 + spi0: spi@01c05000 {
23 + compatible = "allwinner,sun4i-a10-spi";
24 + reg = <0x01c05000 0x1000>;
25 + interrupts = <0 10 4>;
26 + clocks = <&ahb_gates 20>, <&spi0_clk>;
27 + clock-names = "ahb", "mod";
28 + status = "disabled";
29 + #address-cells = <1>;
30 + #size-cells = <0>;
31 + };
32 +
33 + spi1: spi@01c06000 {
34 + compatible = "allwinner,sun4i-a10-spi";
35 + reg = <0x01c06000 0x1000>;
36 + interrupts = <0 11 4>;
37 + clocks = <&ahb_gates 21>, <&spi1_clk>;
38 + clock-names = "ahb", "mod";
39 + status = "disabled";
40 + #address-cells = <1>;
41 + #size-cells = <0>;
42 + };
43 +
44 emac: ethernet@01c0b000 {
45 compatible = "allwinner,sun4i-a10-emac";
46 reg = <0x01c0b000 0x1000>;
47 @@ -417,6 +439,28 @@
48 #size-cells = <0>;
49 };
50
51 + spi2: spi@01c17000 {
52 + compatible = "allwinner,sun4i-a10-spi";
53 + reg = <0x01c17000 0x1000>;
54 + interrupts = <0 12 4>;
55 + clocks = <&ahb_gates 22>, <&spi2_clk>;
56 + clock-names = "ahb", "mod";
57 + status = "disabled";
58 + #address-cells = <1>;
59 + #size-cells = <0>;
60 + };
61 +
62 + spi3: spi@01c1f000 {
63 + compatible = "allwinner,sun4i-a10-spi";
64 + reg = <0x01c1f000 0x1000>;
65 + interrupts = <0 50 4>;
66 + clocks = <&ahb_gates 23>, <&spi3_clk>;
67 + clock-names = "ahb", "mod";
68 + status = "disabled";
69 + #address-cells = <1>;
70 + #size-cells = <0>;
71 + };
72 +
73 pio: pinctrl@01c20800 {
74 compatible = "allwinner,sun7i-a20-pinctrl";
75 reg = <0x01c20800 0x400>;
76 --
77 2.0.3
78