fixes pci on lantiq AR9 SoC
authorJohn Crispin <john@openwrt.org>
Tue, 19 Jul 2011 18:06:42 +0000 (18:06 +0000)
committerJohn Crispin <john@openwrt.org>
Tue, 19 Jul 2011 18:06:42 +0000 (18:06 +0000)
SVN-Revision: 27695

target/linux/lantiq/patches-2.6.39/999-fix_pci.patch [new file with mode: 0644]

diff --git a/target/linux/lantiq/patches-2.6.39/999-fix_pci.patch b/target/linux/lantiq/patches-2.6.39/999-fix_pci.patch
new file mode 100644 (file)
index 0000000..94a3bc7
--- /dev/null
@@ -0,0 +1,18 @@
+--- a/arch/mips/pci/pci-lantiq.c
++++ b/arch/mips/pci/pci-lantiq.c
+@@ -171,8 +171,13 @@
+       u32 temp_buffer;
+       /* set clock to 33Mhz */
+-      ltq_cgu_w32(ltq_cgu_r32(LTQ_CGU_IFCCR) & ~0xf00000, LTQ_CGU_IFCCR);
+-      ltq_cgu_w32(ltq_cgu_r32(LTQ_CGU_IFCCR) | 0x800000, LTQ_CGU_IFCCR);
++      if (ltq_is_ar9()) {
++              ltq_cgu_w32(ltq_cgu_r32(LTQ_CGU_IFCCR) & ~0x1f00000, LTQ_CGU_IFCCR);
++              ltq_cgu_w32(ltq_cgu_r32(LTQ_CGU_IFCCR) | 0xe00000, LTQ_CGU_IFCCR);
++      } else {
++              ltq_cgu_w32(ltq_cgu_r32(LTQ_CGU_IFCCR) & ~0xf00000, LTQ_CGU_IFCCR);
++              ltq_cgu_w32(ltq_cgu_r32(LTQ_CGU_IFCCR) | 0x800000, LTQ_CGU_IFCCR);
++      }
+       /* external or internal clock ? */
+       if (conf->clock) {