memcpy(p, leds, num_leds * sizeof(*p));
- pdev = platform_device_alloc("gpio-leds", id);
+ pdev = platform_device_alloc("leds-gpio", id);
if (!pdev)
goto err_free_leds;
#define BOARD_95C3AM1_GPIO_LED_2 12
#define BOARD_95C3AM1_GPIO_LED_3 13
-extern unsigned char ltq_ethaddr[6];
-
static struct mtd_partition board_95C3AM1_partitions[] =
{
{
#define EASY98020_GPIO_LED_GE1_ACT 106
#define EASY98020_GPIO_LED_GE1_LINK 105
-extern unsigned char ltq_ethaddr[6];
-
static struct mtd_partition easy98020_spi_partitions[] =
{
{
ltq_register_pci(<q_pci_data);
ltq_eth_data.mii_mode = PHY_INTERFACE_MODE_MII;
arv45xx_register_ethernet();
+ ltq_register_tapi();
}
MIPS_MACHINE(LANTIQ_MACH_ARV7525PW,
--- /dev/null
+--- a/arch/mips/lantiq/falcon/mach-easy98000.c
++++ b/arch/mips/lantiq/falcon/mach-easy98000.c
+@@ -17,10 +17,11 @@
+ #include <linux/spi/eeprom.h>
+ #include <falcon/lantiq_soc.h>
+
++#include <dev-gpio-leds.h>
++
+ #include "../machtypes.h"
+
+ #include "devices.h"
+-#include "dev-leds-gpio.h"
+
+ #define EASY98000_GPIO_LED_0 9
+ #define EASY98000_GPIO_LED_1 10
+@@ -29,7 +30,16 @@
+ #define EASY98000_GPIO_LED_4 13
+ #define EASY98000_GPIO_LED_5 14
+
+-extern unsigned char ltq_ethaddr[6];
++static unsigned char ltq_ethaddr[6] = {0};
++
++static int __init falcon_set_ethaddr(char *str)
++{
++ sscanf(str, "%02hhx:%02hhx:%02hhx:%02hhx:%02hhx:%02hhx",
++ <q_ethaddr[0], <q_ethaddr[1], <q_ethaddr[2],
++ <q_ethaddr[3], <q_ethaddr[4], <q_ethaddr[5]);
++ return 0;
++}
++__setup("ethaddr=", falcon_set_ethaddr);
+
+ static struct mtd_partition easy98000_nor_partitions[] =
+ {
+@@ -70,7 +80,7 @@ static struct spi_board_info easy98000_s
+ .platform_data = &easy98000_spi_flash_platform_data
+ };
+
+-static struct gpio_led easy98000_leds_gpio[] __initdata = {
++static struct gpio_led easy98000_gpio_leds[] __initdata = {
+ {
+ .name = "easy98000:green:0",
+ .gpio = EASY98000_GPIO_LED_0,
+@@ -104,12 +114,11 @@ static struct gpio_led easy98000_leds_gp
+
+ static struct dm9000_plat_data dm9000_plat_data = {
+ .flags = DM9000_PLATF_8BITONLY,
+- //.dev_addr = { }, /* possibility to provide an ethernet address for the chip */
+ };
+
+ static struct resource dm9000_resources[] = {
+- MEM_RES("dm9000_io", DM9000_IO, DM9000_IO),
+- MEM_RES("dm9000_data", DM9000_DATA, DM9000_DATA),
++ MEM_RES("dm9000_io", DM9000_IO, 1),
++ MEM_RES("dm9000_data", DM9000_DATA, 1),
+ [2] = {
+ /* with irq (210 -> gpio 110) the driver is very unreliable */
+ .start = -1, /* use polling */
+@@ -212,8 +221,8 @@ static void __init easy98000_init_common
+ falcon_register_i2c();
+ platform_device_register(&easy98000_i2c_gpio_device);
+ register_davicom();
+- ltq_add_device_leds_gpio(-1, ARRAY_SIZE(easy98000_leds_gpio),
+- easy98000_leds_gpio);
++ ltq_add_device_gpio_leds(-1, ARRAY_SIZE(easy98000_gpio_leds),
++ easy98000_gpio_leds);
+ register_easy98000_cpld();
+ easy98000_spi_gpio_init();
+ }
--- /dev/null
+--- a/arch/mips/include/asm/mach-lantiq/falcon/lantiq_soc.h
++++ b/arch/mips/include/asm/mach-lantiq/falcon/lantiq_soc.h
+@@ -129,8 +129,8 @@ extern __iomem void *ltq_sys1_membase;
+ ltq_sys1_w32((ltq_sys1_r32(reg) & ~(clear)) | (set), reg)
+
+ /* gpio_request wrapper to help configure the pin */
+-extern int ltq_gpio_request(unsigned int pin, unsigned int val,
+- unsigned int dir, const char *name);
++extern int ltq_gpio_request(unsigned int pin, unsigned int alt0,
++ unsigned int alt1, unsigned int dir, const char *name);
+ extern int ltq_gpio_mux_set(unsigned int pin, unsigned int mux);
+
+ /* to keep the irq code generic we need to define these to 0 as falcon
+--- a/arch/mips/lantiq/falcon/gpio.c
++++ b/arch/mips/lantiq/falcon/gpio.c
+@@ -96,11 +96,12 @@ int ltq_gpio_mux_set(unsigned int pin, u
+ }
+ EXPORT_SYMBOL(ltq_gpio_mux_set);
+
+-int ltq_gpio_request(unsigned int pin, unsigned int val,
+- unsigned int dir, const char *name)
++int ltq_gpio_request(unsigned int pin, unsigned int alt0,
++ unsigned int alt1, unsigned int dir, const char *name)
+ {
+ int port = pin / 100;
+ int offset = pin % 100;
++ unsigned int mux = (!!alt0) & ((!!alt1) << 1);
+
+ if (offset >= PINS_PER_PORT || port >= MAX_PORTS)
+ return -EINVAL;
+@@ -115,7 +116,7 @@ int ltq_gpio_request(unsigned int pin, u
+ else
+ gpio_direction_input(pin);
+
+- return ltq_gpio_mux_set(pin, val);
++ return ltq_gpio_mux_set(pin, mux);
+ }
+ EXPORT_SYMBOL(ltq_gpio_request);
+
+--- a/arch/mips/lantiq/falcon/prom.c
++++ b/arch/mips/lantiq/falcon/prom.c
+@@ -43,9 +43,9 @@ ltq_soc_setup(void)
+ falcon_register_gpio();
+ if (register_asc1) {
+ ltq_register_asc(1);
+- if (ltq_gpio_request(MUXC_SIF_RX_PIN, 3, 0, "asc1-rx"))
++ if (ltq_gpio_request(MUXC_SIF_RX_PIN, 1, 1, 0, "asc1-rx"))
+ pr_err("failed to request asc1-rx");
+- if (ltq_gpio_request(MUXC_SIF_TX_PIN, 3, 1, "asc1-tx"))
++ if (ltq_gpio_request(MUXC_SIF_TX_PIN, 1, 1, 1, "asc1-tx"))
+ pr_err("failed to request asc1-tx");
+ ltq_sysctl_activate(SYSCTL_SYS1, ACTS_ASC1_ACT);
+ }
--- /dev/null
+--- a/arch/mips/lantiq/falcon/devices.c
++++ b/arch/mips/lantiq/falcon/devices.c
+@@ -130,10 +130,10 @@ falcon_register_gpio_extra(void)
+ /* i2c */
+ static struct resource falcon_i2c_resources[] = {
+ MEM_RES("i2c", LTQ_I2C_BASE_ADDR, LTQ_I2C_SIZE),
+- IRQ_RES("i2c_lb", FALCON_IRQ_I2C_LBREQ),
+- IRQ_RES("i2c_b", FALCON_IRQ_I2C_BREQ),
+- IRQ_RES("i2c_err", FALCON_IRQ_I2C_I2C_ERR),
+- IRQ_RES("i2c_p", FALCON_IRQ_I2C_I2C_P),
++ IRQ_RES(i2c_lb, FALCON_IRQ_I2C_LBREQ),
++ IRQ_RES(i2c_b, FALCON_IRQ_I2C_BREQ),
++ IRQ_RES(i2c_err, FALCON_IRQ_I2C_I2C_ERR),
++ IRQ_RES(i2c_p, FALCON_IRQ_I2C_I2C_P),
+ };
+
+ void __init falcon_register_i2c(void)
--- /dev/null
+--- a/arch/mips/lantiq/falcon/sysctrl.c
++++ b/arch/mips/lantiq/falcon/sysctrl.c
+@@ -63,11 +63,11 @@ void __iomem *ltq_ebu_membase;
+ #define ltq_status_r32(x) ltq_r32(ltq_status_membase + (x))
+
+ static inline void
+-ltq_sysctl_wait(int module, unsigned int mask, unsigned int test)
++ltq_sysctl_wait(int module, unsigned int mask, unsigned int test, unsigned int reg)
+ {
+ int err = 1000000;
+
+- do {} while (--err && ((ltq_reg_r32(module, LTQ_SYSCTL_ACTS)
++ do {} while (--err && ((ltq_reg_r32(module, reg)
+ & mask) != test));
+ if (!err)
+ pr_err("module de/activation failed %d %08X %08X\n",
+@@ -82,7 +82,7 @@ ltq_sysctl_activate(int module, unsigned
+
+ ltq_reg_w32(module, mask, LTQ_SYSCTL_CLKEN);
+ ltq_reg_w32(module, mask, LTQ_SYSCTL_ACT);
+- ltq_sysctl_wait(module, mask, mask);
++ ltq_sysctl_wait(module, mask, mask, LTQ_SYSCTL_ACTS);
+ }
+ EXPORT_SYMBOL(ltq_sysctl_activate);
+
+@@ -94,7 +94,7 @@ ltq_sysctl_deactivate(int module, unsign
+
+ ltq_reg_w32(module, mask, LTQ_SYSCTL_CLKCLR);
+ ltq_reg_w32(module, mask, LTQ_SYSCTL_DEACT);
+- ltq_sysctl_wait(module, mask, 0);
++ ltq_sysctl_wait(module, mask, 0, LTQ_SYSCTL_ACTS);
+ }
+ EXPORT_SYMBOL(ltq_sysctl_deactivate);
+
+@@ -105,7 +105,7 @@ ltq_sysctl_clken(int module, unsigned in
+ return;
+
+ ltq_reg_w32(module, mask, LTQ_SYSCTL_CLKEN);
+- ltq_sysctl_wait(module, mask, mask);
++ ltq_sysctl_wait(module, mask, mask, LTQ_SYSCTL_CLKS);
+ }
+ EXPORT_SYMBOL(ltq_sysctl_clken);
+
+@@ -116,7 +116,7 @@ ltq_sysctl_clkdis(int module, unsigned i
+ return;
+
+ ltq_reg_w32(module, mask, LTQ_SYSCTL_CLKCLR);
+- ltq_sysctl_wait(module, mask, 0);
++ ltq_sysctl_wait(module, mask, 0, LTQ_SYSCTL_CLKS);
+ }
+ EXPORT_SYMBOL(ltq_sysctl_clkdis);
+
+@@ -132,7 +132,7 @@ ltq_sysctl_reboot(int module, unsigned i
+ if ((~act & mask) != 0)
+ ltq_sysctl_activate(module, ~act & mask);
+ ltq_reg_w32(module, act & mask, LTQ_SYSCTL_RBT);
+- ltq_sysctl_wait(module, mask, mask);
++ ltq_sysctl_wait(module, mask, mask, LTQ_SYSCTL_ACTS);
+ }
+ EXPORT_SYMBOL(ltq_sysctl_reboot);
+
--- /dev/null
+--- a/arch/mips/include/asm/mach-lantiq/falcon/sysctrl.h
++++ b/arch/mips/include/asm/mach-lantiq/falcon/sysctrl.h
+@@ -20,23 +20,41 @@
+ #ifndef __FALCON_SYSCTRL_H
+ #define __FALCON_SYSCTRL_H
+
+-extern void sys1_hw_activate(u32 mask);
+-extern void sys1_hw_deactivate(u32 mask);
+-extern void sys1_hw_clk_enable(u32 mask);
+-extern void sys1_hw_clk_disable(u32 mask);
+-extern void sys1_hw_activate_or_reboot(u32 mask);
++#include <falcon/lantiq_soc.h>
+
+-extern void sys_eth_hw_activate(u32 mask);
+-extern void sys_eth_hw_deactivate(u32 mask);
+-extern void sys_eth_hw_clk_enable(u32 mask);
+-extern void sys_eth_hw_clk_disable(u32 mask);
+-extern void sys_eth_hw_activate_or_reboot(u32 mask);
++static inline void sys1_hw_activate(u32 mask)
++{ ltq_sysctl_activate(SYSCTL_SYS1, mask); }
++static inline void sys1_hw_deactivate(u32 mask)
++{ ltq_sysctl_deactivate(SYSCTL_SYS1, mask); }
++static inline void sys1_hw_clk_enable(u32 mask)
++{ ltq_sysctl_clken(SYSCTL_SYS1, mask); }
++static inline void sys1_hw_clk_disable(u32 mask)
++{ ltq_sysctl_clkdis(SYSCTL_SYS1, mask); }
++static inline void sys1_hw_activate_or_reboot(u32 mask)
++{ ltq_sysctl_reboot(SYSCTL_SYS1, mask); }
+
+-extern void sys_gpe_hw_activate(u32 mask);
+-extern void sys_gpe_hw_deactivate(u32 mask);
+-extern void sys_gpe_hw_clk_enable(u32 mask);
+-extern void sys_gpe_hw_clk_disable(u32 mask);
+-extern void sys_gpe_hw_activate_or_reboot(u32 mask);
+-extern int sys_gpe_hw_is_activated(u32 mask);
++static inline void sys_eth_hw_activate(u32 mask)
++{ ltq_sysctl_activate(SYSCTL_SYSETH, mask); }
++static inline void sys_eth_hw_deactivate(u32 mask)
++{ ltq_sysctl_deactivate(SYSCTL_SYSETH, mask); }
++static inline void sys_eth_hw_clk_enable(u32 mask)
++{ ltq_sysctl_clken(SYSCTL_SYSETH, mask); }
++static inline void sys_eth_hw_clk_disable(u32 mask)
++{ ltq_sysctl_clkdis(SYSCTL_SYSETH, mask); }
++static inline void sys_eth_hw_activate_or_reboot(u32 mask)
++{ ltq_sysctl_reboot(SYSCTL_SYSETH, mask); }
++
++static inline void sys_gpe_hw_activate(u32 mask)
++{ ltq_sysctl_activate(SYSCTL_SYSGPE, mask); }
++static inline void sys_gpe_hw_deactivate(u32 mask)
++{ ltq_sysctl_deactivate(SYSCTL_SYSGPE, mask); }
++static inline void sys_gpe_hw_clk_enable(u32 mask)
++{ ltq_sysctl_clken(SYSCTL_SYSGPE, mask); }
++static inline void sys_gpe_hw_clk_disable(u32 mask)
++{ ltq_sysctl_clkdis(SYSCTL_SYSGPE, mask); }
++static inline void sys_gpe_hw_activate_or_reboot(u32 mask)
++{ ltq_sysctl_reboot(SYSCTL_SYSGPE, mask); }
++static inline int sys_gpe_hw_is_activated(u32 mask)
++{ return 1; }
+
+ #endif /* __FALCON_SYSCTRL_H */
--- /dev/null
+--- a/arch/mips/lantiq/falcon/prom.c
++++ b/arch/mips/lantiq/falcon/prom.c
+@@ -14,6 +14,9 @@
+ #include "../prom.h"
+
+ #define SOC_FALCON "Falcon"
++#define SOC_FALCON_D "Falcon-D"
++#define SOC_FALCON_V "Falcon-V"
++#define SOC_FALCON_M "Falcon-M"
+
+ #define PART_SHIFT 12
+ #define PART_MASK 0x0FFFF000
+@@ -21,6 +24,8 @@
+ #define REV_MASK 0xF0000000
+ #define SREV_SHIFT 22
+ #define SREV_MASK 0x03C00000
++#define TYPE_SHIFT 26
++#define TYPE_MASK 0x3C000000
+
+ #define MUXC_SIF_RX_PIN 112
+ #define MUXC_SIF_TX_PIN 113
+@@ -54,14 +59,30 @@ ltq_soc_setup(void)
+ void __init
+ ltq_soc_detect(struct ltq_soc_info *i)
+ {
++ u32 type;
+ i->partnum = (ltq_r32(LTQ_FALCON_CHIPID) & PART_MASK) >> PART_SHIFT;
+ i->rev = (ltq_r32(LTQ_FALCON_CHIPID) & REV_MASK) >> REV_SHIFT;
+- i->srev = (ltq_r32(LTQ_FALCON_CHIPCONF) & SREV_MASK) >> SREV_SHIFT;
++ i->srev = ((ltq_r32(LTQ_FALCON_CHIPCONF) & SREV_MASK) >> SREV_SHIFT);
+ sprintf(i->rev_type, "%c%d%d", (i->srev & 0x4) ? ('B') : ('A'),
+- i->rev & 0x7, i->srev & 0x3);
++ i->rev & 0x7, (i->srev & 0x3) + 1);
++
+ switch (i->partnum) {
+ case SOC_ID_FALCON:
+- i->name = SOC_FALCON;
++ type = (ltq_r32(LTQ_FALCON_CHIPTYPE) & TYPE_MASK) >> TYPE_SHIFT;
++ switch (type) {
++ case 0:
++ i->name = SOC_FALCON_D;
++ break;
++ case 1:
++ i->name = SOC_FALCON_V;
++ break;
++ case 2:
++ i->name = SOC_FALCON_M;
++ break;
++ default:
++ i->name = SOC_FALCON;
++ break;
++ }
+ i->type = SOC_TYPE_FALCON;
+ break;
+
+--- a/arch/mips/include/asm/mach-lantiq/falcon/lantiq_soc.h
++++ b/arch/mips/include/asm/mach-lantiq/falcon/lantiq_soc.h
+@@ -78,6 +78,7 @@
+ #define LTQ_STATUS_BASE_ADDR 0x1E802000
+
+ #define LTQ_FALCON_CHIPID ((u32 *)(KSEG1 + LTQ_STATUS_BASE_ADDR + 0x0c))
++#define LTQ_FALCON_CHIPTYPE ((u32 *)(KSEG1 + LTQ_STATUS_BASE_ADDR + 0x38))
+ #define LTQ_FALCON_CHIPCONF ((u32 *)(KSEG1 + LTQ_STATUS_BASE_ADDR + 0x40))
+
+ /* SYSCTL - start/stop/restart/configure/... different parts of the Soc */
projects / openwrt / staging / dedeckeh.git / commitdiff