target/linux/adm5120/files/arch/mips/adm5120/memory.c

   1 /*
   2  *  $Id$
   3  *
   4  *  Copyright (C) 2007 OpenWrt.org
   5  *  Copyright (C) 2007 Gabor Juhos <juhosg at openwrt.org>
   6  *
   7  *  This program is free software; you can redistribute it and/or
   8  *  modify it under the terms of the GNU General Public License
   9  *  as published by the Free Software Foundation; either version 2
  10  *  of the License, or (at your option) any later version.
  11  *
  12  *  This program is distributed in the hope that it will be useful,
  13  *  but WITHOUT ANY WARRANTY; without even the implied warranty of
  14  *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  15  *  GNU General Public License for more details.
  16  *
  17  *  You should have received a copy of the GNU General Public License
  18  *  along with this program; if not, write to the
  19  *  Free Software Foundation, Inc., 51 Franklin Street, Fifth Floor,
  20  *  Boston, MA  02110-1301, USA.
  21  *
  22  */
  23
  24 #include <linux/init.h>
  25 #include <linux/types.h>
  26 #include <linux/kernel.h>
  27 #include <linux/io.h>
  28
  29 #include <asm/bootinfo.h>
  30 #include <asm/addrspace.h>
  31
  32 #include <adm5120_info.h>
  33 #include <adm5120_defs.h>
  34 #include <adm5120_switch.h>
  35 #include <adm5120_mpmc.h>
  36
  37 #ifdef DEBUG
  38 #  define mem_dbg(f, a...)      printk(KERN_INFO "mem_detect: " f, ## a)
  39 #else
  40 #  define mem_dbg(f, a...)
  41 #endif
  42
  43 unsigned long adm5120_memsize;
  44
  45 #define MEM_READL(a)            __raw_readl((void __iomem *)(a))
  46 #define MEM_WRITEL(a, v)        __raw_writel((v), (void __iomem *)(a))
  47
  48 static int __init mem_check_pattern(u8 *addr, unsigned long offs)
  49 {
  50         u32 *p1 = (u32 *)addr;
  51         u32 *p2 = (u32 *)(addr+offs);
  52         u32 t, u, v;
  53
  54         /* save original value */
  55         t = MEM_READL(p1);
  56
  57         u = MEM_READL(p2);
  58         if (t != u)
  59                 return 0;
  60
  61         v = 0x55555555;
  62         if (u == v)
  63                 v = 0xAAAAAAAA;
  64
  65         mem_dbg("write 0x%08X to 0x%08lX\n", v, (unsigned long)p1);
  66
  67         MEM_WRITEL(p1, v);
  68         adm5120_ndelay(1000);
  69         u = MEM_READL(p2);
  70
  71         mem_dbg("pattern at 0x%08lX is 0x%08X\n", (unsigned long)p2, u);
  72
  73         /* restore original value */
  74         MEM_WRITEL(p1, t);
  75
  76         return (v == u);
  77 }
  78
  79 static void __init adm5120_detect_memsize(void)
  80 {
  81         u32     memctrl;
  82         u32     size, maxsize;
  83         u8      *p;
  84
  85         memctrl = SW_READ_REG(MEMCTRL);
  86         switch (memctrl & MEMCTRL_SDRS_MASK) {
  87         case MEMCTRL_SDRS_4M:
  88                 maxsize = 4 << 20;
  89                 break;
  90         case MEMCTRL_SDRS_8M:
  91                 maxsize = 8 << 20;
  92                 break;
  93         case MEMCTRL_SDRS_16M:
  94                 maxsize = 16 << 20;
  95                 break;
  96         default:
  97                 maxsize = 64 << 20;
  98                 break;
  99         }
 100
 101         mem_dbg("checking for %uMB chip in 1st bank\n", maxsize >> 20);
 102
 103         /* detect size of the 1st SDRAM bank */
 104         p = (u8 *)KSEG1ADDR(0);
 105         for (size = 2<<20; size <= (maxsize >> 1); size <<= 1) {
 106                 if (mem_check_pattern(p, size)) {
 107                         /* mirrored address */
 108                         mem_dbg("mirrored data found at offset 0x%08X\n", size);
 109                         break;
 110                 }
 111         }
 112
 113         mem_dbg("chip size in 1st bank is %uMB\n", size >> 20);
 114         adm5120_memsize = size;
 115
 116         if (size != maxsize)
 117                 /* 2nd bank is not supported */
 118                 goto out;
 119
 120         if ((memctrl & MEMCTRL_SDR1_ENABLE) == 0)
 121                 /* 2nd bank is disabled */
 122                 goto out;
 123
 124         /*
 125          * some bootloaders enable 2nd bank, even if the 2nd SDRAM chip
 126          * are missing.
 127          */
 128         mem_dbg("check presence of 2nd bank\n");
 129
 130         p = (u8 *)KSEG1ADDR(maxsize+size-4);
 131         if (mem_check_pattern(p, 0))
 132                 adm5120_memsize += size;
 133
 134         if (maxsize != size) {
 135                 /* adjusting MECTRL register */
 136                 memctrl &= ~(MEMCTRL_SDRS_MASK);
 137                 switch (size>>20) {
 138                 case 4:
 139                         memctrl |= MEMCTRL_SDRS_4M;
 140                         break;
 141                 case 8:
 142                         memctrl |= MEMCTRL_SDRS_8M;
 143                         break;
 144                 case 16:
 145                         memctrl |= MEMCTRL_SDRS_16M;
 146                         break;
 147                 default:
 148                         memctrl |= MEMCTRL_SDRS_64M;
 149                         break;
 150                 }
 151                 SW_WRITE_REG(MEMCTRL, memctrl);
 152         }
 153
 154 out:
 155         mem_dbg("%dx%uMB memory found\n", (adm5120_memsize == size) ? 1 : 2 ,
 156                 size>>20);
 157 }
 158
 159 void __init adm5120_mem_init(void)
 160 {
 161         adm5120_detect_memsize();
 162         add_memory_region(0, adm5120_memsize, BOOT_MEM_RAM);
 163 }