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prepare for ath9k support
[openwrt/staging/florian.git] / target / linux / ar71xx / files / arch / mips / ar71xx / platform.c
1 /*
2 * Atheros AR71xx SoC platform devices
3 *
4 * Copyright (C) 2008 Gabor Juhos <juhosg@openwrt.org>
5 * Copyright (C) 2008 Imre Kaloz <kaloz@openwrt.org>
6 *
7 * Parts of this file are based on Atheros' 2.6.15 BSP
8 *
9 * This program is free software; you can redistribute it and/or modify it
10 * under the terms of the GNU General Public License version 2 as published
11 * by the Free Software Foundation.
12 */
13
14 #include <linux/kernel.h>
15 #include <linux/init.h>
16 #include <linux/delay.h>
17 #include <linux/dma-mapping.h>
18 #include <linux/platform_device.h>
19 #include <linux/serial_8250.h>
20 #include <linux/ath9k_platform.h>
21
22 #include <asm/mach-ar71xx/ar71xx.h>
23 #include <asm/mach-ar71xx/platform.h>
24
25 static u8 ar71xx_mac_base[ETH_ALEN] __initdata;
26
27 /*
28 * OHCI (USB full speed host controller)
29 */
30 static struct resource ar71xx_ohci_resources[] = {
31 [0] = {
32 .start = AR71XX_OHCI_BASE,
33 .end = AR71XX_OHCI_BASE + AR71XX_OHCI_SIZE - 1,
34 .flags = IORESOURCE_MEM,
35 },
36 [1] = {
37 .start = AR71XX_MISC_IRQ_OHCI,
38 .end = AR71XX_MISC_IRQ_OHCI,
39 .flags = IORESOURCE_IRQ,
40 },
41 };
42
43 static u64 ar71xx_ohci_dmamask = DMA_BIT_MASK(32);
44 static struct platform_device ar71xx_ohci_device = {
45 .name = "ar71xx-ohci",
46 .id = -1,
47 .resource = ar71xx_ohci_resources,
48 .num_resources = ARRAY_SIZE(ar71xx_ohci_resources),
49 .dev = {
50 .dma_mask = &ar71xx_ohci_dmamask,
51 .coherent_dma_mask = DMA_BIT_MASK(32),
52 },
53 };
54
55 /*
56 * EHCI (USB full speed host controller)
57 */
58 static struct resource ar71xx_ehci_resources[] = {
59 [0] = {
60 .start = AR71XX_EHCI_BASE,
61 .end = AR71XX_EHCI_BASE + AR71XX_EHCI_SIZE - 1,
62 .flags = IORESOURCE_MEM,
63 },
64 [1] = {
65 .start = AR71XX_CPU_IRQ_USB,
66 .end = AR71XX_CPU_IRQ_USB,
67 .flags = IORESOURCE_IRQ,
68 },
69 };
70
71
72 static u64 ar71xx_ehci_dmamask = DMA_BIT_MASK(32);
73 static struct ar71xx_ehci_platform_data ar71xx_ehci_data;
74
75 static struct platform_device ar71xx_ehci_device = {
76 .name = "ar71xx-ehci",
77 .id = -1,
78 .resource = ar71xx_ehci_resources,
79 .num_resources = ARRAY_SIZE(ar71xx_ehci_resources),
80 .dev = {
81 .dma_mask = &ar71xx_ehci_dmamask,
82 .coherent_dma_mask = DMA_BIT_MASK(32),
83 .platform_data = &ar71xx_ehci_data,
84 },
85 };
86
87 #define AR71XX_USB_RESET_MASK \
88 (RESET_MODULE_USB_HOST | RESET_MODULE_USB_PHY \
89 | RESET_MODULE_USB_OHCI_DLL)
90
91 static void ar71xx_usb_setup(void)
92 {
93 ar71xx_device_stop(AR71XX_USB_RESET_MASK);
94 mdelay(1000);
95 ar71xx_device_start(AR71XX_USB_RESET_MASK);
96
97 /* Turning on the Buff and Desc swap bits */
98 ar71xx_usb_ctrl_wr(USB_CTRL_REG_CONFIG, 0xf0000);
99
100 /* WAR for HW bug. Here it adjusts the duration between two SOFS */
101 ar71xx_usb_ctrl_wr(USB_CTRL_REG_FLADJ, 0x20c00);
102
103 mdelay(900);
104 }
105
106 static void ar91xx_usb_setup(void)
107 {
108 ar71xx_device_stop(RESET_MODULE_USBSUS_OVERRIDE);
109 mdelay(10);
110
111 ar71xx_device_start(RESET_MODULE_USB_HOST);
112 mdelay(10);
113
114 ar71xx_device_start(RESET_MODULE_USB_PHY);
115 mdelay(10);
116 }
117
118 void __init ar71xx_add_device_usb(void)
119 {
120 switch (ar71xx_soc) {
121 case AR71XX_SOC_AR7130:
122 case AR71XX_SOC_AR7141:
123 case AR71XX_SOC_AR7161:
124 ar71xx_usb_setup();
125 platform_device_register(&ar71xx_ohci_device);
126 platform_device_register(&ar71xx_ehci_device);
127 break;
128
129 case AR71XX_SOC_AR9130:
130 case AR71XX_SOC_AR9132:
131 ar91xx_usb_setup();
132 ar71xx_ehci_data.is_ar91xx = 1;
133 platform_device_register(&ar71xx_ehci_device);
134 break;
135
136 default:
137 BUG();
138 }
139 }
140
141 #ifndef CONFIG_AR71XX_EARLY_SERIAL
142 static struct resource ar71xx_uart_resources[] = {
143 {
144 .start = AR71XX_UART_BASE,
145 .end = AR71XX_UART_BASE + AR71XX_UART_SIZE - 1,
146 .flags = IORESOURCE_MEM,
147 },
148 };
149
150 #define AR71XX_UART_FLAGS (UPF_BOOT_AUTOCONF | UPF_SKIP_TEST | UPF_IOREMAP)
151 static struct plat_serial8250_port ar71xx_uart_data[] = {
152 {
153 .mapbase = AR71XX_UART_BASE,
154 .irq = AR71XX_MISC_IRQ_UART,
155 .flags = AR71XX_UART_FLAGS,
156 .iotype = UPIO_MEM32,
157 .regshift = 2,
158 }, {
159 /* terminating entry */
160 }
161 };
162
163 static struct platform_device ar71xx_uart_device = {
164 .name = "serial8250",
165 .id = PLAT8250_DEV_PLATFORM,
166 .resource = ar71xx_uart_resources,
167 .num_resources = ARRAY_SIZE(ar71xx_uart_resources),
168 .dev = {
169 .platform_data = ar71xx_uart_data
170 },
171 };
172
173 void __init ar71xx_add_device_uart(void)
174 {
175 ar71xx_uart_data[0].uartclk = ar71xx_ahb_freq;
176 platform_device_register(&ar71xx_uart_device);
177 }
178 #endif /* CONFIG_AR71XX_EARLY_SERIAL */
179
180 static struct resource ar71xx_mdio_resources[] = {
181 {
182 .name = "mdio_base",
183 .flags = IORESOURCE_MEM,
184 .start = AR71XX_GE0_BASE + 0x20,
185 .end = AR71XX_GE0_BASE + 0x38 - 1,
186 }
187 };
188
189 static struct ag71xx_mdio_platform_data ar71xx_mdio_data = {
190 .phy_mask = 0xffffffff,
191 };
192
193 static struct platform_device ar71xx_mdio_device = {
194 .name = "ag71xx-mdio",
195 .id = -1,
196 .resource = ar71xx_mdio_resources,
197 .num_resources = ARRAY_SIZE(ar71xx_mdio_resources),
198 .dev = {
199 .platform_data = &ar71xx_mdio_data,
200 },
201 };
202
203 void __init ar71xx_add_device_mdio(u32 phy_mask)
204 {
205 ar71xx_mdio_data.phy_mask = phy_mask;
206 platform_device_register(&ar71xx_mdio_device);
207 }
208
209 static void ar71xx_set_pll(u32 cfg_reg, u32 pll_reg, u32 pll_val, u32 shift)
210 {
211 void __iomem *base;
212 u32 t;
213
214 base = ioremap_nocache(AR71XX_PLL_BASE, AR71XX_PLL_SIZE);
215
216 t = __raw_readl(base + cfg_reg);
217 t &= ~(3 << shift);
218 t |= (2 << shift);
219 __raw_writel(t, base + cfg_reg);
220 udelay(100);
221
222 __raw_writel(pll_val, base + pll_reg);
223
224 t |= (3 << shift);
225 __raw_writel(t, base + cfg_reg);
226 udelay(100);
227
228 t &= ~(3 << shift);
229 __raw_writel(t, base + cfg_reg);
230 udelay(100);
231
232 printk(KERN_DEBUG "ar71xx: pll_reg %#x: %#x\n",
233 (unsigned int)(base + pll_reg), __raw_readl(base + pll_reg));
234
235 iounmap(base);
236 }
237
238 static void ar71xx_set_pll_ge0(u32 val)
239 {
240 ar71xx_set_pll(AR71XX_PLL_REG_SEC_CONFIG, AR71XX_PLL_REG_ETH0_INT_CLOCK,
241 val, AR71XX_ETH0_PLL_SHIFT);
242 }
243
244 static void ar71xx_set_pll_ge1(u32 val)
245 {
246 ar71xx_set_pll(AR71XX_PLL_REG_SEC_CONFIG, AR71XX_PLL_REG_ETH1_INT_CLOCK,
247 val, AR71XX_ETH1_PLL_SHIFT);
248 }
249
250 static void ar91xx_set_pll_ge0(u32 val)
251 {
252 ar71xx_set_pll(AR91XX_PLL_REG_ETH_CONFIG, AR91XX_PLL_REG_ETH0_INT_CLOCK,
253 val, AR91XX_ETH0_PLL_SHIFT);
254 }
255
256 static void ar91xx_set_pll_ge1(u32 val)
257 {
258 ar71xx_set_pll(AR91XX_PLL_REG_ETH_CONFIG, AR91XX_PLL_REG_ETH1_INT_CLOCK,
259 val, AR91XX_ETH1_PLL_SHIFT);
260 }
261
262 static void ar71xx_ddr_flush_ge0(void)
263 {
264 ar71xx_ddr_flush(AR71XX_DDR_REG_FLUSH_GE0);
265 }
266
267 static void ar71xx_ddr_flush_ge1(void)
268 {
269 ar71xx_ddr_flush(AR71XX_DDR_REG_FLUSH_GE1);
270 }
271
272 static void ar91xx_ddr_flush_ge0(void)
273 {
274 ar71xx_ddr_flush(AR91XX_DDR_REG_FLUSH_GE0);
275 }
276
277 static void ar91xx_ddr_flush_ge1(void)
278 {
279 ar71xx_ddr_flush(AR91XX_DDR_REG_FLUSH_GE1);
280 }
281
282 static struct resource ar71xx_eth0_resources[] = {
283 {
284 .name = "mac_base",
285 .flags = IORESOURCE_MEM,
286 .start = AR71XX_GE0_BASE,
287 .end = AR71XX_GE0_BASE + 0x20 - 1,
288 }, {
289 .name = "mac_base2",
290 .flags = IORESOURCE_MEM,
291 .start = AR71XX_GE0_BASE + 0x38,
292 .end = AR71XX_GE0_BASE + 0x200 - 1,
293 }, {
294 .name = "mii_ctrl",
295 .flags = IORESOURCE_MEM,
296 .start = AR71XX_MII_BASE + MII_REG_MII0_CTRL,
297 .end = AR71XX_MII_BASE + MII_REG_MII0_CTRL + 3,
298 }, {
299 .name = "mac_irq",
300 .flags = IORESOURCE_IRQ,
301 .start = AR71XX_CPU_IRQ_GE0,
302 .end = AR71XX_CPU_IRQ_GE0,
303 },
304 };
305
306 struct ag71xx_platform_data ar71xx_eth0_data = {
307 .reset_bit = RESET_MODULE_GE0_MAC,
308 };
309
310 static struct platform_device ar71xx_eth0_device = {
311 .name = "ag71xx",
312 .id = 0,
313 .resource = ar71xx_eth0_resources,
314 .num_resources = ARRAY_SIZE(ar71xx_eth0_resources),
315 .dev = {
316 .platform_data = &ar71xx_eth0_data,
317 },
318 };
319
320 static struct resource ar71xx_eth1_resources[] = {
321 {
322 .name = "mac_base",
323 .flags = IORESOURCE_MEM,
324 .start = AR71XX_GE1_BASE,
325 .end = AR71XX_GE1_BASE + 0x20 - 1,
326 }, {
327 .name = "mac_base2",
328 .flags = IORESOURCE_MEM,
329 .start = AR71XX_GE1_BASE + 0x38,
330 .end = AR71XX_GE1_BASE + 0x200 - 1,
331 }, {
332 .name = "mii_ctrl",
333 .flags = IORESOURCE_MEM,
334 .start = AR71XX_MII_BASE + MII_REG_MII1_CTRL,
335 .end = AR71XX_MII_BASE + MII_REG_MII1_CTRL + 3,
336 }, {
337 .name = "mac_irq",
338 .flags = IORESOURCE_IRQ,
339 .start = AR71XX_CPU_IRQ_GE1,
340 .end = AR71XX_CPU_IRQ_GE1,
341 },
342 };
343
344 struct ag71xx_platform_data ar71xx_eth1_data = {
345 .reset_bit = RESET_MODULE_GE1_MAC,
346 };
347
348 static struct platform_device ar71xx_eth1_device = {
349 .name = "ag71xx",
350 .id = 1,
351 .resource = ar71xx_eth1_resources,
352 .num_resources = ARRAY_SIZE(ar71xx_eth1_resources),
353 .dev = {
354 .platform_data = &ar71xx_eth1_data,
355 },
356 };
357
358 static int ar71xx_eth_instance __initdata;
359 void __init ar71xx_add_device_eth(unsigned int id)
360 {
361 struct platform_device *pdev;
362 struct ag71xx_platform_data *pdata;
363
364 switch (id) {
365 case 0:
366 switch (ar71xx_eth0_data.phy_if_mode) {
367 case PHY_INTERFACE_MODE_MII:
368 ar71xx_eth0_data.mii_if = MII0_CTRL_IF_MII;
369 break;
370 case PHY_INTERFACE_MODE_GMII:
371 ar71xx_eth0_data.mii_if = MII0_CTRL_IF_GMII;
372 break;
373 case PHY_INTERFACE_MODE_RGMII:
374 ar71xx_eth0_data.mii_if = MII0_CTRL_IF_RGMII;
375 break;
376 case PHY_INTERFACE_MODE_RMII:
377 ar71xx_eth0_data.mii_if = MII0_CTRL_IF_RMII;
378 break;
379 default:
380 printk(KERN_ERR "ar71xx: invalid PHY interface mode "
381 "for eth0\n");
382 return;
383 }
384 pdev = &ar71xx_eth0_device;
385 break;
386 case 1:
387 switch (ar71xx_eth1_data.phy_if_mode) {
388 case PHY_INTERFACE_MODE_RMII:
389 ar71xx_eth1_data.mii_if = MII1_CTRL_IF_RMII;
390 break;
391 case PHY_INTERFACE_MODE_RGMII:
392 ar71xx_eth1_data.mii_if = MII1_CTRL_IF_RGMII;
393 break;
394 default:
395 printk(KERN_ERR "ar71xx: invalid PHY interface mode "
396 "for eth1\n");
397 return;
398 }
399 pdev = &ar71xx_eth1_device;
400 break;
401 default:
402 printk(KERN_ERR "ar71xx: invalid ethernet id %d\n", id);
403 return;
404 }
405
406 pdata = pdev->dev.platform_data;
407
408 switch (ar71xx_soc) {
409 case AR71XX_SOC_AR7130:
410 pdata->ddr_flush = id ? ar71xx_ddr_flush_ge1
411 : ar71xx_ddr_flush_ge0;
412 pdata->set_pll = id ? ar71xx_set_pll_ge1
413 : ar71xx_set_pll_ge0;
414 break;
415
416 case AR71XX_SOC_AR7141:
417 case AR71XX_SOC_AR7161:
418 pdata->ddr_flush = id ? ar71xx_ddr_flush_ge1
419 : ar71xx_ddr_flush_ge0;
420 pdata->set_pll = id ? ar71xx_set_pll_ge1
421 : ar71xx_set_pll_ge0;
422 pdata->has_gbit = 1;
423 break;
424
425 case AR71XX_SOC_AR9130:
426 pdata->ddr_flush = id ? ar91xx_ddr_flush_ge1
427 : ar91xx_ddr_flush_ge0;
428 pdata->set_pll = id ? ar91xx_set_pll_ge1
429 : ar91xx_set_pll_ge0;
430 pdata->is_ar91xx = 1;
431 break;
432
433 case AR71XX_SOC_AR9132:
434 pdata->ddr_flush = id ? ar91xx_ddr_flush_ge1
435 : ar91xx_ddr_flush_ge0;
436 pdata->set_pll = id ? ar91xx_set_pll_ge1
437 : ar91xx_set_pll_ge0;
438 pdata->is_ar91xx = 1;
439 pdata->has_gbit = 1;
440 break;
441
442 default:
443 BUG();
444 }
445
446 switch (pdata->phy_if_mode) {
447 case PHY_INTERFACE_MODE_GMII:
448 case PHY_INTERFACE_MODE_RGMII:
449 if (!pdata->has_gbit) {
450 printk(KERN_ERR "ar71xx: no gbit available on eth%d\n",
451 id);
452 return;
453 }
454 /* fallthrough */
455 default:
456 break;
457 }
458
459 memcpy(pdata->mac_addr, ar71xx_mac_base, ETH_ALEN);
460 pdata->mac_addr[5] += ar71xx_eth_instance;
461
462 platform_device_register(pdev);
463 ar71xx_eth_instance++;
464 }
465
466 static struct resource ar71xx_spi_resources[] = {
467 [0] = {
468 .start = AR71XX_SPI_BASE,
469 .end = AR71XX_SPI_BASE + AR71XX_SPI_SIZE - 1,
470 .flags = IORESOURCE_MEM,
471 },
472 };
473
474 static struct platform_device ar71xx_spi_device = {
475 .name = "ar71xx-spi",
476 .id = -1,
477 .resource = ar71xx_spi_resources,
478 .num_resources = ARRAY_SIZE(ar71xx_spi_resources),
479 };
480
481 void __init ar71xx_add_device_spi(struct ar71xx_spi_platform_data *pdata,
482 struct spi_board_info const *info,
483 unsigned n)
484 {
485 spi_register_board_info(info, n);
486 ar71xx_spi_device.dev.platform_data = pdata;
487 platform_device_register(&ar71xx_spi_device);
488 }
489
490 void __init ar71xx_add_device_leds_gpio(int id, unsigned num_leds,
491 struct gpio_led *leds)
492 {
493 struct platform_device *pdev;
494 struct gpio_led_platform_data pdata;
495 struct gpio_led *p;
496 int err;
497
498 p = kmalloc(num_leds * sizeof(*p), GFP_KERNEL);
499 if (!p)
500 return;
501
502 memcpy(p, leds, num_leds * sizeof(*p));
503
504 pdev = platform_device_alloc("leds-gpio", id);
505 if (!pdev)
506 goto err_free_leds;
507
508 memset(&pdata, 0, sizeof(pdata));
509 pdata.num_leds = num_leds;
510 pdata.leds = leds;
511
512 err = platform_device_add_data(pdev, &pdata, sizeof(pdata));
513 if (err)
514 goto err_put_pdev;
515
516 err = platform_device_add(pdev);
517 if (err)
518 goto err_put_pdev;
519
520 return;
521
522 err_put_pdev:
523 platform_device_put(pdev);
524
525 err_free_leds:
526 kfree(p);
527 }
528
529 void __init ar71xx_add_device_gpio_buttons(int id,
530 unsigned poll_interval,
531 unsigned nbuttons,
532 struct gpio_button *buttons)
533 {
534 struct platform_device *pdev;
535 struct gpio_buttons_platform_data pdata;
536 struct gpio_button *p;
537 int err;
538
539 p = kmalloc(nbuttons * sizeof(*p), GFP_KERNEL);
540 if (!p)
541 return;
542
543 memcpy(p, buttons, nbuttons * sizeof(*p));
544
545 pdev = platform_device_alloc("gpio-buttons", id);
546 if (!pdev)
547 goto err_free_buttons;
548
549 memset(&pdata, 0, sizeof(pdata));
550 pdata.poll_interval = poll_interval;
551 pdata.nbuttons = nbuttons;
552 pdata.buttons = p;
553
554 err = platform_device_add_data(pdev, &pdata, sizeof(pdata));
555 if (err)
556 goto err_put_pdev;
557
558
559 err = platform_device_add(pdev);
560 if (err)
561 goto err_put_pdev;
562
563 return;
564
565 err_put_pdev:
566 platform_device_put(pdev);
567
568 err_free_buttons:
569 kfree(p);
570 }
571
572 void __init ar71xx_add_device_wdt(void)
573 {
574 platform_device_register_simple("ar71xx-wdt", -1, NULL, 0);
575 }
576
577 void __init ar71xx_set_mac_base(unsigned char *mac)
578 {
579 memcpy(ar71xx_mac_base, mac, ETH_ALEN);
580 }
581
582 void __init ar71xx_parse_mac_addr(char *mac_str)
583 {
584 u8 tmp[ETH_ALEN];
585 int t;
586
587 t = sscanf(mac_str, "%02hhx:%02hhx:%02hhx:%02hhx:%02hhx:%02hhx",
588 &tmp[0], &tmp[1], &tmp[2], &tmp[3], &tmp[4], &tmp[5]);
589
590 if (t == ETH_ALEN)
591 ar71xx_set_mac_base(tmp);
592 else
593 printk(KERN_DEBUG "ar71xx: failed to parse mac address "
594 "\"%s\"\n", mac_str);
595 }
596
597 static struct resource ar91xx_wmac_resources[] = {
598 {
599 .start = AR91XX_WMAC_BASE,
600 .end = AR91XX_WMAC_BASE + AR91XX_WMAC_SIZE - 1,
601 .flags = IORESOURCE_MEM,
602 }, {
603 .start = AR71XX_CPU_IRQ_WMAC,
604 .end = AR71XX_CPU_IRQ_WMAC,
605 .flags = IORESOURCE_IRQ,
606 },
607 };
608
609 static struct ath9k_platform_data ar91xx_wmac_data;
610
611 static struct platform_device ar91xx_wmac_device = {
612 .name = "ath9k",
613 .id = -1,
614 .resource = ar91xx_wmac_resources,
615 .num_resources = ARRAY_SIZE(ar91xx_wmac_resources),
616 .dev = {
617 .platform_data = &ar91xx_wmac_data,
618 },
619 };
620
621 void __init ar91xx_add_device_wmac(void)
622 {
623 u8 *ee = (u8 *) KSEG1ADDR(0x1fff1000);
624
625 memcpy(ar91xx_wmac_data.eeprom_data, ee,
626 sizeof(ar91xx_wmac_data.eeprom_data));
627
628 ar71xx_device_stop(RESET_MODULE_AMBA2WMAC);
629 mdelay(10);
630
631 ar71xx_device_start(RESET_MODULE_AMBA2WMAC);
632 mdelay(10);
633
634 platform_device_register(&ar91xx_wmac_device);
635 }
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