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[openwrt/staging/florian.git] / target / linux / generic-2.6 / patches-2.6.26 / 910-cryptodev_backport.patch
1 --- a/crypto/Kconfig
2 +++ b/crypto/Kconfig
3 @@ -65,6 +65,7 @@
4 config CRYPTO_CRYPTD
5 tristate "Software async crypto daemon"
6 select CRYPTO_BLKCIPHER
7 + select CRYPTO_HASH
8 select CRYPTO_MANAGER
9 help
10 This is a generic software asynchronous crypto daemon that
11 @@ -212,7 +213,7 @@
12
13 config CRYPTO_CRC32C
14 tristate "CRC32c CRC algorithm"
15 - select CRYPTO_ALGAPI
16 + select CRYPTO_HASH
17 select LIBCRC32C
18 help
19 Castagnoli, et al Cyclic Redundancy-Check Algorithm. Used
20 @@ -241,6 +242,57 @@
21 should not be used for other purposes because of the weakness
22 of the algorithm.
23
24 +config CRYPTO_RMD128
25 + tristate "RIPEMD-128 digest algorithm"
26 + select CRYPTO_ALGAPI
27 + help
28 + RIPEMD-128 (ISO/IEC 10118-3:2004).
29 +
30 + RIPEMD-128 is a 128-bit cryptographic hash function. It should only
31 + to be used as a secure replacement for RIPEMD. For other use cases
32 + RIPEMD-160 should be used.
33 +
34 + Developed by Hans Dobbertin, Antoon Bosselaers and Bart Preneel.
35 + See <http://home.esat.kuleuven.be/~bosselae/ripemd160.html>
36 +
37 +config CRYPTO_RMD160
38 + tristate "RIPEMD-160 digest algorithm"
39 + select CRYPTO_ALGAPI
40 + help
41 + RIPEMD-160 (ISO/IEC 10118-3:2004).
42 +
43 + RIPEMD-160 is a 160-bit cryptographic hash function. It is intended
44 + to be used as a secure replacement for the 128-bit hash functions
45 + MD4, MD5 and it's predecessor RIPEMD (not to be confused with RIPEMD-128).
46 +
47 + It's speed is comparable to SHA1 and there are no known attacks against
48 + RIPEMD-160.
49 +
50 + Developed by Hans Dobbertin, Antoon Bosselaers and Bart Preneel.
51 + See <http://home.esat.kuleuven.be/~bosselae/ripemd160.html>
52 +
53 +config CRYPTO_RMD256
54 + tristate "RIPEMD-256 digest algorithm"
55 + select CRYPTO_ALGAPI
56 + help
57 + RIPEMD-256 is an optional extension of RIPEMD-128 with a 256 bit hash.
58 + It is intended for applications that require longer hash-results, without
59 + needing a larger security level (than RIPEMD-128).
60 +
61 + Developed by Hans Dobbertin, Antoon Bosselaers and Bart Preneel.
62 + See <http://home.esat.kuleuven.be/~bosselae/ripemd160.html>
63 +
64 +config CRYPTO_RMD320
65 + tristate "RIPEMD-320 digest algorithm"
66 + select CRYPTO_ALGAPI
67 + help
68 + RIPEMD-320 is an optional extension of RIPEMD-160 with a 320 bit hash.
69 + It is intended for applications that require longer hash-results, without
70 + needing a larger security level (than RIPEMD-160).
71 +
72 + Developed by Hans Dobbertin, Antoon Bosselaers and Bart Preneel.
73 + See <http://home.esat.kuleuven.be/~bosselae/ripemd160.html>
74 +
75 config CRYPTO_SHA1
76 tristate "SHA1 digest algorithm"
77 select CRYPTO_ALGAPI
78 @@ -614,6 +666,15 @@
79 help
80 This is the LZO algorithm.
81
82 +comment "Random Number Generation"
83 +
84 +config CRYPTO_PRNG
85 + tristate "Pseudo Random Number Generation for Cryptographic modules"
86 + help
87 + This option enables the generic pseudo random number generator
88 + for cryptographic modules. Uses the Algorithm specified in
89 + ANSI X9.31 A.2.4
90 +
91 source "drivers/crypto/Kconfig"
92
93 endif # if CRYPTO
94 --- a/crypto/Makefile
95 +++ b/crypto/Makefile
96 @@ -19,6 +19,7 @@
97 obj-$(CONFIG_CRYPTO_SEQIV) += seqiv.o
98
99 crypto_hash-objs := hash.o
100 +crypto_hash-objs += ahash.o
101 obj-$(CONFIG_CRYPTO_HASH) += crypto_hash.o
102
103 obj-$(CONFIG_CRYPTO_MANAGER) += cryptomgr.o
104 @@ -27,6 +28,10 @@
105 obj-$(CONFIG_CRYPTO_NULL) += crypto_null.o
106 obj-$(CONFIG_CRYPTO_MD4) += md4.o
107 obj-$(CONFIG_CRYPTO_MD5) += md5.o
108 +obj-$(CONFIG_CRYPTO_RMD128) += rmd128.o
109 +obj-$(CONFIG_CRYPTO_RMD160) += rmd160.o
110 +obj-$(CONFIG_CRYPTO_RMD256) += rmd256.o
111 +obj-$(CONFIG_CRYPTO_RMD320) += rmd320.o
112 obj-$(CONFIG_CRYPTO_SHA1) += sha1_generic.o
113 obj-$(CONFIG_CRYPTO_SHA256) += sha256_generic.o
114 obj-$(CONFIG_CRYPTO_SHA512) += sha512_generic.o
115 @@ -64,7 +69,7 @@
116 obj-$(CONFIG_CRYPTO_CRC32C) += crc32c.o
117 obj-$(CONFIG_CRYPTO_AUTHENC) += authenc.o
118 obj-$(CONFIG_CRYPTO_LZO) += lzo.o
119 -
120 +obj-$(CONFIG_CRYPTO_PRNG) += prng.o
121 obj-$(CONFIG_CRYPTO_TEST) += tcrypt.o
122
123 #
124 --- /dev/null
125 +++ b/crypto/ahash.c
126 @@ -0,0 +1,194 @@
127 +/*
128 + * Asynchronous Cryptographic Hash operations.
129 + *
130 + * This is the asynchronous version of hash.c with notification of
131 + * completion via a callback.
132 + *
133 + * Copyright (c) 2008 Loc Ho <lho@amcc.com>
134 + *
135 + * This program is free software; you can redistribute it and/or modify it
136 + * under the terms of the GNU General Public License as published by the Free
137 + * Software Foundation; either version 2 of the License, or (at your option)
138 + * any later version.
139 + *
140 + */
141 +
142 +#include <crypto/internal/hash.h>
143 +#include <crypto/scatterwalk.h>
144 +#include <linux/err.h>
145 +#include <linux/kernel.h>
146 +#include <linux/module.h>
147 +#include <linux/sched.h>
148 +#include <linux/slab.h>
149 +#include <linux/seq_file.h>
150 +
151 +#include "internal.h"
152 +
153 +static int hash_walk_next(struct crypto_hash_walk *walk)
154 +{
155 + unsigned int alignmask = walk->alignmask;
156 + unsigned int offset = walk->offset;
157 + unsigned int nbytes = min(walk->entrylen,
158 + ((unsigned int)(PAGE_SIZE)) - offset);
159 +
160 + walk->data = crypto_kmap(walk->pg, 0);
161 + walk->data += offset;
162 +
163 + if (offset & alignmask)
164 + nbytes = alignmask + 1 - (offset & alignmask);
165 +
166 + walk->entrylen -= nbytes;
167 + return nbytes;
168 +}
169 +
170 +static int hash_walk_new_entry(struct crypto_hash_walk *walk)
171 +{
172 + struct scatterlist *sg;
173 +
174 + sg = walk->sg;
175 + walk->pg = sg_page(sg);
176 + walk->offset = sg->offset;
177 + walk->entrylen = sg->length;
178 +
179 + if (walk->entrylen > walk->total)
180 + walk->entrylen = walk->total;
181 + walk->total -= walk->entrylen;
182 +
183 + return hash_walk_next(walk);
184 +}
185 +
186 +int crypto_hash_walk_done(struct crypto_hash_walk *walk, int err)
187 +{
188 + unsigned int alignmask = walk->alignmask;
189 + unsigned int nbytes = walk->entrylen;
190 +
191 + walk->data -= walk->offset;
192 +
193 + if (nbytes && walk->offset & alignmask && !err) {
194 + walk->offset += alignmask - 1;
195 + walk->offset = ALIGN(walk->offset, alignmask + 1);
196 + walk->data += walk->offset;
197 +
198 + nbytes = min(nbytes,
199 + ((unsigned int)(PAGE_SIZE)) - walk->offset);
200 + walk->entrylen -= nbytes;
201 +
202 + return nbytes;
203 + }
204 +
205 + crypto_kunmap(walk->data, 0);
206 + crypto_yield(walk->flags);
207 +
208 + if (err)
209 + return err;
210 +
211 + walk->offset = 0;
212 +
213 + if (nbytes)
214 + return hash_walk_next(walk);
215 +
216 + if (!walk->total)
217 + return 0;
218 +
219 + walk->sg = scatterwalk_sg_next(walk->sg);
220 +
221 + return hash_walk_new_entry(walk);
222 +}
223 +EXPORT_SYMBOL_GPL(crypto_hash_walk_done);
224 +
225 +int crypto_hash_walk_first(struct ahash_request *req,
226 + struct crypto_hash_walk *walk)
227 +{
228 + walk->total = req->nbytes;
229 +
230 + if (!walk->total)
231 + return 0;
232 +
233 + walk->alignmask = crypto_ahash_alignmask(crypto_ahash_reqtfm(req));
234 + walk->sg = req->src;
235 + walk->flags = req->base.flags;
236 +
237 + return hash_walk_new_entry(walk);
238 +}
239 +EXPORT_SYMBOL_GPL(crypto_hash_walk_first);
240 +
241 +static int ahash_setkey_unaligned(struct crypto_ahash *tfm, const u8 *key,
242 + unsigned int keylen)
243 +{
244 + struct ahash_alg *ahash = crypto_ahash_alg(tfm);
245 + unsigned long alignmask = crypto_ahash_alignmask(tfm);
246 + int ret;
247 + u8 *buffer, *alignbuffer;
248 + unsigned long absize;
249 +
250 + absize = keylen + alignmask;
251 + buffer = kmalloc(absize, GFP_ATOMIC);
252 + if (!buffer)
253 + return -ENOMEM;
254 +
255 + alignbuffer = (u8 *)ALIGN((unsigned long)buffer, alignmask + 1);
256 + memcpy(alignbuffer, key, keylen);
257 + ret = ahash->setkey(tfm, alignbuffer, keylen);
258 + memset(alignbuffer, 0, keylen);
259 + kfree(buffer);
260 + return ret;
261 +}
262 +
263 +static int ahash_setkey(struct crypto_ahash *tfm, const u8 *key,
264 + unsigned int keylen)
265 +{
266 + struct ahash_alg *ahash = crypto_ahash_alg(tfm);
267 + unsigned long alignmask = crypto_ahash_alignmask(tfm);
268 +
269 + if ((unsigned long)key & alignmask)
270 + return ahash_setkey_unaligned(tfm, key, keylen);
271 +
272 + return ahash->setkey(tfm, key, keylen);
273 +}
274 +
275 +static unsigned int crypto_ahash_ctxsize(struct crypto_alg *alg, u32 type,
276 + u32 mask)
277 +{
278 + return alg->cra_ctxsize;
279 +}
280 +
281 +static int crypto_init_ahash_ops(struct crypto_tfm *tfm, u32 type, u32 mask)
282 +{
283 + struct ahash_alg *alg = &tfm->__crt_alg->cra_ahash;
284 + struct ahash_tfm *crt = &tfm->crt_ahash;
285 +
286 + if (alg->digestsize > PAGE_SIZE / 8)
287 + return -EINVAL;
288 +
289 + crt->init = alg->init;
290 + crt->update = alg->update;
291 + crt->final = alg->final;
292 + crt->digest = alg->digest;
293 + crt->setkey = ahash_setkey;
294 + crt->digestsize = alg->digestsize;
295 +
296 + return 0;
297 +}
298 +
299 +static void crypto_ahash_show(struct seq_file *m, struct crypto_alg *alg)
300 + __attribute__ ((unused));
301 +static void crypto_ahash_show(struct seq_file *m, struct crypto_alg *alg)
302 +{
303 + seq_printf(m, "type : ahash\n");
304 + seq_printf(m, "async : %s\n", alg->cra_flags & CRYPTO_ALG_ASYNC ?
305 + "yes" : "no");
306 + seq_printf(m, "blocksize : %u\n", alg->cra_blocksize);
307 + seq_printf(m, "digestsize : %u\n", alg->cra_hash.digestsize);
308 +}
309 +
310 +const struct crypto_type crypto_ahash_type = {
311 + .ctxsize = crypto_ahash_ctxsize,
312 + .init = crypto_init_ahash_ops,
313 +#ifdef CONFIG_PROC_FS
314 + .show = crypto_ahash_show,
315 +#endif
316 +};
317 +EXPORT_SYMBOL_GPL(crypto_ahash_type);
318 +
319 +MODULE_LICENSE("GPL");
320 +MODULE_DESCRIPTION("Asynchronous cryptographic hash type");
321 --- a/crypto/api.c
322 +++ b/crypto/api.c
323 @@ -235,8 +235,12 @@
324 return crypto_init_cipher_ops(tfm);
325
326 case CRYPTO_ALG_TYPE_DIGEST:
327 - return crypto_init_digest_ops(tfm);
328 -
329 + if ((mask & CRYPTO_ALG_TYPE_HASH_MASK) !=
330 + CRYPTO_ALG_TYPE_HASH_MASK)
331 + return crypto_init_digest_ops_async(tfm);
332 + else
333 + return crypto_init_digest_ops(tfm);
334 +
335 case CRYPTO_ALG_TYPE_COMPRESS:
336 return crypto_init_compress_ops(tfm);
337
338 --- a/crypto/camellia.c
339 +++ b/crypto/camellia.c
340 @@ -35,6 +35,8 @@
341 #include <linux/init.h>
342 #include <linux/kernel.h>
343 #include <linux/module.h>
344 +#include <linux/bitops.h>
345 +#include <asm/unaligned.h>
346
347 static const u32 camellia_sp1110[256] = {
348 0x70707000,0x82828200,0x2c2c2c00,0xececec00,
349 @@ -335,20 +337,6 @@
350 /*
351 * macros
352 */
353 -#define GETU32(v, pt) \
354 - do { \
355 - /* latest breed of gcc is clever enough to use move */ \
356 - memcpy(&(v), (pt), 4); \
357 - (v) = be32_to_cpu(v); \
358 - } while(0)
359 -
360 -/* rotation right shift 1byte */
361 -#define ROR8(x) (((x) >> 8) + ((x) << 24))
362 -/* rotation left shift 1bit */
363 -#define ROL1(x) (((x) << 1) + ((x) >> 31))
364 -/* rotation left shift 1byte */
365 -#define ROL8(x) (((x) << 8) + ((x) >> 24))
366 -
367 #define ROLDQ(ll, lr, rl, rr, w0, w1, bits) \
368 do { \
369 w0 = ll; \
370 @@ -383,7 +371,7 @@
371 ^ camellia_sp3033[(u8)(il >> 8)] \
372 ^ camellia_sp4404[(u8)(il )]; \
373 yl ^= yr; \
374 - yr = ROR8(yr); \
375 + yr = ror32(yr, 8); \
376 yr ^= yl; \
377 } while(0)
378
379 @@ -405,7 +393,7 @@
380 subL[7] ^= subL[1]; subR[7] ^= subR[1];
381 subL[1] ^= subR[1] & ~subR[9];
382 dw = subL[1] & subL[9],
383 - subR[1] ^= ROL1(dw); /* modified for FLinv(kl2) */
384 + subR[1] ^= rol32(dw, 1); /* modified for FLinv(kl2) */
385 /* round 8 */
386 subL[11] ^= subL[1]; subR[11] ^= subR[1];
387 /* round 10 */
388 @@ -414,7 +402,7 @@
389 subL[15] ^= subL[1]; subR[15] ^= subR[1];
390 subL[1] ^= subR[1] & ~subR[17];
391 dw = subL[1] & subL[17],
392 - subR[1] ^= ROL1(dw); /* modified for FLinv(kl4) */
393 + subR[1] ^= rol32(dw, 1); /* modified for FLinv(kl4) */
394 /* round 14 */
395 subL[19] ^= subL[1]; subR[19] ^= subR[1];
396 /* round 16 */
397 @@ -430,7 +418,7 @@
398 } else {
399 subL[1] ^= subR[1] & ~subR[25];
400 dw = subL[1] & subL[25],
401 - subR[1] ^= ROL1(dw); /* modified for FLinv(kl6) */
402 + subR[1] ^= rol32(dw, 1); /* modified for FLinv(kl6) */
403 /* round 20 */
404 subL[27] ^= subL[1]; subR[27] ^= subR[1];
405 /* round 22 */
406 @@ -450,7 +438,7 @@
407 subL[26] ^= kw4l; subR[26] ^= kw4r;
408 kw4l ^= kw4r & ~subR[24];
409 dw = kw4l & subL[24],
410 - kw4r ^= ROL1(dw); /* modified for FL(kl5) */
411 + kw4r ^= rol32(dw, 1); /* modified for FL(kl5) */
412 }
413 /* round 17 */
414 subL[22] ^= kw4l; subR[22] ^= kw4r;
415 @@ -460,7 +448,7 @@
416 subL[18] ^= kw4l; subR[18] ^= kw4r;
417 kw4l ^= kw4r & ~subR[16];
418 dw = kw4l & subL[16],
419 - kw4r ^= ROL1(dw); /* modified for FL(kl3) */
420 + kw4r ^= rol32(dw, 1); /* modified for FL(kl3) */
421 /* round 11 */
422 subL[14] ^= kw4l; subR[14] ^= kw4r;
423 /* round 9 */
424 @@ -469,7 +457,7 @@
425 subL[10] ^= kw4l; subR[10] ^= kw4r;
426 kw4l ^= kw4r & ~subR[8];
427 dw = kw4l & subL[8],
428 - kw4r ^= ROL1(dw); /* modified for FL(kl1) */
429 + kw4r ^= rol32(dw, 1); /* modified for FL(kl1) */
430 /* round 5 */
431 subL[6] ^= kw4l; subR[6] ^= kw4r;
432 /* round 3 */
433 @@ -494,7 +482,7 @@
434 SUBKEY_R(6) = subR[5] ^ subR[7];
435 tl = subL[10] ^ (subR[10] & ~subR[8]);
436 dw = tl & subL[8], /* FL(kl1) */
437 - tr = subR[10] ^ ROL1(dw);
438 + tr = subR[10] ^ rol32(dw, 1);
439 SUBKEY_L(7) = subL[6] ^ tl; /* round 6 */
440 SUBKEY_R(7) = subR[6] ^ tr;
441 SUBKEY_L(8) = subL[8]; /* FL(kl1) */
442 @@ -503,7 +491,7 @@
443 SUBKEY_R(9) = subR[9];
444 tl = subL[7] ^ (subR[7] & ~subR[9]);
445 dw = tl & subL[9], /* FLinv(kl2) */
446 - tr = subR[7] ^ ROL1(dw);
447 + tr = subR[7] ^ rol32(dw, 1);
448 SUBKEY_L(10) = tl ^ subL[11]; /* round 7 */
449 SUBKEY_R(10) = tr ^ subR[11];
450 SUBKEY_L(11) = subL[10] ^ subL[12]; /* round 8 */
451 @@ -516,7 +504,7 @@
452 SUBKEY_R(14) = subR[13] ^ subR[15];
453 tl = subL[18] ^ (subR[18] & ~subR[16]);
454 dw = tl & subL[16], /* FL(kl3) */
455 - tr = subR[18] ^ ROL1(dw);
456 + tr = subR[18] ^ rol32(dw, 1);
457 SUBKEY_L(15) = subL[14] ^ tl; /* round 12 */
458 SUBKEY_R(15) = subR[14] ^ tr;
459 SUBKEY_L(16) = subL[16]; /* FL(kl3) */
460 @@ -525,7 +513,7 @@
461 SUBKEY_R(17) = subR[17];
462 tl = subL[15] ^ (subR[15] & ~subR[17]);
463 dw = tl & subL[17], /* FLinv(kl4) */
464 - tr = subR[15] ^ ROL1(dw);
465 + tr = subR[15] ^ rol32(dw, 1);
466 SUBKEY_L(18) = tl ^ subL[19]; /* round 13 */
467 SUBKEY_R(18) = tr ^ subR[19];
468 SUBKEY_L(19) = subL[18] ^ subL[20]; /* round 14 */
469 @@ -544,7 +532,7 @@
470 } else {
471 tl = subL[26] ^ (subR[26] & ~subR[24]);
472 dw = tl & subL[24], /* FL(kl5) */
473 - tr = subR[26] ^ ROL1(dw);
474 + tr = subR[26] ^ rol32(dw, 1);
475 SUBKEY_L(23) = subL[22] ^ tl; /* round 18 */
476 SUBKEY_R(23) = subR[22] ^ tr;
477 SUBKEY_L(24) = subL[24]; /* FL(kl5) */
478 @@ -553,7 +541,7 @@
479 SUBKEY_R(25) = subR[25];
480 tl = subL[23] ^ (subR[23] & ~subR[25]);
481 dw = tl & subL[25], /* FLinv(kl6) */
482 - tr = subR[23] ^ ROL1(dw);
483 + tr = subR[23] ^ rol32(dw, 1);
484 SUBKEY_L(26) = tl ^ subL[27]; /* round 19 */
485 SUBKEY_R(26) = tr ^ subR[27];
486 SUBKEY_L(27) = subL[26] ^ subL[28]; /* round 20 */
487 @@ -573,17 +561,17 @@
488 /* apply the inverse of the last half of P-function */
489 i = 2;
490 do {
491 - dw = SUBKEY_L(i + 0) ^ SUBKEY_R(i + 0); dw = ROL8(dw);/* round 1 */
492 + dw = SUBKEY_L(i + 0) ^ SUBKEY_R(i + 0); dw = rol32(dw, 8);/* round 1 */
493 SUBKEY_R(i + 0) = SUBKEY_L(i + 0) ^ dw; SUBKEY_L(i + 0) = dw;
494 - dw = SUBKEY_L(i + 1) ^ SUBKEY_R(i + 1); dw = ROL8(dw);/* round 2 */
495 + dw = SUBKEY_L(i + 1) ^ SUBKEY_R(i + 1); dw = rol32(dw, 8);/* round 2 */
496 SUBKEY_R(i + 1) = SUBKEY_L(i + 1) ^ dw; SUBKEY_L(i + 1) = dw;
497 - dw = SUBKEY_L(i + 2) ^ SUBKEY_R(i + 2); dw = ROL8(dw);/* round 3 */
498 + dw = SUBKEY_L(i + 2) ^ SUBKEY_R(i + 2); dw = rol32(dw, 8);/* round 3 */
499 SUBKEY_R(i + 2) = SUBKEY_L(i + 2) ^ dw; SUBKEY_L(i + 2) = dw;
500 - dw = SUBKEY_L(i + 3) ^ SUBKEY_R(i + 3); dw = ROL8(dw);/* round 4 */
501 + dw = SUBKEY_L(i + 3) ^ SUBKEY_R(i + 3); dw = rol32(dw, 8);/* round 4 */
502 SUBKEY_R(i + 3) = SUBKEY_L(i + 3) ^ dw; SUBKEY_L(i + 3) = dw;
503 - dw = SUBKEY_L(i + 4) ^ SUBKEY_R(i + 4); dw = ROL8(dw);/* round 5 */
504 + dw = SUBKEY_L(i + 4) ^ SUBKEY_R(i + 4); dw = rol32(dw, 9);/* round 5 */
505 SUBKEY_R(i + 4) = SUBKEY_L(i + 4) ^ dw; SUBKEY_L(i + 4) = dw;
506 - dw = SUBKEY_L(i + 5) ^ SUBKEY_R(i + 5); dw = ROL8(dw);/* round 6 */
507 + dw = SUBKEY_L(i + 5) ^ SUBKEY_R(i + 5); dw = rol32(dw, 8);/* round 6 */
508 SUBKEY_R(i + 5) = SUBKEY_L(i + 5) ^ dw; SUBKEY_L(i + 5) = dw;
509 i += 8;
510 } while (i < max);
511 @@ -599,10 +587,10 @@
512 /**
513 * k == kll || klr || krl || krr (|| is concatenation)
514 */
515 - GETU32(kll, key );
516 - GETU32(klr, key + 4);
517 - GETU32(krl, key + 8);
518 - GETU32(krr, key + 12);
519 + kll = get_unaligned_be32(key);
520 + klr = get_unaligned_be32(key + 4);
521 + krl = get_unaligned_be32(key + 8);
522 + krr = get_unaligned_be32(key + 12);
523
524 /* generate KL dependent subkeys */
525 /* kw1 */
526 @@ -707,14 +695,14 @@
527 * key = (kll || klr || krl || krr || krll || krlr || krrl || krrr)
528 * (|| is concatenation)
529 */
530 - GETU32(kll, key );
531 - GETU32(klr, key + 4);
532 - GETU32(krl, key + 8);
533 - GETU32(krr, key + 12);
534 - GETU32(krll, key + 16);
535 - GETU32(krlr, key + 20);
536 - GETU32(krrl, key + 24);
537 - GETU32(krrr, key + 28);
538 + kll = get_unaligned_be32(key);
539 + klr = get_unaligned_be32(key + 4);
540 + krl = get_unaligned_be32(key + 8);
541 + krr = get_unaligned_be32(key + 12);
542 + krll = get_unaligned_be32(key + 16);
543 + krlr = get_unaligned_be32(key + 20);
544 + krrl = get_unaligned_be32(key + 24);
545 + krrr = get_unaligned_be32(key + 28);
546
547 /* generate KL dependent subkeys */
548 /* kw1 */
549 @@ -870,13 +858,13 @@
550 t0 &= ll; \
551 t2 |= rr; \
552 rl ^= t2; \
553 - lr ^= ROL1(t0); \
554 + lr ^= rol32(t0, 1); \
555 t3 = krl; \
556 t1 = klr; \
557 t3 &= rl; \
558 t1 |= lr; \
559 ll ^= t1; \
560 - rr ^= ROL1(t3); \
561 + rr ^= rol32(t3, 1); \
562 } while(0)
563
564 #define CAMELLIA_ROUNDSM(xl, xr, kl, kr, yl, yr, il, ir) \
565 @@ -892,7 +880,7 @@
566 il ^= kl; \
567 ir ^= il ^ kr; \
568 yl ^= ir; \
569 - yr ^= ROR8(il) ^ ir; \
570 + yr ^= ror32(il, 8) ^ ir; \
571 } while(0)
572
573 /* max = 24: 128bit encrypt, max = 32: 256bit encrypt */
574 --- a/crypto/chainiv.c
575 +++ b/crypto/chainiv.c
576 @@ -117,6 +117,7 @@
577 static int async_chainiv_schedule_work(struct async_chainiv_ctx *ctx)
578 {
579 int queued;
580 + int err = ctx->err;
581
582 if (!ctx->queue.qlen) {
583 smp_mb__before_clear_bit();
584 @@ -131,7 +132,7 @@
585 BUG_ON(!queued);
586
587 out:
588 - return ctx->err;
589 + return err;
590 }
591
592 static int async_chainiv_postpone_request(struct skcipher_givcrypt_request *req)
593 @@ -227,6 +228,7 @@
594 postponed);
595 struct skcipher_givcrypt_request *req;
596 struct ablkcipher_request *subreq;
597 + int err;
598
599 /* Only handle one request at a time to avoid hogging keventd. */
600 spin_lock_bh(&ctx->lock);
601 @@ -241,7 +243,11 @@
602 subreq = skcipher_givcrypt_reqctx(req);
603 subreq->base.flags |= CRYPTO_TFM_REQ_MAY_SLEEP;
604
605 - async_chainiv_givencrypt_tail(req);
606 + err = async_chainiv_givencrypt_tail(req);
607 +
608 + local_bh_disable();
609 + skcipher_givcrypt_complete(req, err);
610 + local_bh_enable();
611 }
612
613 static int async_chainiv_init(struct crypto_tfm *tfm)
614 --- a/crypto/crc32c.c
615 +++ b/crypto/crc32c.c
616 @@ -5,20 +5,23 @@
617 *
618 * This module file is a wrapper to invoke the lib/crc32c routines.
619 *
620 + * Copyright (c) 2008 Herbert Xu <herbert@gondor.apana.org.au>
621 + *
622 * This program is free software; you can redistribute it and/or modify it
623 * under the terms of the GNU General Public License as published by the Free
624 * Software Foundation; either version 2 of the License, or (at your option)
625 * any later version.
626 *
627 */
628 +
629 +#include <crypto/internal/hash.h>
630 #include <linux/init.h>
631 #include <linux/module.h>
632 #include <linux/string.h>
633 -#include <linux/crypto.h>
634 #include <linux/crc32c.h>
635 #include <linux/kernel.h>
636
637 -#define CHKSUM_BLOCK_SIZE 32
638 +#define CHKSUM_BLOCK_SIZE 1
639 #define CHKSUM_DIGEST_SIZE 4
640
641 struct chksum_ctx {
642 @@ -71,7 +74,7 @@
643 *(__le32 *)out = ~cpu_to_le32(mctx->crc);
644 }
645
646 -static int crc32c_cra_init(struct crypto_tfm *tfm)
647 +static int crc32c_cra_init_old(struct crypto_tfm *tfm)
648 {
649 struct chksum_ctx *mctx = crypto_tfm_ctx(tfm);
650
651 @@ -79,14 +82,14 @@
652 return 0;
653 }
654
655 -static struct crypto_alg alg = {
656 +static struct crypto_alg old_alg = {
657 .cra_name = "crc32c",
658 .cra_flags = CRYPTO_ALG_TYPE_DIGEST,
659 .cra_blocksize = CHKSUM_BLOCK_SIZE,
660 .cra_ctxsize = sizeof(struct chksum_ctx),
661 .cra_module = THIS_MODULE,
662 - .cra_list = LIST_HEAD_INIT(alg.cra_list),
663 - .cra_init = crc32c_cra_init,
664 + .cra_list = LIST_HEAD_INIT(old_alg.cra_list),
665 + .cra_init = crc32c_cra_init_old,
666 .cra_u = {
667 .digest = {
668 .dia_digestsize= CHKSUM_DIGEST_SIZE,
669 @@ -98,14 +101,125 @@
670 }
671 };
672
673 +/*
674 + * Setting the seed allows arbitrary accumulators and flexible XOR policy
675 + * If your algorithm starts with ~0, then XOR with ~0 before you set
676 + * the seed.
677 + */
678 +static int crc32c_setkey(struct crypto_ahash *hash, const u8 *key,
679 + unsigned int keylen)
680 +{
681 + u32 *mctx = crypto_ahash_ctx(hash);
682 +
683 + if (keylen != sizeof(u32)) {
684 + crypto_ahash_set_flags(hash, CRYPTO_TFM_RES_BAD_KEY_LEN);
685 + return -EINVAL;
686 + }
687 + *mctx = le32_to_cpup((__le32 *)key);
688 + return 0;
689 +}
690 +
691 +static int crc32c_init(struct ahash_request *req)
692 +{
693 + u32 *mctx = crypto_ahash_ctx(crypto_ahash_reqtfm(req));
694 + u32 *crcp = ahash_request_ctx(req);
695 +
696 + *crcp = *mctx;
697 + return 0;
698 +}
699 +
700 +static int crc32c_update(struct ahash_request *req)
701 +{
702 + struct crypto_hash_walk walk;
703 + u32 *crcp = ahash_request_ctx(req);
704 + u32 crc = *crcp;
705 + int nbytes;
706 +
707 + for (nbytes = crypto_hash_walk_first(req, &walk); nbytes;
708 + nbytes = crypto_hash_walk_done(&walk, 0))
709 + crc = crc32c(crc, walk.data, nbytes);
710 +
711 + *crcp = crc;
712 + return 0;
713 +}
714 +
715 +static int crc32c_final(struct ahash_request *req)
716 +{
717 + u32 *crcp = ahash_request_ctx(req);
718 +
719 + *(__le32 *)req->result = ~cpu_to_le32p(crcp);
720 + return 0;
721 +}
722 +
723 +static int crc32c_digest(struct ahash_request *req)
724 +{
725 + struct crypto_hash_walk walk;
726 + u32 *mctx = crypto_ahash_ctx(crypto_ahash_reqtfm(req));
727 + u32 crc = *mctx;
728 + int nbytes;
729 +
730 + for (nbytes = crypto_hash_walk_first(req, &walk); nbytes;
731 + nbytes = crypto_hash_walk_done(&walk, 0))
732 + crc = crc32c(crc, walk.data, nbytes);
733 +
734 + *(__le32 *)req->result = ~cpu_to_le32(crc);
735 + return 0;
736 +}
737 +
738 +static int crc32c_cra_init(struct crypto_tfm *tfm)
739 +{
740 + u32 *key = crypto_tfm_ctx(tfm);
741 +
742 + *key = ~0;
743 +
744 + tfm->crt_ahash.reqsize = sizeof(u32);
745 +
746 + return 0;
747 +}
748 +
749 +static struct crypto_alg alg = {
750 + .cra_name = "crc32c",
751 + .cra_driver_name = "crc32c-generic",
752 + .cra_priority = 100,
753 + .cra_flags = CRYPTO_ALG_TYPE_AHASH,
754 + .cra_blocksize = CHKSUM_BLOCK_SIZE,
755 + .cra_alignmask = 3,
756 + .cra_ctxsize = sizeof(u32),
757 + .cra_module = THIS_MODULE,
758 + .cra_list = LIST_HEAD_INIT(alg.cra_list),
759 + .cra_init = crc32c_cra_init,
760 + .cra_type = &crypto_ahash_type,
761 + .cra_u = {
762 + .ahash = {
763 + .digestsize = CHKSUM_DIGEST_SIZE,
764 + .setkey = crc32c_setkey,
765 + .init = crc32c_init,
766 + .update = crc32c_update,
767 + .final = crc32c_final,
768 + .digest = crc32c_digest,
769 + }
770 + }
771 +};
772 +
773 static int __init crc32c_mod_init(void)
774 {
775 - return crypto_register_alg(&alg);
776 + int err;
777 +
778 + err = crypto_register_alg(&old_alg);
779 + if (err)
780 + return err;
781 +
782 + err = crypto_register_alg(&alg);
783 + if (err)
784 + crypto_unregister_alg(&old_alg);
785 +
786 + return err;
787 }
788
789 static void __exit crc32c_mod_fini(void)
790 {
791 crypto_unregister_alg(&alg);
792 + crypto_unregister_alg(&old_alg);
793 }
794
795 module_init(crc32c_mod_init);
796 --- a/crypto/cryptd.c
797 +++ b/crypto/cryptd.c
798 @@ -11,6 +11,7 @@
799 */
800
801 #include <crypto/algapi.h>
802 +#include <crypto/internal/hash.h>
803 #include <linux/err.h>
804 #include <linux/init.h>
805 #include <linux/kernel.h>
806 @@ -45,6 +46,13 @@
807 crypto_completion_t complete;
808 };
809
810 +struct cryptd_hash_ctx {
811 + struct crypto_hash *child;
812 +};
813 +
814 +struct cryptd_hash_request_ctx {
815 + crypto_completion_t complete;
816 +};
817
818 static inline struct cryptd_state *cryptd_get_state(struct crypto_tfm *tfm)
819 {
820 @@ -82,10 +90,8 @@
821
822 rctx = ablkcipher_request_ctx(req);
823
824 - if (unlikely(err == -EINPROGRESS)) {
825 - rctx->complete(&req->base, err);
826 - return;
827 - }
828 + if (unlikely(err == -EINPROGRESS))
829 + goto out;
830
831 desc.tfm = child;
832 desc.info = req->info;
833 @@ -95,8 +101,9 @@
834
835 req->base.complete = rctx->complete;
836
837 +out:
838 local_bh_disable();
839 - req->base.complete(&req->base, err);
840 + rctx->complete(&req->base, err);
841 local_bh_enable();
842 }
843
844 @@ -261,6 +268,240 @@
845 return inst;
846 }
847
848 +static int cryptd_hash_init_tfm(struct crypto_tfm *tfm)
849 +{
850 + struct crypto_instance *inst = crypto_tfm_alg_instance(tfm);
851 + struct cryptd_instance_ctx *ictx = crypto_instance_ctx(inst);
852 + struct crypto_spawn *spawn = &ictx->spawn;
853 + struct cryptd_hash_ctx *ctx = crypto_tfm_ctx(tfm);
854 + struct crypto_hash *cipher;
855 +
856 + cipher = crypto_spawn_hash(spawn);
857 + if (IS_ERR(cipher))
858 + return PTR_ERR(cipher);
859 +
860 + ctx->child = cipher;
861 + tfm->crt_ahash.reqsize =
862 + sizeof(struct cryptd_hash_request_ctx);
863 + return 0;
864 +}
865 +
866 +static void cryptd_hash_exit_tfm(struct crypto_tfm *tfm)
867 +{
868 + struct cryptd_hash_ctx *ctx = crypto_tfm_ctx(tfm);
869 + struct cryptd_state *state = cryptd_get_state(tfm);
870 + int active;
871 +
872 + mutex_lock(&state->mutex);
873 + active = ahash_tfm_in_queue(&state->queue,
874 + __crypto_ahash_cast(tfm));
875 + mutex_unlock(&state->mutex);
876 +
877 + BUG_ON(active);
878 +
879 + crypto_free_hash(ctx->child);
880 +}
881 +
882 +static int cryptd_hash_setkey(struct crypto_ahash *parent,
883 + const u8 *key, unsigned int keylen)
884 +{
885 + struct cryptd_hash_ctx *ctx = crypto_ahash_ctx(parent);
886 + struct crypto_hash *child = ctx->child;
887 + int err;
888 +
889 + crypto_hash_clear_flags(child, CRYPTO_TFM_REQ_MASK);
890 + crypto_hash_set_flags(child, crypto_ahash_get_flags(parent) &
891 + CRYPTO_TFM_REQ_MASK);
892 + err = crypto_hash_setkey(child, key, keylen);
893 + crypto_ahash_set_flags(parent, crypto_hash_get_flags(child) &
894 + CRYPTO_TFM_RES_MASK);
895 + return err;
896 +}
897 +
898 +static int cryptd_hash_enqueue(struct ahash_request *req,
899 + crypto_completion_t complete)
900 +{
901 + struct cryptd_hash_request_ctx *rctx = ahash_request_ctx(req);
902 + struct crypto_ahash *tfm = crypto_ahash_reqtfm(req);
903 + struct cryptd_state *state =
904 + cryptd_get_state(crypto_ahash_tfm(tfm));
905 + int err;
906 +
907 + rctx->complete = req->base.complete;
908 + req->base.complete = complete;
909 +
910 + spin_lock_bh(&state->lock);
911 + err = ahash_enqueue_request(&state->queue, req);
912 + spin_unlock_bh(&state->lock);
913 +
914 + wake_up_process(state->task);
915 + return err;
916 +}
917 +
918 +static void cryptd_hash_init(struct crypto_async_request *req_async, int err)
919 +{
920 + struct cryptd_hash_ctx *ctx = crypto_tfm_ctx(req_async->tfm);
921 + struct crypto_hash *child = ctx->child;
922 + struct ahash_request *req = ahash_request_cast(req_async);
923 + struct cryptd_hash_request_ctx *rctx;
924 + struct hash_desc desc;
925 +
926 + rctx = ahash_request_ctx(req);
927 +
928 + if (unlikely(err == -EINPROGRESS))
929 + goto out;
930 +
931 + desc.tfm = child;
932 + desc.flags = CRYPTO_TFM_REQ_MAY_SLEEP;
933 +
934 + err = crypto_hash_crt(child)->init(&desc);
935 +
936 + req->base.complete = rctx->complete;
937 +
938 +out:
939 + local_bh_disable();
940 + rctx->complete(&req->base, err);
941 + local_bh_enable();
942 +}
943 +
944 +static int cryptd_hash_init_enqueue(struct ahash_request *req)
945 +{
946 + return cryptd_hash_enqueue(req, cryptd_hash_init);
947 +}
948 +
949 +static void cryptd_hash_update(struct crypto_async_request *req_async, int err)
950 +{
951 + struct cryptd_hash_ctx *ctx = crypto_tfm_ctx(req_async->tfm);
952 + struct crypto_hash *child = ctx->child;
953 + struct ahash_request *req = ahash_request_cast(req_async);
954 + struct cryptd_hash_request_ctx *rctx;
955 + struct hash_desc desc;
956 +
957 + rctx = ahash_request_ctx(req);
958 +
959 + if (unlikely(err == -EINPROGRESS))
960 + goto out;
961 +
962 + desc.tfm = child;
963 + desc.flags = CRYPTO_TFM_REQ_MAY_SLEEP;
964 +
965 + err = crypto_hash_crt(child)->update(&desc,
966 + req->src,
967 + req->nbytes);
968 +
969 + req->base.complete = rctx->complete;
970 +
971 +out:
972 + local_bh_disable();
973 + rctx->complete(&req->base, err);
974 + local_bh_enable();
975 +}
976 +
977 +static int cryptd_hash_update_enqueue(struct ahash_request *req)
978 +{
979 + return cryptd_hash_enqueue(req, cryptd_hash_update);
980 +}
981 +
982 +static void cryptd_hash_final(struct crypto_async_request *req_async, int err)
983 +{
984 + struct cryptd_hash_ctx *ctx = crypto_tfm_ctx(req_async->tfm);
985 + struct crypto_hash *child = ctx->child;
986 + struct ahash_request *req = ahash_request_cast(req_async);
987 + struct cryptd_hash_request_ctx *rctx;
988 + struct hash_desc desc;
989 +
990 + rctx = ahash_request_ctx(req);
991 +
992 + if (unlikely(err == -EINPROGRESS))
993 + goto out;
994 +
995 + desc.tfm = child;
996 + desc.flags = CRYPTO_TFM_REQ_MAY_SLEEP;
997 +
998 + err = crypto_hash_crt(child)->final(&desc, req->result);
999 +
1000 + req->base.complete = rctx->complete;
1001 +
1002 +out:
1003 + local_bh_disable();
1004 + rctx->complete(&req->base, err);
1005 + local_bh_enable();
1006 +}
1007 +
1008 +static int cryptd_hash_final_enqueue(struct ahash_request *req)
1009 +{
1010 + return cryptd_hash_enqueue(req, cryptd_hash_final);
1011 +}
1012 +
1013 +static void cryptd_hash_digest(struct crypto_async_request *req_async, int err)
1014 +{
1015 + struct cryptd_hash_ctx *ctx = crypto_tfm_ctx(req_async->tfm);
1016 + struct crypto_hash *child = ctx->child;
1017 + struct ahash_request *req = ahash_request_cast(req_async);
1018 + struct cryptd_hash_request_ctx *rctx;
1019 + struct hash_desc desc;
1020 +
1021 + rctx = ahash_request_ctx(req);
1022 +
1023 + if (unlikely(err == -EINPROGRESS))
1024 + goto out;
1025 +
1026 + desc.tfm = child;
1027 + desc.flags = CRYPTO_TFM_REQ_MAY_SLEEP;
1028 +
1029 + err = crypto_hash_crt(child)->digest(&desc,
1030 + req->src,
1031 + req->nbytes,
1032 + req->result);
1033 +
1034 + req->base.complete = rctx->complete;
1035 +
1036 +out:
1037 + local_bh_disable();
1038 + rctx->complete(&req->base, err);
1039 + local_bh_enable();
1040 +}
1041 +
1042 +static int cryptd_hash_digest_enqueue(struct ahash_request *req)
1043 +{
1044 + return cryptd_hash_enqueue(req, cryptd_hash_digest);
1045 +}
1046 +
1047 +static struct crypto_instance *cryptd_alloc_hash(
1048 + struct rtattr **tb, struct cryptd_state *state)
1049 +{
1050 + struct crypto_instance *inst;
1051 + struct crypto_alg *alg;
1052 +
1053 + alg = crypto_get_attr_alg(tb, CRYPTO_ALG_TYPE_HASH,
1054 + CRYPTO_ALG_TYPE_HASH_MASK);
1055 + if (IS_ERR(alg))
1056 + return ERR_PTR(PTR_ERR(alg));
1057 +
1058 + inst = cryptd_alloc_instance(alg, state);
1059 + if (IS_ERR(inst))
1060 + goto out_put_alg;
1061 +
1062 + inst->alg.cra_flags = CRYPTO_ALG_TYPE_AHASH | CRYPTO_ALG_ASYNC;
1063 + inst->alg.cra_type = &crypto_ahash_type;
1064 +
1065 + inst->alg.cra_ahash.digestsize = alg->cra_hash.digestsize;
1066 + inst->alg.cra_ctxsize = sizeof(struct cryptd_hash_ctx);
1067 +
1068 + inst->alg.cra_init = cryptd_hash_init_tfm;
1069 + inst->alg.cra_exit = cryptd_hash_exit_tfm;
1070 +
1071 + inst->alg.cra_ahash.init = cryptd_hash_init_enqueue;
1072 + inst->alg.cra_ahash.update = cryptd_hash_update_enqueue;
1073 + inst->alg.cra_ahash.final = cryptd_hash_final_enqueue;
1074 + inst->alg.cra_ahash.setkey = cryptd_hash_setkey;
1075 + inst->alg.cra_ahash.digest = cryptd_hash_digest_enqueue;
1076 +
1077 +out_put_alg:
1078 + crypto_mod_put(alg);
1079 + return inst;
1080 +}
1081 +
1082 static struct cryptd_state state;
1083
1084 static struct crypto_instance *cryptd_alloc(struct rtattr **tb)
1085 @@ -274,6 +515,8 @@
1086 switch (algt->type & algt->mask & CRYPTO_ALG_TYPE_MASK) {
1087 case CRYPTO_ALG_TYPE_BLKCIPHER:
1088 return cryptd_alloc_blkcipher(tb, &state);
1089 + case CRYPTO_ALG_TYPE_DIGEST:
1090 + return cryptd_alloc_hash(tb, &state);
1091 }
1092
1093 return ERR_PTR(-EINVAL);
1094 --- a/crypto/digest.c
1095 +++ b/crypto/digest.c
1096 @@ -12,6 +12,7 @@
1097 *
1098 */
1099
1100 +#include <crypto/internal/hash.h>
1101 #include <crypto/scatterwalk.h>
1102 #include <linux/mm.h>
1103 #include <linux/errno.h>
1104 @@ -141,7 +142,7 @@
1105 struct hash_tfm *ops = &tfm->crt_hash;
1106 struct digest_alg *dalg = &tfm->__crt_alg->cra_digest;
1107
1108 - if (dalg->dia_digestsize > crypto_tfm_alg_blocksize(tfm))
1109 + if (dalg->dia_digestsize > PAGE_SIZE / 8)
1110 return -EINVAL;
1111
1112 ops->init = init;
1113 @@ -157,3 +158,83 @@
1114 void crypto_exit_digest_ops(struct crypto_tfm *tfm)
1115 {
1116 }
1117 +
1118 +static int digest_async_nosetkey(struct crypto_ahash *tfm_async, const u8 *key,
1119 + unsigned int keylen)
1120 +{
1121 + crypto_ahash_clear_flags(tfm_async, CRYPTO_TFM_RES_MASK);
1122 + return -ENOSYS;
1123 +}
1124 +
1125 +static int digest_async_setkey(struct crypto_ahash *tfm_async, const u8 *key,
1126 + unsigned int keylen)
1127 +{
1128 + struct crypto_tfm *tfm = crypto_ahash_tfm(tfm_async);
1129 + struct digest_alg *dalg = &tfm->__crt_alg->cra_digest;
1130 +
1131 + crypto_ahash_clear_flags(tfm_async, CRYPTO_TFM_RES_MASK);
1132 + return dalg->dia_setkey(tfm, key, keylen);
1133 +}
1134 +
1135 +static int digest_async_init(struct ahash_request *req)
1136 +{
1137 + struct crypto_tfm *tfm = req->base.tfm;
1138 + struct digest_alg *dalg = &tfm->__crt_alg->cra_digest;
1139 +
1140 + dalg->dia_init(tfm);
1141 + return 0;
1142 +}
1143 +
1144 +static int digest_async_update(struct ahash_request *req)
1145 +{
1146 + struct crypto_tfm *tfm = req->base.tfm;
1147 + struct hash_desc desc = {
1148 + .tfm = __crypto_hash_cast(tfm),
1149 + .flags = req->base.flags,
1150 + };
1151 +
1152 + update(&desc, req->src, req->nbytes);
1153 + return 0;
1154 +}
1155 +
1156 +static int digest_async_final(struct ahash_request *req)
1157 +{
1158 + struct crypto_tfm *tfm = req->base.tfm;
1159 + struct hash_desc desc = {
1160 + .tfm = __crypto_hash_cast(tfm),
1161 + .flags = req->base.flags,
1162 + };
1163 +
1164 + final(&desc, req->result);
1165 + return 0;
1166 +}
1167 +
1168 +static int digest_async_digest(struct ahash_request *req)
1169 +{
1170 + struct crypto_tfm *tfm = req->base.tfm;
1171 + struct hash_desc desc = {
1172 + .tfm = __crypto_hash_cast(tfm),
1173 + .flags = req->base.flags,
1174 + };
1175 +
1176 + return digest(&desc, req->src, req->nbytes, req->result);
1177 +}
1178 +
1179 +int crypto_init_digest_ops_async(struct crypto_tfm *tfm)
1180 +{
1181 + struct ahash_tfm *crt = &tfm->crt_ahash;
1182 + struct digest_alg *dalg = &tfm->__crt_alg->cra_digest;
1183 +
1184 + if (dalg->dia_digestsize > crypto_tfm_alg_blocksize(tfm))
1185 + return -EINVAL;
1186 +
1187 + crt->init = digest_async_init;
1188 + crt->update = digest_async_update;
1189 + crt->final = digest_async_final;
1190 + crt->digest = digest_async_digest;
1191 + crt->setkey = dalg->dia_setkey ? digest_async_setkey :
1192 + digest_async_nosetkey;
1193 + crt->digestsize = dalg->dia_digestsize;
1194 +
1195 + return 0;
1196 +}
1197 --- a/crypto/hash.c
1198 +++ b/crypto/hash.c
1199 @@ -9,6 +9,7 @@
1200 * any later version.
1201 */
1202
1203 +#include <crypto/internal/hash.h>
1204 #include <linux/errno.h>
1205 #include <linux/kernel.h>
1206 #include <linux/module.h>
1207 @@ -59,24 +60,107 @@
1208 return alg->setkey(crt, key, keylen);
1209 }
1210
1211 -static int crypto_init_hash_ops(struct crypto_tfm *tfm, u32 type, u32 mask)
1212 +static int hash_async_setkey(struct crypto_ahash *tfm_async, const u8 *key,
1213 + unsigned int keylen)
1214 +{
1215 + struct crypto_tfm *tfm = crypto_ahash_tfm(tfm_async);
1216 + struct crypto_hash *tfm_hash = __crypto_hash_cast(tfm);
1217 + struct hash_alg *alg = &tfm->__crt_alg->cra_hash;
1218 +
1219 + return alg->setkey(tfm_hash, key, keylen);
1220 +}
1221 +
1222 +static int hash_async_init(struct ahash_request *req)
1223 +{
1224 + struct crypto_tfm *tfm = req->base.tfm;
1225 + struct hash_alg *alg = &tfm->__crt_alg->cra_hash;
1226 + struct hash_desc desc = {
1227 + .tfm = __crypto_hash_cast(tfm),
1228 + .flags = req->base.flags,
1229 + };
1230 +
1231 + return alg->init(&desc);
1232 +}
1233 +
1234 +static int hash_async_update(struct ahash_request *req)
1235 +{
1236 + struct crypto_tfm *tfm = req->base.tfm;
1237 + struct hash_alg *alg = &tfm->__crt_alg->cra_hash;
1238 + struct hash_desc desc = {
1239 + .tfm = __crypto_hash_cast(tfm),
1240 + .flags = req->base.flags,
1241 + };
1242 +
1243 + return alg->update(&desc, req->src, req->nbytes);
1244 +}
1245 +
1246 +static int hash_async_final(struct ahash_request *req)
1247 +{
1248 + struct crypto_tfm *tfm = req->base.tfm;
1249 + struct hash_alg *alg = &tfm->__crt_alg->cra_hash;
1250 + struct hash_desc desc = {
1251 + .tfm = __crypto_hash_cast(tfm),
1252 + .flags = req->base.flags,
1253 + };
1254 +
1255 + return alg->final(&desc, req->result);
1256 +}
1257 +
1258 +static int hash_async_digest(struct ahash_request *req)
1259 +{
1260 + struct crypto_tfm *tfm = req->base.tfm;
1261 + struct hash_alg *alg = &tfm->__crt_alg->cra_hash;
1262 + struct hash_desc desc = {
1263 + .tfm = __crypto_hash_cast(tfm),
1264 + .flags = req->base.flags,
1265 + };
1266 +
1267 + return alg->digest(&desc, req->src, req->nbytes, req->result);
1268 +}
1269 +
1270 +static int crypto_init_hash_ops_async(struct crypto_tfm *tfm)
1271 +{
1272 + struct ahash_tfm *crt = &tfm->crt_ahash;
1273 + struct hash_alg *alg = &tfm->__crt_alg->cra_hash;
1274 +
1275 + crt->init = hash_async_init;
1276 + crt->update = hash_async_update;
1277 + crt->final = hash_async_final;
1278 + crt->digest = hash_async_digest;
1279 + crt->setkey = hash_async_setkey;
1280 + crt->digestsize = alg->digestsize;
1281 +
1282 + return 0;
1283 +}
1284 +
1285 +static int crypto_init_hash_ops_sync(struct crypto_tfm *tfm)
1286 {
1287 struct hash_tfm *crt = &tfm->crt_hash;
1288 struct hash_alg *alg = &tfm->__crt_alg->cra_hash;
1289
1290 - if (alg->digestsize > crypto_tfm_alg_blocksize(tfm))
1291 - return -EINVAL;
1292 -
1293 - crt->init = alg->init;
1294 - crt->update = alg->update;
1295 - crt->final = alg->final;
1296 - crt->digest = alg->digest;
1297 - crt->setkey = hash_setkey;
1298 + crt->init = alg->init;
1299 + crt->update = alg->update;
1300 + crt->final = alg->final;
1301 + crt->digest = alg->digest;
1302 + crt->setkey = hash_setkey;
1303 crt->digestsize = alg->digestsize;
1304
1305 return 0;
1306 }
1307
1308 +static int crypto_init_hash_ops(struct crypto_tfm *tfm, u32 type, u32 mask)
1309 +{
1310 + struct hash_alg *alg = &tfm->__crt_alg->cra_hash;
1311 +
1312 + if (alg->digestsize > PAGE_SIZE / 8)
1313 + return -EINVAL;
1314 +
1315 + if ((mask & CRYPTO_ALG_TYPE_HASH_MASK) != CRYPTO_ALG_TYPE_HASH_MASK)
1316 + return crypto_init_hash_ops_async(tfm);
1317 + else
1318 + return crypto_init_hash_ops_sync(tfm);
1319 +}
1320 +
1321 static void crypto_hash_show(struct seq_file *m, struct crypto_alg *alg)
1322 __attribute__ ((unused));
1323 static void crypto_hash_show(struct seq_file *m, struct crypto_alg *alg)
1324 --- a/crypto/hmac.c
1325 +++ b/crypto/hmac.c
1326 @@ -226,6 +226,7 @@
1327 struct crypto_instance *inst;
1328 struct crypto_alg *alg;
1329 int err;
1330 + int ds;
1331
1332 err = crypto_check_attr_type(tb, CRYPTO_ALG_TYPE_HASH);
1333 if (err)
1334 @@ -236,6 +237,13 @@
1335 if (IS_ERR(alg))
1336 return ERR_CAST(alg);
1337
1338 + inst = ERR_PTR(-EINVAL);
1339 + ds = (alg->cra_flags & CRYPTO_ALG_TYPE_MASK) ==
1340 + CRYPTO_ALG_TYPE_HASH ? alg->cra_hash.digestsize :
1341 + alg->cra_digest.dia_digestsize;
1342 + if (ds > alg->cra_blocksize)
1343 + goto out_put_alg;
1344 +
1345 inst = crypto_alloc_instance("hmac", alg);
1346 if (IS_ERR(inst))
1347 goto out_put_alg;
1348 @@ -246,14 +254,10 @@
1349 inst->alg.cra_alignmask = alg->cra_alignmask;
1350 inst->alg.cra_type = &crypto_hash_type;
1351
1352 - inst->alg.cra_hash.digestsize =
1353 - (alg->cra_flags & CRYPTO_ALG_TYPE_MASK) ==
1354 - CRYPTO_ALG_TYPE_HASH ? alg->cra_hash.digestsize :
1355 - alg->cra_digest.dia_digestsize;
1356 + inst->alg.cra_hash.digestsize = ds;
1357
1358 inst->alg.cra_ctxsize = sizeof(struct hmac_ctx) +
1359 - ALIGN(inst->alg.cra_blocksize * 2 +
1360 - inst->alg.cra_hash.digestsize,
1361 + ALIGN(inst->alg.cra_blocksize * 2 + ds,
1362 sizeof(void *));
1363
1364 inst->alg.cra_init = hmac_init_tfm;
1365 --- a/crypto/internal.h
1366 +++ b/crypto/internal.h
1367 @@ -86,6 +86,7 @@
1368 struct crypto_alg *crypto_alg_mod_lookup(const char *name, u32 type, u32 mask);
1369
1370 int crypto_init_digest_ops(struct crypto_tfm *tfm);
1371 +int crypto_init_digest_ops_async(struct crypto_tfm *tfm);
1372 int crypto_init_cipher_ops(struct crypto_tfm *tfm);
1373 int crypto_init_compress_ops(struct crypto_tfm *tfm);
1374
1375 --- /dev/null
1376 +++ b/crypto/prng.c
1377 @@ -0,0 +1,410 @@
1378 +/*
1379 + * PRNG: Pseudo Random Number Generator
1380 + * Based on NIST Recommended PRNG From ANSI X9.31 Appendix A.2.4 using
1381 + * AES 128 cipher in RFC3686 ctr mode
1382 + *
1383 + * (C) Neil Horman <nhorman@tuxdriver.com>
1384 + *
1385 + * This program is free software; you can redistribute it and/or modify it
1386 + * under the terms of the GNU General Public License as published by the
1387 + * Free Software Foundation; either version 2 of the License, or (at your
1388 + * any later version.
1389 + *
1390 + *
1391 + */
1392 +
1393 +#include <linux/err.h>
1394 +#include <linux/init.h>
1395 +#include <linux/module.h>
1396 +#include <linux/mm.h>
1397 +#include <linux/slab.h>
1398 +#include <linux/fs.h>
1399 +#include <linux/scatterlist.h>
1400 +#include <linux/string.h>
1401 +#include <linux/crypto.h>
1402 +#include <linux/highmem.h>
1403 +#include <linux/moduleparam.h>
1404 +#include <linux/jiffies.h>
1405 +#include <linux/timex.h>
1406 +#include <linux/interrupt.h>
1407 +#include <linux/miscdevice.h>
1408 +#include "prng.h"
1409 +
1410 +#define TEST_PRNG_ON_START 0
1411 +
1412 +#define DEFAULT_PRNG_KEY "0123456789abcdef1011"
1413 +#define DEFAULT_PRNG_KSZ 20
1414 +#define DEFAULT_PRNG_IV "defaultv"
1415 +#define DEFAULT_PRNG_IVSZ 8
1416 +#define DEFAULT_BLK_SZ 16
1417 +#define DEFAULT_V_SEED "zaybxcwdveuftgsh"
1418 +
1419 +/*
1420 + * Flags for the prng_context flags field
1421 + */
1422 +
1423 +#define PRNG_FIXED_SIZE 0x1
1424 +#define PRNG_NEED_RESET 0x2
1425 +
1426 +/*
1427 + * Note: DT is our counter value
1428 + * I is our intermediate value
1429 + * V is our seed vector
1430 + * See http://csrc.nist.gov/groups/STM/cavp/documents/rng/931rngext.pdf
1431 + * for implementation details
1432 + */
1433 +
1434 +
1435 +struct prng_context {
1436 + char *prng_key;
1437 + char *prng_iv;
1438 + spinlock_t prng_lock;
1439 + unsigned char rand_data[DEFAULT_BLK_SZ];
1440 + unsigned char last_rand_data[DEFAULT_BLK_SZ];
1441 + unsigned char DT[DEFAULT_BLK_SZ];
1442 + unsigned char I[DEFAULT_BLK_SZ];
1443 + unsigned char V[DEFAULT_BLK_SZ];
1444 + u32 rand_data_valid;
1445 + struct crypto_blkcipher *tfm;
1446 + u32 flags;
1447 +};
1448 +
1449 +static int dbg;
1450 +
1451 +static void hexdump(char *note, unsigned char *buf, unsigned int len)
1452 +{
1453 + if (dbg) {
1454 + printk(KERN_CRIT "%s", note);
1455 + print_hex_dump(KERN_CONT, "", DUMP_PREFIX_OFFSET,
1456 + 16, 1,
1457 + buf, len, false);
1458 + }
1459 +}
1460 +
1461 +#define dbgprint(format, args...) do {if(dbg) printk(format, ##args);} while(0)
1462 +
1463 +static void xor_vectors(unsigned char *in1, unsigned char *in2,
1464 + unsigned char *out, unsigned int size)
1465 +{
1466 + int i;
1467 +
1468 + for (i=0;i<size;i++)
1469 + out[i] = in1[i] ^ in2[i];
1470 +
1471 +}
1472 +/*
1473 + * Returns DEFAULT_BLK_SZ bytes of random data per call
1474 + * returns 0 if generation succeded, <0 if something went wrong
1475 + */
1476 +static int _get_more_prng_bytes(struct prng_context *ctx)
1477 +{
1478 + int i;
1479 + struct blkcipher_desc desc;
1480 + struct scatterlist sg_in, sg_out;
1481 + int ret;
1482 + unsigned char tmp[DEFAULT_BLK_SZ];
1483 +
1484 + desc.tfm = ctx->tfm;
1485 + desc.flags = 0;
1486 +
1487 +
1488 + dbgprint(KERN_CRIT "Calling _get_more_prng_bytes for context %p\n",ctx);
1489 +
1490 + hexdump("Input DT: ", ctx->DT, DEFAULT_BLK_SZ);
1491 + hexdump("Input I: ", ctx->I, DEFAULT_BLK_SZ);
1492 + hexdump("Input V: ", ctx->V, DEFAULT_BLK_SZ);
1493 +
1494 + /*
1495 + * This algorithm is a 3 stage state machine
1496 + */
1497 + for (i=0;i<3;i++) {
1498 +
1499 + desc.tfm = ctx->tfm;
1500 + desc.flags = 0;
1501 + switch (i) {
1502 + case 0:
1503 + /*
1504 + * Start by encrypting the counter value
1505 + * This gives us an intermediate value I
1506 + */
1507 + memcpy(tmp, ctx->DT, DEFAULT_BLK_SZ);
1508 + sg_init_one(&sg_out, &ctx->I[0], DEFAULT_BLK_SZ);
1509 + hexdump("tmp stage 0: ", tmp, DEFAULT_BLK_SZ);
1510 + break;
1511 + case 1:
1512 +
1513 + /*
1514 + * Next xor I with our secret vector V
1515 + * encrypt that result to obtain our
1516 + * pseudo random data which we output
1517 + */
1518 + xor_vectors(ctx->I, ctx->V, tmp, DEFAULT_BLK_SZ);
1519 + sg_init_one(&sg_out, &ctx->rand_data[0], DEFAULT_BLK_SZ);
1520 + hexdump("tmp stage 1: ", tmp, DEFAULT_BLK_SZ);
1521 + break;
1522 + case 2:
1523 + /*
1524 + * First check that we didn't produce the same random data
1525 + * that we did last time around through this
1526 + */
1527 + if (!memcmp(ctx->rand_data, ctx->last_rand_data, DEFAULT_BLK_SZ)) {
1528 + printk(KERN_ERR "ctx %p Failed repetition check!\n",
1529 + ctx);
1530 + ctx->flags |= PRNG_NEED_RESET;
1531 + return -1;
1532 + }
1533 + memcpy(ctx->last_rand_data, ctx->rand_data, DEFAULT_BLK_SZ);
1534 +
1535 + /*
1536 + * Lastly xor the random data with I
1537 + * and encrypt that to obtain a new secret vector V
1538 + */
1539 + xor_vectors(ctx->rand_data, ctx->I, tmp, DEFAULT_BLK_SZ);
1540 + sg_init_one(&sg_out, &ctx->V[0], DEFAULT_BLK_SZ);
1541 + hexdump("tmp stage 2: ", tmp, DEFAULT_BLK_SZ);
1542 + break;
1543 + }
1544 +
1545 + /* Initialize our input buffer */
1546 + sg_init_one(&sg_in, &tmp[0], DEFAULT_BLK_SZ);
1547 +
1548 + /* do the encryption */
1549 + ret = crypto_blkcipher_encrypt(&desc, &sg_out, &sg_in, DEFAULT_BLK_SZ);
1550 +
1551 + /* And check the result */
1552 + if (ret) {
1553 + dbgprint(KERN_CRIT "Encryption of new block failed for context %p\n",ctx);
1554 + ctx->rand_data_valid = DEFAULT_BLK_SZ;
1555 + return -1;
1556 + }
1557 +
1558 + }
1559 +
1560 + /*
1561 + * Now update our DT value
1562 + */
1563 + for (i=DEFAULT_BLK_SZ-1;i>0;i--) {
1564 + ctx->DT[i] = ctx->DT[i-1];
1565 + }
1566 + ctx->DT[0] += 1;
1567 +
1568 + dbgprint("Returning new block for context %p\n",ctx);
1569 + ctx->rand_data_valid = 0;
1570 +
1571 + hexdump("Output DT: ", ctx->DT, DEFAULT_BLK_SZ);
1572 + hexdump("Output I: ", ctx->I, DEFAULT_BLK_SZ);
1573 + hexdump("Output V: ", ctx->V, DEFAULT_BLK_SZ);
1574 + hexdump("New Random Data: ", ctx->rand_data, DEFAULT_BLK_SZ);
1575 +
1576 + return 0;
1577 +}
1578 +
1579 +/* Our exported functions */
1580 +int get_prng_bytes(char *buf, int nbytes, struct prng_context *ctx)
1581 +{
1582 + unsigned long flags;
1583 + unsigned char *ptr = buf;
1584 + unsigned int byte_count = (unsigned int)nbytes;
1585 + int err;
1586 +
1587 +
1588 + if (nbytes < 0)
1589 + return -EINVAL;
1590 +
1591 + spin_lock_irqsave(&ctx->prng_lock, flags);
1592 +
1593 + err = -EFAULT;
1594 + if (ctx->flags & PRNG_NEED_RESET)
1595 + goto done;
1596 +
1597 + /*
1598 + * If the FIXED_SIZE flag is on, only return whole blocks of
1599 + * pseudo random data
1600 + */
1601 + err = -EINVAL;
1602 + if (ctx->flags & PRNG_FIXED_SIZE) {
1603 + if (nbytes < DEFAULT_BLK_SZ)
1604 + goto done;
1605 + byte_count = DEFAULT_BLK_SZ;
1606 + }
1607 +
1608 + err = byte_count;
1609 +
1610 + dbgprint(KERN_CRIT "getting %d random bytes for context %p\n",byte_count, ctx);
1611 +
1612 +
1613 +remainder:
1614 + if (ctx->rand_data_valid == DEFAULT_BLK_SZ) {
1615 + if (_get_more_prng_bytes(ctx) < 0) {
1616 + memset(buf, 0, nbytes);
1617 + err = -EFAULT;
1618 + goto done;
1619 + }
1620 + }
1621 +
1622 + /*
1623 + * Copy up to the next whole block size
1624 + */
1625 + if (byte_count < DEFAULT_BLK_SZ) {
1626 + for (;ctx->rand_data_valid < DEFAULT_BLK_SZ; ctx->rand_data_valid++) {
1627 + *ptr = ctx->rand_data[ctx->rand_data_valid];
1628 + ptr++;
1629 + byte_count--;
1630 + if (byte_count == 0)
1631 + goto done;
1632 + }
1633 + }
1634 +
1635 + /*
1636 + * Now copy whole blocks
1637 + */
1638 + for(;byte_count >= DEFAULT_BLK_SZ; byte_count -= DEFAULT_BLK_SZ) {
1639 + if (_get_more_prng_bytes(ctx) < 0) {
1640 + memset(buf, 0, nbytes);
1641 + err = -1;
1642 + goto done;
1643 + }
1644 + memcpy(ptr, ctx->rand_data, DEFAULT_BLK_SZ);
1645 + ctx->rand_data_valid += DEFAULT_BLK_SZ;
1646 + ptr += DEFAULT_BLK_SZ;
1647 + }
1648 +
1649 + /*
1650 + * Now copy any extra partial data
1651 + */
1652 + if (byte_count)
1653 + goto remainder;
1654 +
1655 +done:
1656 + spin_unlock_irqrestore(&ctx->prng_lock, flags);
1657 + dbgprint(KERN_CRIT "returning %d from get_prng_bytes in context %p\n",err, ctx);
1658 + return err;
1659 +}
1660 +EXPORT_SYMBOL_GPL(get_prng_bytes);
1661 +
1662 +struct prng_context *alloc_prng_context(void)
1663 +{
1664 + struct prng_context *ctx=kzalloc(sizeof(struct prng_context), GFP_KERNEL);
1665 +
1666 + spin_lock_init(&ctx->prng_lock);
1667 +
1668 + if (reset_prng_context(ctx, NULL, NULL, NULL, NULL)) {
1669 + kfree(ctx);
1670 + ctx = NULL;
1671 + }
1672 +
1673 + dbgprint(KERN_CRIT "returning context %p\n",ctx);
1674 + return ctx;
1675 +}
1676 +
1677 +EXPORT_SYMBOL_GPL(alloc_prng_context);
1678 +
1679 +void free_prng_context(struct prng_context *ctx)
1680 +{
1681 + crypto_free_blkcipher(ctx->tfm);
1682 + kfree(ctx);
1683 +}
1684 +EXPORT_SYMBOL_GPL(free_prng_context);
1685 +
1686 +int reset_prng_context(struct prng_context *ctx,
1687 + unsigned char *key, unsigned char *iv,
1688 + unsigned char *V, unsigned char *DT)
1689 +{
1690 + int ret;
1691 + int iv_len;
1692 + int rc = -EFAULT;
1693 +
1694 + spin_lock(&ctx->prng_lock);
1695 + ctx->flags |= PRNG_NEED_RESET;
1696 +
1697 + if (key)
1698 + memcpy(ctx->prng_key,key,strlen(ctx->prng_key));
1699 + else
1700 + ctx->prng_key = DEFAULT_PRNG_KEY;
1701 +
1702 + if (iv)
1703 + memcpy(ctx->prng_iv,iv, strlen(ctx->prng_iv));
1704 + else
1705 + ctx->prng_iv = DEFAULT_PRNG_IV;
1706 +
1707 + if (V)
1708 + memcpy(ctx->V,V,DEFAULT_BLK_SZ);
1709 + else
1710 + memcpy(ctx->V,DEFAULT_V_SEED,DEFAULT_BLK_SZ);
1711 +
1712 + if (DT)
1713 + memcpy(ctx->DT, DT, DEFAULT_BLK_SZ);
1714 + else
1715 + memset(ctx->DT, 0, DEFAULT_BLK_SZ);
1716 +
1717 + memset(ctx->rand_data,0,DEFAULT_BLK_SZ);
1718 + memset(ctx->last_rand_data,0,DEFAULT_BLK_SZ);
1719 +
1720 + if (ctx->tfm)
1721 + crypto_free_blkcipher(ctx->tfm);
1722 +
1723 + ctx->tfm = crypto_alloc_blkcipher("rfc3686(ctr(aes))",0,0);
1724 + if (!ctx->tfm) {
1725 + dbgprint(KERN_CRIT "Failed to alloc crypto tfm for context %p\n",ctx->tfm);
1726 + goto out;
1727 + }
1728 +
1729 + ctx->rand_data_valid = DEFAULT_BLK_SZ;
1730 +
1731 + ret = crypto_blkcipher_setkey(ctx->tfm, ctx->prng_key, strlen(ctx->prng_key));
1732 + if (ret) {
1733 + dbgprint(KERN_CRIT "PRNG: setkey() failed flags=%x\n",
1734 + crypto_blkcipher_get_flags(ctx->tfm));
1735 + crypto_free_blkcipher(ctx->tfm);
1736 + goto out;
1737 + }
1738 +
1739 + iv_len = crypto_blkcipher_ivsize(ctx->tfm);
1740 + if (iv_len) {
1741 + crypto_blkcipher_set_iv(ctx->tfm, ctx->prng_iv, iv_len);
1742 + }
1743 + rc = 0;
1744 + ctx->flags &= ~PRNG_NEED_RESET;
1745 +out:
1746 + spin_unlock(&ctx->prng_lock);
1747 +
1748 + return rc;
1749 +
1750 +}
1751 +EXPORT_SYMBOL_GPL(reset_prng_context);
1752 +
1753 +/* Module initalization */
1754 +static int __init prng_mod_init(void)
1755 +{
1756 +
1757 +#ifdef TEST_PRNG_ON_START
1758 + int i;
1759 + unsigned char tmpbuf[DEFAULT_BLK_SZ];
1760 +
1761 + struct prng_context *ctx = alloc_prng_context();
1762 + if (ctx == NULL)
1763 + return -EFAULT;
1764 + for (i=0;i<16;i++) {
1765 + if (get_prng_bytes(tmpbuf, DEFAULT_BLK_SZ, ctx) < 0) {
1766 + free_prng_context(ctx);
1767 + return -EFAULT;
1768 + }
1769 + }
1770 + free_prng_context(ctx);
1771 +#endif
1772 +
1773 + return 0;
1774 +}
1775 +
1776 +static void __exit prng_mod_fini(void)
1777 +{
1778 + return;
1779 +}
1780 +
1781 +MODULE_LICENSE("GPL");
1782 +MODULE_DESCRIPTION("Software Pseudo Random Number Generator");
1783 +MODULE_AUTHOR("Neil Horman <nhorman@tuxdriver.com>");
1784 +module_param(dbg, int, 0);
1785 +MODULE_PARM_DESC(dbg, "Boolean to enable debugging (0/1 == off/on)");
1786 +module_init(prng_mod_init);
1787 +module_exit(prng_mod_fini);
1788 --- /dev/null
1789 +++ b/crypto/prng.h
1790 @@ -0,0 +1,27 @@
1791 +/*
1792 + * PRNG: Pseudo Random Number Generator
1793 + *
1794 + * (C) Neil Horman <nhorman@tuxdriver.com>
1795 + *
1796 + * This program is free software; you can redistribute it and/or modify it
1797 + * under the terms of the GNU General Public License as published by the
1798 + * Free Software Foundation; either version 2 of the License, or (at your
1799 + * any later version.
1800 + *
1801 + *
1802 + */
1803 +
1804 +#ifndef _PRNG_H_
1805 +#define _PRNG_H_
1806 +struct prng_context;
1807 +
1808 +int get_prng_bytes(char *buf, int nbytes, struct prng_context *ctx);
1809 +struct prng_context *alloc_prng_context(void);
1810 +int reset_prng_context(struct prng_context *ctx,
1811 + unsigned char *key, unsigned char *iv,
1812 + unsigned char *V,
1813 + unsigned char *DT);
1814 +void free_prng_context(struct prng_context *ctx);
1815 +
1816 +#endif
1817 +
1818 --- /dev/null
1819 +++ b/crypto/ripemd.h
1820 @@ -0,0 +1,43 @@
1821 +/*
1822 + * Common values for RIPEMD algorithms
1823 + */
1824 +
1825 +#ifndef _CRYPTO_RMD_H
1826 +#define _CRYPTO_RMD_H
1827 +
1828 +#define RMD128_DIGEST_SIZE 16
1829 +#define RMD128_BLOCK_SIZE 64
1830 +
1831 +#define RMD160_DIGEST_SIZE 20
1832 +#define RMD160_BLOCK_SIZE 64
1833 +
1834 +#define RMD256_DIGEST_SIZE 32
1835 +#define RMD256_BLOCK_SIZE 64
1836 +
1837 +#define RMD320_DIGEST_SIZE 40
1838 +#define RMD320_BLOCK_SIZE 64
1839 +
1840 +/* initial values */
1841 +#define RMD_H0 0x67452301UL
1842 +#define RMD_H1 0xefcdab89UL
1843 +#define RMD_H2 0x98badcfeUL
1844 +#define RMD_H3 0x10325476UL
1845 +#define RMD_H4 0xc3d2e1f0UL
1846 +#define RMD_H5 0x76543210UL
1847 +#define RMD_H6 0xfedcba98UL
1848 +#define RMD_H7 0x89abcdefUL
1849 +#define RMD_H8 0x01234567UL
1850 +#define RMD_H9 0x3c2d1e0fUL
1851 +
1852 +/* constants */
1853 +#define RMD_K1 0x00000000UL
1854 +#define RMD_K2 0x5a827999UL
1855 +#define RMD_K3 0x6ed9eba1UL
1856 +#define RMD_K4 0x8f1bbcdcUL
1857 +#define RMD_K5 0xa953fd4eUL
1858 +#define RMD_K6 0x50a28be6UL
1859 +#define RMD_K7 0x5c4dd124UL
1860 +#define RMD_K8 0x6d703ef3UL
1861 +#define RMD_K9 0x7a6d76e9UL
1862 +
1863 +#endif
1864 --- /dev/null
1865 +++ b/crypto/rmd128.c
1866 @@ -0,0 +1,325 @@
1867 +/*
1868 + * Cryptographic API.
1869 + *
1870 + * RIPEMD-128 - RACE Integrity Primitives Evaluation Message Digest.
1871 + *
1872 + * Based on the reference implementation by Antoon Bosselaers, ESAT-COSIC
1873 + *
1874 + * Copyright (c) 2008 Adrian-Ken Rueegsegger <rueegsegger (at) swiss-it.ch>
1875 + *
1876 + * This program is free software; you can redistribute it and/or modify it
1877 + * under the terms of the GNU General Public License as published by the Free
1878 + * Software Foundation; either version 2 of the License, or (at your option)
1879 + * any later version.
1880 + *
1881 + */
1882 +#include <linux/init.h>
1883 +#include <linux/module.h>
1884 +#include <linux/mm.h>
1885 +#include <linux/crypto.h>
1886 +#include <linux/cryptohash.h>
1887 +#include <linux/types.h>
1888 +#include <asm/byteorder.h>
1889 +
1890 +#include "ripemd.h"
1891 +
1892 +struct rmd128_ctx {
1893 + u64 byte_count;
1894 + u32 state[4];
1895 + __le32 buffer[16];
1896 +};
1897 +
1898 +#define K1 RMD_K1
1899 +#define K2 RMD_K2
1900 +#define K3 RMD_K3
1901 +#define K4 RMD_K4
1902 +#define KK1 RMD_K6
1903 +#define KK2 RMD_K7
1904 +#define KK3 RMD_K8
1905 +#define KK4 RMD_K1
1906 +
1907 +#define F1(x, y, z) (x ^ y ^ z) /* XOR */
1908 +#define F2(x, y, z) (z ^ (x & (y ^ z))) /* x ? y : z */
1909 +#define F3(x, y, z) ((x | ~y) ^ z)
1910 +#define F4(x, y, z) (y ^ (z & (x ^ y))) /* z ? x : y */
1911 +
1912 +#define ROUND(a, b, c, d, f, k, x, s) { \
1913 + (a) += f((b), (c), (d)) + le32_to_cpup(&(x)) + (k); \
1914 + (a) = rol32((a), (s)); \
1915 +}
1916 +
1917 +static void rmd128_transform(u32 *state, const __le32 *in)
1918 +{
1919 + u32 aa, bb, cc, dd, aaa, bbb, ccc, ddd;
1920 +
1921 + /* Initialize left lane */
1922 + aa = state[0];
1923 + bb = state[1];
1924 + cc = state[2];
1925 + dd = state[3];
1926 +
1927 + /* Initialize right lane */
1928 + aaa = state[0];
1929 + bbb = state[1];
1930 + ccc = state[2];
1931 + ddd = state[3];
1932 +
1933 + /* round 1: left lane */
1934 + ROUND(aa, bb, cc, dd, F1, K1, in[0], 11);
1935 + ROUND(dd, aa, bb, cc, F1, K1, in[1], 14);
1936 + ROUND(cc, dd, aa, bb, F1, K1, in[2], 15);
1937 + ROUND(bb, cc, dd, aa, F1, K1, in[3], 12);
1938 + ROUND(aa, bb, cc, dd, F1, K1, in[4], 5);
1939 + ROUND(dd, aa, bb, cc, F1, K1, in[5], 8);
1940 + ROUND(cc, dd, aa, bb, F1, K1, in[6], 7);
1941 + ROUND(bb, cc, dd, aa, F1, K1, in[7], 9);
1942 + ROUND(aa, bb, cc, dd, F1, K1, in[8], 11);
1943 + ROUND(dd, aa, bb, cc, F1, K1, in[9], 13);
1944 + ROUND(cc, dd, aa, bb, F1, K1, in[10], 14);
1945 + ROUND(bb, cc, dd, aa, F1, K1, in[11], 15);
1946 + ROUND(aa, bb, cc, dd, F1, K1, in[12], 6);
1947 + ROUND(dd, aa, bb, cc, F1, K1, in[13], 7);
1948 + ROUND(cc, dd, aa, bb, F1, K1, in[14], 9);
1949 + ROUND(bb, cc, dd, aa, F1, K1, in[15], 8);
1950 +
1951 + /* round 2: left lane */
1952 + ROUND(aa, bb, cc, dd, F2, K2, in[7], 7);
1953 + ROUND(dd, aa, bb, cc, F2, K2, in[4], 6);
1954 + ROUND(cc, dd, aa, bb, F2, K2, in[13], 8);
1955 + ROUND(bb, cc, dd, aa, F2, K2, in[1], 13);
1956 + ROUND(aa, bb, cc, dd, F2, K2, in[10], 11);
1957 + ROUND(dd, aa, bb, cc, F2, K2, in[6], 9);
1958 + ROUND(cc, dd, aa, bb, F2, K2, in[15], 7);
1959 + ROUND(bb, cc, dd, aa, F2, K2, in[3], 15);
1960 + ROUND(aa, bb, cc, dd, F2, K2, in[12], 7);
1961 + ROUND(dd, aa, bb, cc, F2, K2, in[0], 12);
1962 + ROUND(cc, dd, aa, bb, F2, K2, in[9], 15);
1963 + ROUND(bb, cc, dd, aa, F2, K2, in[5], 9);
1964 + ROUND(aa, bb, cc, dd, F2, K2, in[2], 11);
1965 + ROUND(dd, aa, bb, cc, F2, K2, in[14], 7);
1966 + ROUND(cc, dd, aa, bb, F2, K2, in[11], 13);
1967 + ROUND(bb, cc, dd, aa, F2, K2, in[8], 12);
1968 +
1969 + /* round 3: left lane */
1970 + ROUND(aa, bb, cc, dd, F3, K3, in[3], 11);
1971 + ROUND(dd, aa, bb, cc, F3, K3, in[10], 13);
1972 + ROUND(cc, dd, aa, bb, F3, K3, in[14], 6);
1973 + ROUND(bb, cc, dd, aa, F3, K3, in[4], 7);
1974 + ROUND(aa, bb, cc, dd, F3, K3, in[9], 14);
1975 + ROUND(dd, aa, bb, cc, F3, K3, in[15], 9);
1976 + ROUND(cc, dd, aa, bb, F3, K3, in[8], 13);
1977 + ROUND(bb, cc, dd, aa, F3, K3, in[1], 15);
1978 + ROUND(aa, bb, cc, dd, F3, K3, in[2], 14);
1979 + ROUND(dd, aa, bb, cc, F3, K3, in[7], 8);
1980 + ROUND(cc, dd, aa, bb, F3, K3, in[0], 13);
1981 + ROUND(bb, cc, dd, aa, F3, K3, in[6], 6);
1982 + ROUND(aa, bb, cc, dd, F3, K3, in[13], 5);
1983 + ROUND(dd, aa, bb, cc, F3, K3, in[11], 12);
1984 + ROUND(cc, dd, aa, bb, F3, K3, in[5], 7);
1985 + ROUND(bb, cc, dd, aa, F3, K3, in[12], 5);
1986 +
1987 + /* round 4: left lane */
1988 + ROUND(aa, bb, cc, dd, F4, K4, in[1], 11);
1989 + ROUND(dd, aa, bb, cc, F4, K4, in[9], 12);
1990 + ROUND(cc, dd, aa, bb, F4, K4, in[11], 14);
1991 + ROUND(bb, cc, dd, aa, F4, K4, in[10], 15);
1992 + ROUND(aa, bb, cc, dd, F4, K4, in[0], 14);
1993 + ROUND(dd, aa, bb, cc, F4, K4, in[8], 15);
1994 + ROUND(cc, dd, aa, bb, F4, K4, in[12], 9);
1995 + ROUND(bb, cc, dd, aa, F4, K4, in[4], 8);
1996 + ROUND(aa, bb, cc, dd, F4, K4, in[13], 9);
1997 + ROUND(dd, aa, bb, cc, F4, K4, in[3], 14);
1998 + ROUND(cc, dd, aa, bb, F4, K4, in[7], 5);
1999 + ROUND(bb, cc, dd, aa, F4, K4, in[15], 6);
2000 + ROUND(aa, bb, cc, dd, F4, K4, in[14], 8);
2001 + ROUND(dd, aa, bb, cc, F4, K4, in[5], 6);
2002 + ROUND(cc, dd, aa, bb, F4, K4, in[6], 5);
2003 + ROUND(bb, cc, dd, aa, F4, K4, in[2], 12);
2004 +
2005 + /* round 1: right lane */
2006 + ROUND(aaa, bbb, ccc, ddd, F4, KK1, in[5], 8);
2007 + ROUND(ddd, aaa, bbb, ccc, F4, KK1, in[14], 9);
2008 + ROUND(ccc, ddd, aaa, bbb, F4, KK1, in[7], 9);
2009 + ROUND(bbb, ccc, ddd, aaa, F4, KK1, in[0], 11);
2010 + ROUND(aaa, bbb, ccc, ddd, F4, KK1, in[9], 13);
2011 + ROUND(ddd, aaa, bbb, ccc, F4, KK1, in[2], 15);
2012 + ROUND(ccc, ddd, aaa, bbb, F4, KK1, in[11], 15);
2013 + ROUND(bbb, ccc, ddd, aaa, F4, KK1, in[4], 5);
2014 + ROUND(aaa, bbb, ccc, ddd, F4, KK1, in[13], 7);
2015 + ROUND(ddd, aaa, bbb, ccc, F4, KK1, in[6], 7);
2016 + ROUND(ccc, ddd, aaa, bbb, F4, KK1, in[15], 8);
2017 + ROUND(bbb, ccc, ddd, aaa, F4, KK1, in[8], 11);
2018 + ROUND(aaa, bbb, ccc, ddd, F4, KK1, in[1], 14);
2019 + ROUND(ddd, aaa, bbb, ccc, F4, KK1, in[10], 14);
2020 + ROUND(ccc, ddd, aaa, bbb, F4, KK1, in[3], 12);
2021 + ROUND(bbb, ccc, ddd, aaa, F4, KK1, in[12], 6);
2022 +
2023 + /* round 2: right lane */
2024 + ROUND(aaa, bbb, ccc, ddd, F3, KK2, in[6], 9);
2025 + ROUND(ddd, aaa, bbb, ccc, F3, KK2, in[11], 13);
2026 + ROUND(ccc, ddd, aaa, bbb, F3, KK2, in[3], 15);
2027 + ROUND(bbb, ccc, ddd, aaa, F3, KK2, in[7], 7);
2028 + ROUND(aaa, bbb, ccc, ddd, F3, KK2, in[0], 12);
2029 + ROUND(ddd, aaa, bbb, ccc, F3, KK2, in[13], 8);
2030 + ROUND(ccc, ddd, aaa, bbb, F3, KK2, in[5], 9);
2031 + ROUND(bbb, ccc, ddd, aaa, F3, KK2, in[10], 11);
2032 + ROUND(aaa, bbb, ccc, ddd, F3, KK2, in[14], 7);
2033 + ROUND(ddd, aaa, bbb, ccc, F3, KK2, in[15], 7);
2034 + ROUND(ccc, ddd, aaa, bbb, F3, KK2, in[8], 12);
2035 + ROUND(bbb, ccc, ddd, aaa, F3, KK2, in[12], 7);
2036 + ROUND(aaa, bbb, ccc, ddd, F3, KK2, in[4], 6);
2037 + ROUND(ddd, aaa, bbb, ccc, F3, KK2, in[9], 15);
2038 + ROUND(ccc, ddd, aaa, bbb, F3, KK2, in[1], 13);
2039 + ROUND(bbb, ccc, ddd, aaa, F3, KK2, in[2], 11);
2040 +
2041 + /* round 3: right lane */
2042 + ROUND(aaa, bbb, ccc, ddd, F2, KK3, in[15], 9);
2043 + ROUND(ddd, aaa, bbb, ccc, F2, KK3, in[5], 7);
2044 + ROUND(ccc, ddd, aaa, bbb, F2, KK3, in[1], 15);
2045 + ROUND(bbb, ccc, ddd, aaa, F2, KK3, in[3], 11);
2046 + ROUND(aaa, bbb, ccc, ddd, F2, KK3, in[7], 8);
2047 + ROUND(ddd, aaa, bbb, ccc, F2, KK3, in[14], 6);
2048 + ROUND(ccc, ddd, aaa, bbb, F2, KK3, in[6], 6);
2049 + ROUND(bbb, ccc, ddd, aaa, F2, KK3, in[9], 14);
2050 + ROUND(aaa, bbb, ccc, ddd, F2, KK3, in[11], 12);
2051 + ROUND(ddd, aaa, bbb, ccc, F2, KK3, in[8], 13);
2052 + ROUND(ccc, ddd, aaa, bbb, F2, KK3, in[12], 5);
2053 + ROUND(bbb, ccc, ddd, aaa, F2, KK3, in[2], 14);
2054 + ROUND(aaa, bbb, ccc, ddd, F2, KK3, in[10], 13);
2055 + ROUND(ddd, aaa, bbb, ccc, F2, KK3, in[0], 13);
2056 + ROUND(ccc, ddd, aaa, bbb, F2, KK3, in[4], 7);
2057 + ROUND(bbb, ccc, ddd, aaa, F2, KK3, in[13], 5);
2058 +
2059 + /* round 4: right lane */
2060 + ROUND(aaa, bbb, ccc, ddd, F1, KK4, in[8], 15);
2061 + ROUND(ddd, aaa, bbb, ccc, F1, KK4, in[6], 5);
2062 + ROUND(ccc, ddd, aaa, bbb, F1, KK4, in[4], 8);
2063 + ROUND(bbb, ccc, ddd, aaa, F1, KK4, in[1], 11);
2064 + ROUND(aaa, bbb, ccc, ddd, F1, KK4, in[3], 14);
2065 + ROUND(ddd, aaa, bbb, ccc, F1, KK4, in[11], 14);
2066 + ROUND(ccc, ddd, aaa, bbb, F1, KK4, in[15], 6);
2067 + ROUND(bbb, ccc, ddd, aaa, F1, KK4, in[0], 14);
2068 + ROUND(aaa, bbb, ccc, ddd, F1, KK4, in[5], 6);
2069 + ROUND(ddd, aaa, bbb, ccc, F1, KK4, in[12], 9);
2070 + ROUND(ccc, ddd, aaa, bbb, F1, KK4, in[2], 12);
2071 + ROUND(bbb, ccc, ddd, aaa, F1, KK4, in[13], 9);
2072 + ROUND(aaa, bbb, ccc, ddd, F1, KK4, in[9], 12);
2073 + ROUND(ddd, aaa, bbb, ccc, F1, KK4, in[7], 5);
2074 + ROUND(ccc, ddd, aaa, bbb, F1, KK4, in[10], 15);
2075 + ROUND(bbb, ccc, ddd, aaa, F1, KK4, in[14], 8);
2076 +
2077 + /* combine results */
2078 + ddd += cc + state[1]; /* final result for state[0] */
2079 + state[1] = state[2] + dd + aaa;
2080 + state[2] = state[3] + aa + bbb;
2081 + state[3] = state[0] + bb + ccc;
2082 + state[0] = ddd;
2083 +
2084 + return;
2085 +}
2086 +
2087 +static void rmd128_init(struct crypto_tfm *tfm)
2088 +{
2089 + struct rmd128_ctx *rctx = crypto_tfm_ctx(tfm);
2090 +
2091 + rctx->byte_count = 0;
2092 +
2093 + rctx->state[0] = RMD_H0;
2094 + rctx->state[1] = RMD_H1;
2095 + rctx->state[2] = RMD_H2;
2096 + rctx->state[3] = RMD_H3;
2097 +
2098 + memset(rctx->buffer, 0, sizeof(rctx->buffer));
2099 +}
2100 +
2101 +static void rmd128_update(struct crypto_tfm *tfm, const u8 *data,
2102 + unsigned int len)
2103 +{
2104 + struct rmd128_ctx *rctx = crypto_tfm_ctx(tfm);
2105 + const u32 avail = sizeof(rctx->buffer) - (rctx->byte_count & 0x3f);
2106 +
2107 + rctx->byte_count += len;
2108 +
2109 + /* Enough space in buffer? If so copy and we're done */
2110 + if (avail > len) {
2111 + memcpy((char *)rctx->buffer + (sizeof(rctx->buffer) - avail),
2112 + data, len);
2113 + return;
2114 + }
2115 +
2116 + memcpy((char *)rctx->buffer + (sizeof(rctx->buffer) - avail),
2117 + data, avail);
2118 +
2119 + rmd128_transform(rctx->state, rctx->buffer);
2120 + data += avail;
2121 + len -= avail;
2122 +
2123 + while (len >= sizeof(rctx->buffer)) {
2124 + memcpy(rctx->buffer, data, sizeof(rctx->buffer));
2125 + rmd128_transform(rctx->state, rctx->buffer);
2126 + data += sizeof(rctx->buffer);
2127 + len -= sizeof(rctx->buffer);
2128 + }
2129 +
2130 + memcpy(rctx->buffer, data, len);
2131 +}
2132 +
2133 +/* Add padding and return the message digest. */
2134 +static void rmd128_final(struct crypto_tfm *tfm, u8 *out)
2135 +{
2136 + struct rmd128_ctx *rctx = crypto_tfm_ctx(tfm);
2137 + u32 i, index, padlen;
2138 + __le64 bits;
2139 + __le32 *dst = (__le32 *)out;
2140 + static const u8 padding[64] = { 0x80, };
2141 +
2142 + bits = cpu_to_le64(rctx->byte_count << 3);
2143 +
2144 + /* Pad out to 56 mod 64 */
2145 + index = rctx->byte_count & 0x3f;
2146 + padlen = (index < 56) ? (56 - index) : ((64+56) - index);
2147 + rmd128_update(tfm, padding, padlen);
2148 +
2149 + /* Append length */
2150 + rmd128_update(tfm, (const u8 *)&bits, sizeof(bits));
2151 +
2152 + /* Store state in digest */
2153 + for (i = 0; i < 4; i++)
2154 + dst[i] = cpu_to_le32p(&rctx->state[i]);
2155 +
2156 + /* Wipe context */
2157 + memset(rctx, 0, sizeof(*rctx));
2158 +}
2159 +
2160 +static struct crypto_alg alg = {
2161 + .cra_name = "rmd128",
2162 + .cra_driver_name = "rmd128",
2163 + .cra_flags = CRYPTO_ALG_TYPE_DIGEST,
2164 + .cra_blocksize = RMD128_BLOCK_SIZE,
2165 + .cra_ctxsize = sizeof(struct rmd128_ctx),
2166 + .cra_module = THIS_MODULE,
2167 + .cra_list = LIST_HEAD_INIT(alg.cra_list),
2168 + .cra_u = { .digest = {
2169 + .dia_digestsize = RMD128_DIGEST_SIZE,
2170 + .dia_init = rmd128_init,
2171 + .dia_update = rmd128_update,
2172 + .dia_final = rmd128_final } }
2173 +};
2174 +
2175 +static int __init rmd128_mod_init(void)
2176 +{
2177 + return crypto_register_alg(&alg);
2178 +}
2179 +
2180 +static void __exit rmd128_mod_fini(void)
2181 +{
2182 + crypto_unregister_alg(&alg);
2183 +}
2184 +
2185 +module_init(rmd128_mod_init);
2186 +module_exit(rmd128_mod_fini);
2187 +
2188 +MODULE_LICENSE("GPL");
2189 +MODULE_DESCRIPTION("RIPEMD-128 Message Digest");
2190 +
2191 +MODULE_ALIAS("rmd128");
2192 --- /dev/null
2193 +++ b/crypto/rmd160.c
2194 @@ -0,0 +1,369 @@
2195 +/*
2196 + * Cryptographic API.
2197 + *
2198 + * RIPEMD-160 - RACE Integrity Primitives Evaluation Message Digest.
2199 + *
2200 + * Based on the reference implementation by Antoon Bosselaers, ESAT-COSIC
2201 + *
2202 + * Copyright (c) 2008 Adrian-Ken Rueegsegger <rueegsegger (at) swiss-it.ch>
2203 + *
2204 + * This program is free software; you can redistribute it and/or modify it
2205 + * under the terms of the GNU General Public License as published by the Free
2206 + * Software Foundation; either version 2 of the License, or (at your option)
2207 + * any later version.
2208 + *
2209 + */
2210 +#include <linux/init.h>
2211 +#include <linux/module.h>
2212 +#include <linux/mm.h>
2213 +#include <linux/crypto.h>
2214 +#include <linux/cryptohash.h>
2215 +#include <linux/types.h>
2216 +#include <asm/byteorder.h>
2217 +
2218 +#include "ripemd.h"
2219 +
2220 +struct rmd160_ctx {
2221 + u64 byte_count;
2222 + u32 state[5];
2223 + __le32 buffer[16];
2224 +};
2225 +
2226 +#define K1 RMD_K1
2227 +#define K2 RMD_K2
2228 +#define K3 RMD_K3
2229 +#define K4 RMD_K4
2230 +#define K5 RMD_K5
2231 +#define KK1 RMD_K6
2232 +#define KK2 RMD_K7
2233 +#define KK3 RMD_K8
2234 +#define KK4 RMD_K9
2235 +#define KK5 RMD_K1
2236 +
2237 +#define F1(x, y, z) (x ^ y ^ z) /* XOR */
2238 +#define F2(x, y, z) (z ^ (x & (y ^ z))) /* x ? y : z */
2239 +#define F3(x, y, z) ((x | ~y) ^ z)
2240 +#define F4(x, y, z) (y ^ (z & (x ^ y))) /* z ? x : y */
2241 +#define F5(x, y, z) (x ^ (y | ~z))
2242 +
2243 +#define ROUND(a, b, c, d, e, f, k, x, s) { \
2244 + (a) += f((b), (c), (d)) + le32_to_cpup(&(x)) + (k); \
2245 + (a) = rol32((a), (s)) + (e); \
2246 + (c) = rol32((c), 10); \
2247 +}
2248 +
2249 +static void rmd160_transform(u32 *state, const __le32 *in)
2250 +{
2251 + u32 aa, bb, cc, dd, ee, aaa, bbb, ccc, ddd, eee;
2252 +
2253 + /* Initialize left lane */
2254 + aa = state[0];
2255 + bb = state[1];
2256 + cc = state[2];
2257 + dd = state[3];
2258 + ee = state[4];
2259 +
2260 + /* Initialize right lane */
2261 + aaa = state[0];
2262 + bbb = state[1];
2263 + ccc = state[2];
2264 + ddd = state[3];
2265 + eee = state[4];
2266 +
2267 + /* round 1: left lane */
2268 + ROUND(aa, bb, cc, dd, ee, F1, K1, in[0], 11);
2269 + ROUND(ee, aa, bb, cc, dd, F1, K1, in[1], 14);
2270 + ROUND(dd, ee, aa, bb, cc, F1, K1, in[2], 15);
2271 + ROUND(cc, dd, ee, aa, bb, F1, K1, in[3], 12);
2272 + ROUND(bb, cc, dd, ee, aa, F1, K1, in[4], 5);
2273 + ROUND(aa, bb, cc, dd, ee, F1, K1, in[5], 8);
2274 + ROUND(ee, aa, bb, cc, dd, F1, K1, in[6], 7);
2275 + ROUND(dd, ee, aa, bb, cc, F1, K1, in[7], 9);
2276 + ROUND(cc, dd, ee, aa, bb, F1, K1, in[8], 11);
2277 + ROUND(bb, cc, dd, ee, aa, F1, K1, in[9], 13);
2278 + ROUND(aa, bb, cc, dd, ee, F1, K1, in[10], 14);
2279 + ROUND(ee, aa, bb, cc, dd, F1, K1, in[11], 15);
2280 + ROUND(dd, ee, aa, bb, cc, F1, K1, in[12], 6);
2281 + ROUND(cc, dd, ee, aa, bb, F1, K1, in[13], 7);
2282 + ROUND(bb, cc, dd, ee, aa, F1, K1, in[14], 9);
2283 + ROUND(aa, bb, cc, dd, ee, F1, K1, in[15], 8);
2284 +
2285 + /* round 2: left lane" */
2286 + ROUND(ee, aa, bb, cc, dd, F2, K2, in[7], 7);
2287 + ROUND(dd, ee, aa, bb, cc, F2, K2, in[4], 6);
2288 + ROUND(cc, dd, ee, aa, bb, F2, K2, in[13], 8);
2289 + ROUND(bb, cc, dd, ee, aa, F2, K2, in[1], 13);
2290 + ROUND(aa, bb, cc, dd, ee, F2, K2, in[10], 11);
2291 + ROUND(ee, aa, bb, cc, dd, F2, K2, in[6], 9);
2292 + ROUND(dd, ee, aa, bb, cc, F2, K2, in[15], 7);
2293 + ROUND(cc, dd, ee, aa, bb, F2, K2, in[3], 15);
2294 + ROUND(bb, cc, dd, ee, aa, F2, K2, in[12], 7);
2295 + ROUND(aa, bb, cc, dd, ee, F2, K2, in[0], 12);
2296 + ROUND(ee, aa, bb, cc, dd, F2, K2, in[9], 15);
2297 + ROUND(dd, ee, aa, bb, cc, F2, K2, in[5], 9);
2298 + ROUND(cc, dd, ee, aa, bb, F2, K2, in[2], 11);
2299 + ROUND(bb, cc, dd, ee, aa, F2, K2, in[14], 7);
2300 + ROUND(aa, bb, cc, dd, ee, F2, K2, in[11], 13);
2301 + ROUND(ee, aa, bb, cc, dd, F2, K2, in[8], 12);
2302 +
2303 + /* round 3: left lane" */
2304 + ROUND(dd, ee, aa, bb, cc, F3, K3, in[3], 11);
2305 + ROUND(cc, dd, ee, aa, bb, F3, K3, in[10], 13);
2306 + ROUND(bb, cc, dd, ee, aa, F3, K3, in[14], 6);
2307 + ROUND(aa, bb, cc, dd, ee, F3, K3, in[4], 7);
2308 + ROUND(ee, aa, bb, cc, dd, F3, K3, in[9], 14);
2309 + ROUND(dd, ee, aa, bb, cc, F3, K3, in[15], 9);
2310 + ROUND(cc, dd, ee, aa, bb, F3, K3, in[8], 13);
2311 + ROUND(bb, cc, dd, ee, aa, F3, K3, in[1], 15);
2312 + ROUND(aa, bb, cc, dd, ee, F3, K3, in[2], 14);
2313 + ROUND(ee, aa, bb, cc, dd, F3, K3, in[7], 8);
2314 + ROUND(dd, ee, aa, bb, cc, F3, K3, in[0], 13);
2315 + ROUND(cc, dd, ee, aa, bb, F3, K3, in[6], 6);
2316 + ROUND(bb, cc, dd, ee, aa, F3, K3, in[13], 5);
2317 + ROUND(aa, bb, cc, dd, ee, F3, K3, in[11], 12);
2318 + ROUND(ee, aa, bb, cc, dd, F3, K3, in[5], 7);
2319 + ROUND(dd, ee, aa, bb, cc, F3, K3, in[12], 5);
2320 +
2321 + /* round 4: left lane" */
2322 + ROUND(cc, dd, ee, aa, bb, F4, K4, in[1], 11);
2323 + ROUND(bb, cc, dd, ee, aa, F4, K4, in[9], 12);
2324 + ROUND(aa, bb, cc, dd, ee, F4, K4, in[11], 14);
2325 + ROUND(ee, aa, bb, cc, dd, F4, K4, in[10], 15);
2326 + ROUND(dd, ee, aa, bb, cc, F4, K4, in[0], 14);
2327 + ROUND(cc, dd, ee, aa, bb, F4, K4, in[8], 15);
2328 + ROUND(bb, cc, dd, ee, aa, F4, K4, in[12], 9);
2329 + ROUND(aa, bb, cc, dd, ee, F4, K4, in[4], 8);
2330 + ROUND(ee, aa, bb, cc, dd, F4, K4, in[13], 9);
2331 + ROUND(dd, ee, aa, bb, cc, F4, K4, in[3], 14);
2332 + ROUND(cc, dd, ee, aa, bb, F4, K4, in[7], 5);
2333 + ROUND(bb, cc, dd, ee, aa, F4, K4, in[15], 6);
2334 + ROUND(aa, bb, cc, dd, ee, F4, K4, in[14], 8);
2335 + ROUND(ee, aa, bb, cc, dd, F4, K4, in[5], 6);
2336 + ROUND(dd, ee, aa, bb, cc, F4, K4, in[6], 5);
2337 + ROUND(cc, dd, ee, aa, bb, F4, K4, in[2], 12);
2338 +
2339 + /* round 5: left lane" */
2340 + ROUND(bb, cc, dd, ee, aa, F5, K5, in[4], 9);
2341 + ROUND(aa, bb, cc, dd, ee, F5, K5, in[0], 15);
2342 + ROUND(ee, aa, bb, cc, dd, F5, K5, in[5], 5);
2343 + ROUND(dd, ee, aa, bb, cc, F5, K5, in[9], 11);
2344 + ROUND(cc, dd, ee, aa, bb, F5, K5, in[7], 6);
2345 + ROUND(bb, cc, dd, ee, aa, F5, K5, in[12], 8);
2346 + ROUND(aa, bb, cc, dd, ee, F5, K5, in[2], 13);
2347 + ROUND(ee, aa, bb, cc, dd, F5, K5, in[10], 12);
2348 + ROUND(dd, ee, aa, bb, cc, F5, K5, in[14], 5);
2349 + ROUND(cc, dd, ee, aa, bb, F5, K5, in[1], 12);
2350 + ROUND(bb, cc, dd, ee, aa, F5, K5, in[3], 13);
2351 + ROUND(aa, bb, cc, dd, ee, F5, K5, in[8], 14);
2352 + ROUND(ee, aa, bb, cc, dd, F5, K5, in[11], 11);
2353 + ROUND(dd, ee, aa, bb, cc, F5, K5, in[6], 8);
2354 + ROUND(cc, dd, ee, aa, bb, F5, K5, in[15], 5);
2355 + ROUND(bb, cc, dd, ee, aa, F5, K5, in[13], 6);
2356 +
2357 + /* round 1: right lane */
2358 + ROUND(aaa, bbb, ccc, ddd, eee, F5, KK1, in[5], 8);
2359 + ROUND(eee, aaa, bbb, ccc, ddd, F5, KK1, in[14], 9);
2360 + ROUND(ddd, eee, aaa, bbb, ccc, F5, KK1, in[7], 9);
2361 + ROUND(ccc, ddd, eee, aaa, bbb, F5, KK1, in[0], 11);
2362 + ROUND(bbb, ccc, ddd, eee, aaa, F5, KK1, in[9], 13);
2363 + ROUND(aaa, bbb, ccc, ddd, eee, F5, KK1, in[2], 15);
2364 + ROUND(eee, aaa, bbb, ccc, ddd, F5, KK1, in[11], 15);
2365 + ROUND(ddd, eee, aaa, bbb, ccc, F5, KK1, in[4], 5);
2366 + ROUND(ccc, ddd, eee, aaa, bbb, F5, KK1, in[13], 7);
2367 + ROUND(bbb, ccc, ddd, eee, aaa, F5, KK1, in[6], 7);
2368 + ROUND(aaa, bbb, ccc, ddd, eee, F5, KK1, in[15], 8);
2369 + ROUND(eee, aaa, bbb, ccc, ddd, F5, KK1, in[8], 11);
2370 + ROUND(ddd, eee, aaa, bbb, ccc, F5, KK1, in[1], 14);
2371 + ROUND(ccc, ddd, eee, aaa, bbb, F5, KK1, in[10], 14);
2372 + ROUND(bbb, ccc, ddd, eee, aaa, F5, KK1, in[3], 12);
2373 + ROUND(aaa, bbb, ccc, ddd, eee, F5, KK1, in[12], 6);
2374 +
2375 + /* round 2: right lane */
2376 + ROUND(eee, aaa, bbb, ccc, ddd, F4, KK2, in[6], 9);
2377 + ROUND(ddd, eee, aaa, bbb, ccc, F4, KK2, in[11], 13);
2378 + ROUND(ccc, ddd, eee, aaa, bbb, F4, KK2, in[3], 15);
2379 + ROUND(bbb, ccc, ddd, eee, aaa, F4, KK2, in[7], 7);
2380 + ROUND(aaa, bbb, ccc, ddd, eee, F4, KK2, in[0], 12);
2381 + ROUND(eee, aaa, bbb, ccc, ddd, F4, KK2, in[13], 8);
2382 + ROUND(ddd, eee, aaa, bbb, ccc, F4, KK2, in[5], 9);
2383 + ROUND(ccc, ddd, eee, aaa, bbb, F4, KK2, in[10], 11);
2384 + ROUND(bbb, ccc, ddd, eee, aaa, F4, KK2, in[14], 7);
2385 + ROUND(aaa, bbb, ccc, ddd, eee, F4, KK2, in[15], 7);
2386 + ROUND(eee, aaa, bbb, ccc, ddd, F4, KK2, in[8], 12);
2387 + ROUND(ddd, eee, aaa, bbb, ccc, F4, KK2, in[12], 7);
2388 + ROUND(ccc, ddd, eee, aaa, bbb, F4, KK2, in[4], 6);
2389 + ROUND(bbb, ccc, ddd, eee, aaa, F4, KK2, in[9], 15);
2390 + ROUND(aaa, bbb, ccc, ddd, eee, F4, KK2, in[1], 13);
2391 + ROUND(eee, aaa, bbb, ccc, ddd, F4, KK2, in[2], 11);
2392 +
2393 + /* round 3: right lane */
2394 + ROUND(ddd, eee, aaa, bbb, ccc, F3, KK3, in[15], 9);
2395 + ROUND(ccc, ddd, eee, aaa, bbb, F3, KK3, in[5], 7);
2396 + ROUND(bbb, ccc, ddd, eee, aaa, F3, KK3, in[1], 15);
2397 + ROUND(aaa, bbb, ccc, ddd, eee, F3, KK3, in[3], 11);
2398 + ROUND(eee, aaa, bbb, ccc, ddd, F3, KK3, in[7], 8);
2399 + ROUND(ddd, eee, aaa, bbb, ccc, F3, KK3, in[14], 6);
2400 + ROUND(ccc, ddd, eee, aaa, bbb, F3, KK3, in[6], 6);
2401 + ROUND(bbb, ccc, ddd, eee, aaa, F3, KK3, in[9], 14);
2402 + ROUND(aaa, bbb, ccc, ddd, eee, F3, KK3, in[11], 12);
2403 + ROUND(eee, aaa, bbb, ccc, ddd, F3, KK3, in[8], 13);
2404 + ROUND(ddd, eee, aaa, bbb, ccc, F3, KK3, in[12], 5);
2405 + ROUND(ccc, ddd, eee, aaa, bbb, F3, KK3, in[2], 14);
2406 + ROUND(bbb, ccc, ddd, eee, aaa, F3, KK3, in[10], 13);
2407 + ROUND(aaa, bbb, ccc, ddd, eee, F3, KK3, in[0], 13);
2408 + ROUND(eee, aaa, bbb, ccc, ddd, F3, KK3, in[4], 7);
2409 + ROUND(ddd, eee, aaa, bbb, ccc, F3, KK3, in[13], 5);
2410 +
2411 + /* round 4: right lane */
2412 + ROUND(ccc, ddd, eee, aaa, bbb, F2, KK4, in[8], 15);
2413 + ROUND(bbb, ccc, ddd, eee, aaa, F2, KK4, in[6], 5);
2414 + ROUND(aaa, bbb, ccc, ddd, eee, F2, KK4, in[4], 8);
2415 + ROUND(eee, aaa, bbb, ccc, ddd, F2, KK4, in[1], 11);
2416 + ROUND(ddd, eee, aaa, bbb, ccc, F2, KK4, in[3], 14);
2417 + ROUND(ccc, ddd, eee, aaa, bbb, F2, KK4, in[11], 14);
2418 + ROUND(bbb, ccc, ddd, eee, aaa, F2, KK4, in[15], 6);
2419 + ROUND(aaa, bbb, ccc, ddd, eee, F2, KK4, in[0], 14);
2420 + ROUND(eee, aaa, bbb, ccc, ddd, F2, KK4, in[5], 6);
2421 + ROUND(ddd, eee, aaa, bbb, ccc, F2, KK4, in[12], 9);
2422 + ROUND(ccc, ddd, eee, aaa, bbb, F2, KK4, in[2], 12);
2423 + ROUND(bbb, ccc, ddd, eee, aaa, F2, KK4, in[13], 9);
2424 + ROUND(aaa, bbb, ccc, ddd, eee, F2, KK4, in[9], 12);
2425 + ROUND(eee, aaa, bbb, ccc, ddd, F2, KK4, in[7], 5);
2426 + ROUND(ddd, eee, aaa, bbb, ccc, F2, KK4, in[10], 15);
2427 + ROUND(ccc, ddd, eee, aaa, bbb, F2, KK4, in[14], 8);
2428 +
2429 + /* round 5: right lane */
2430 + ROUND(bbb, ccc, ddd, eee, aaa, F1, KK5, in[12], 8);
2431 + ROUND(aaa, bbb, ccc, ddd, eee, F1, KK5, in[15], 5);
2432 + ROUND(eee, aaa, bbb, ccc, ddd, F1, KK5, in[10], 12);
2433 + ROUND(ddd, eee, aaa, bbb, ccc, F1, KK5, in[4], 9);
2434 + ROUND(ccc, ddd, eee, aaa, bbb, F1, KK5, in[1], 12);
2435 + ROUND(bbb, ccc, ddd, eee, aaa, F1, KK5, in[5], 5);
2436 + ROUND(aaa, bbb, ccc, ddd, eee, F1, KK5, in[8], 14);
2437 + ROUND(eee, aaa, bbb, ccc, ddd, F1, KK5, in[7], 6);
2438 + ROUND(ddd, eee, aaa, bbb, ccc, F1, KK5, in[6], 8);
2439 + ROUND(ccc, ddd, eee, aaa, bbb, F1, KK5, in[2], 13);
2440 + ROUND(bbb, ccc, ddd, eee, aaa, F1, KK5, in[13], 6);
2441 + ROUND(aaa, bbb, ccc, ddd, eee, F1, KK5, in[14], 5);
2442 + ROUND(eee, aaa, bbb, ccc, ddd, F1, KK5, in[0], 15);
2443 + ROUND(ddd, eee, aaa, bbb, ccc, F1, KK5, in[3], 13);
2444 + ROUND(ccc, ddd, eee, aaa, bbb, F1, KK5, in[9], 11);
2445 + ROUND(bbb, ccc, ddd, eee, aaa, F1, KK5, in[11], 11);
2446 +
2447 + /* combine results */
2448 + ddd += cc + state[1]; /* final result for state[0] */
2449 + state[1] = state[2] + dd + eee;
2450 + state[2] = state[3] + ee + aaa;
2451 + state[3] = state[4] + aa + bbb;
2452 + state[4] = state[0] + bb + ccc;
2453 + state[0] = ddd;
2454 +
2455 + return;
2456 +}
2457 +
2458 +static void rmd160_init(struct crypto_tfm *tfm)
2459 +{
2460 + struct rmd160_ctx *rctx = crypto_tfm_ctx(tfm);
2461 +
2462 + rctx->byte_count = 0;
2463 +
2464 + rctx->state[0] = RMD_H0;
2465 + rctx->state[1] = RMD_H1;
2466 + rctx->state[2] = RMD_H2;
2467 + rctx->state[3] = RMD_H3;
2468 + rctx->state[4] = RMD_H4;
2469 +
2470 + memset(rctx->buffer, 0, sizeof(rctx->buffer));
2471 +}
2472 +
2473 +static void rmd160_update(struct crypto_tfm *tfm, const u8 *data,
2474 + unsigned int len)
2475 +{
2476 + struct rmd160_ctx *rctx = crypto_tfm_ctx(tfm);
2477 + const u32 avail = sizeof(rctx->buffer) - (rctx->byte_count & 0x3f);
2478 +
2479 + rctx->byte_count += len;
2480 +
2481 + /* Enough space in buffer? If so copy and we're done */
2482 + if (avail > len) {
2483 + memcpy((char *)rctx->buffer + (sizeof(rctx->buffer) - avail),
2484 + data, len);
2485 + return;
2486 + }
2487 +
2488 + memcpy((char *)rctx->buffer + (sizeof(rctx->buffer) - avail),
2489 + data, avail);
2490 +
2491 + rmd160_transform(rctx->state, rctx->buffer);
2492 + data += avail;
2493 + len -= avail;
2494 +
2495 + while (len >= sizeof(rctx->buffer)) {
2496 + memcpy(rctx->buffer, data, sizeof(rctx->buffer));
2497 + rmd160_transform(rctx->state, rctx->buffer);
2498 + data += sizeof(rctx->buffer);
2499 + len -= sizeof(rctx->buffer);
2500 + }
2501 +
2502 + memcpy(rctx->buffer, data, len);
2503 +}
2504 +
2505 +/* Add padding and return the message digest. */
2506 +static void rmd160_final(struct crypto_tfm *tfm, u8 *out)
2507 +{
2508 + struct rmd160_ctx *rctx = crypto_tfm_ctx(tfm);
2509 + u32 i, index, padlen;
2510 + __le64 bits;
2511 + __le32 *dst = (__le32 *)out;
2512 + static const u8 padding[64] = { 0x80, };
2513 +
2514 + bits = cpu_to_le64(rctx->byte_count << 3);
2515 +
2516 + /* Pad out to 56 mod 64 */
2517 + index = rctx->byte_count & 0x3f;
2518 + padlen = (index < 56) ? (56 - index) : ((64+56) - index);
2519 + rmd160_update(tfm, padding, padlen);
2520 +
2521 + /* Append length */
2522 + rmd160_update(tfm, (const u8 *)&bits, sizeof(bits));
2523 +
2524 + /* Store state in digest */
2525 + for (i = 0; i < 5; i++)
2526 + dst[i] = cpu_to_le32p(&rctx->state[i]);
2527 +
2528 + /* Wipe context */
2529 + memset(rctx, 0, sizeof(*rctx));
2530 +}
2531 +
2532 +static struct crypto_alg alg = {
2533 + .cra_name = "rmd160",
2534 + .cra_driver_name = "rmd160",
2535 + .cra_flags = CRYPTO_ALG_TYPE_DIGEST,
2536 + .cra_blocksize = RMD160_BLOCK_SIZE,
2537 + .cra_ctxsize = sizeof(struct rmd160_ctx),
2538 + .cra_module = THIS_MODULE,
2539 + .cra_list = LIST_HEAD_INIT(alg.cra_list),
2540 + .cra_u = { .digest = {
2541 + .dia_digestsize = RMD160_DIGEST_SIZE,
2542 + .dia_init = rmd160_init,
2543 + .dia_update = rmd160_update,
2544 + .dia_final = rmd160_final } }
2545 +};
2546 +
2547 +static int __init rmd160_mod_init(void)
2548 +{
2549 + return crypto_register_alg(&alg);
2550 +}
2551 +
2552 +static void __exit rmd160_mod_fini(void)
2553 +{
2554 + crypto_unregister_alg(&alg);
2555 +}
2556 +
2557 +module_init(rmd160_mod_init);
2558 +module_exit(rmd160_mod_fini);
2559 +
2560 +MODULE_LICENSE("GPL");
2561 +MODULE_DESCRIPTION("RIPEMD-160 Message Digest");
2562 +
2563 +MODULE_ALIAS("rmd160");
2564 --- /dev/null
2565 +++ b/crypto/rmd256.c
2566 @@ -0,0 +1,344 @@
2567 +/*
2568 + * Cryptographic API.
2569 + *
2570 + * RIPEMD-256 - RACE Integrity Primitives Evaluation Message Digest.
2571 + *
2572 + * Based on the reference implementation by Antoon Bosselaers, ESAT-COSIC
2573 + *
2574 + * Copyright (c) 2008 Adrian-Ken Rueegsegger <rueegsegger (at) swiss-it.ch>
2575 + *
2576 + * This program is free software; you can redistribute it and/or modify it
2577 + * under the terms of the GNU General Public License as published by the Free
2578 + * Software Foundation; either version 2 of the License, or (at your option)
2579 + * any later version.
2580 + *
2581 + */
2582 +#include <linux/init.h>
2583 +#include <linux/module.h>
2584 +#include <linux/mm.h>
2585 +#include <linux/crypto.h>
2586 +#include <linux/cryptohash.h>
2587 +#include <linux/types.h>
2588 +#include <asm/byteorder.h>
2589 +
2590 +#include "ripemd.h"
2591 +
2592 +struct rmd256_ctx {
2593 + u64 byte_count;
2594 + u32 state[8];
2595 + __le32 buffer[16];
2596 +};
2597 +
2598 +#define K1 RMD_K1
2599 +#define K2 RMD_K2
2600 +#define K3 RMD_K3
2601 +#define K4 RMD_K4
2602 +#define KK1 RMD_K6
2603 +#define KK2 RMD_K7
2604 +#define KK3 RMD_K8
2605 +#define KK4 RMD_K1
2606 +
2607 +#define F1(x, y, z) (x ^ y ^ z) /* XOR */
2608 +#define F2(x, y, z) (z ^ (x & (y ^ z))) /* x ? y : z */
2609 +#define F3(x, y, z) ((x | ~y) ^ z)
2610 +#define F4(x, y, z) (y ^ (z & (x ^ y))) /* z ? x : y */
2611 +
2612 +#define ROUND(a, b, c, d, f, k, x, s) { \
2613 + (a) += f((b), (c), (d)) + le32_to_cpup(&(x)) + (k); \
2614 + (a) = rol32((a), (s)); \
2615 +}
2616 +
2617 +static void rmd256_transform(u32 *state, const __le32 *in)
2618 +{
2619 + u32 aa, bb, cc, dd, aaa, bbb, ccc, ddd, tmp;
2620 +
2621 + /* Initialize left lane */
2622 + aa = state[0];
2623 + bb = state[1];
2624 + cc = state[2];
2625 + dd = state[3];
2626 +
2627 + /* Initialize right lane */
2628 + aaa = state[4];
2629 + bbb = state[5];
2630 + ccc = state[6];
2631 + ddd = state[7];
2632 +
2633 + /* round 1: left lane */
2634 + ROUND(aa, bb, cc, dd, F1, K1, in[0], 11);
2635 + ROUND(dd, aa, bb, cc, F1, K1, in[1], 14);
2636 + ROUND(cc, dd, aa, bb, F1, K1, in[2], 15);
2637 + ROUND(bb, cc, dd, aa, F1, K1, in[3], 12);
2638 + ROUND(aa, bb, cc, dd, F1, K1, in[4], 5);
2639 + ROUND(dd, aa, bb, cc, F1, K1, in[5], 8);
2640 + ROUND(cc, dd, aa, bb, F1, K1, in[6], 7);
2641 + ROUND(bb, cc, dd, aa, F1, K1, in[7], 9);
2642 + ROUND(aa, bb, cc, dd, F1, K1, in[8], 11);
2643 + ROUND(dd, aa, bb, cc, F1, K1, in[9], 13);
2644 + ROUND(cc, dd, aa, bb, F1, K1, in[10], 14);
2645 + ROUND(bb, cc, dd, aa, F1, K1, in[11], 15);
2646 + ROUND(aa, bb, cc, dd, F1, K1, in[12], 6);
2647 + ROUND(dd, aa, bb, cc, F1, K1, in[13], 7);
2648 + ROUND(cc, dd, aa, bb, F1, K1, in[14], 9);
2649 + ROUND(bb, cc, dd, aa, F1, K1, in[15], 8);
2650 +
2651 + /* round 1: right lane */
2652 + ROUND(aaa, bbb, ccc, ddd, F4, KK1, in[5], 8);
2653 + ROUND(ddd, aaa, bbb, ccc, F4, KK1, in[14], 9);
2654 + ROUND(ccc, ddd, aaa, bbb, F4, KK1, in[7], 9);
2655 + ROUND(bbb, ccc, ddd, aaa, F4, KK1, in[0], 11);
2656 + ROUND(aaa, bbb, ccc, ddd, F4, KK1, in[9], 13);
2657 + ROUND(ddd, aaa, bbb, ccc, F4, KK1, in[2], 15);
2658 + ROUND(ccc, ddd, aaa, bbb, F4, KK1, in[11], 15);
2659 + ROUND(bbb, ccc, ddd, aaa, F4, KK1, in[4], 5);
2660 + ROUND(aaa, bbb, ccc, ddd, F4, KK1, in[13], 7);
2661 + ROUND(ddd, aaa, bbb, ccc, F4, KK1, in[6], 7);
2662 + ROUND(ccc, ddd, aaa, bbb, F4, KK1, in[15], 8);
2663 + ROUND(bbb, ccc, ddd, aaa, F4, KK1, in[8], 11);
2664 + ROUND(aaa, bbb, ccc, ddd, F4, KK1, in[1], 14);
2665 + ROUND(ddd, aaa, bbb, ccc, F4, KK1, in[10], 14);
2666 + ROUND(ccc, ddd, aaa, bbb, F4, KK1, in[3], 12);
2667 + ROUND(bbb, ccc, ddd, aaa, F4, KK1, in[12], 6);
2668 +
2669 + /* Swap contents of "a" registers */
2670 + tmp = aa; aa = aaa; aaa = tmp;
2671 +
2672 + /* round 2: left lane */
2673 + ROUND(aa, bb, cc, dd, F2, K2, in[7], 7);
2674 + ROUND(dd, aa, bb, cc, F2, K2, in[4], 6);
2675 + ROUND(cc, dd, aa, bb, F2, K2, in[13], 8);
2676 + ROUND(bb, cc, dd, aa, F2, K2, in[1], 13);
2677 + ROUND(aa, bb, cc, dd, F2, K2, in[10], 11);
2678 + ROUND(dd, aa, bb, cc, F2, K2, in[6], 9);
2679 + ROUND(cc, dd, aa, bb, F2, K2, in[15], 7);
2680 + ROUND(bb, cc, dd, aa, F2, K2, in[3], 15);
2681 + ROUND(aa, bb, cc, dd, F2, K2, in[12], 7);
2682 + ROUND(dd, aa, bb, cc, F2, K2, in[0], 12);
2683 + ROUND(cc, dd, aa, bb, F2, K2, in[9], 15);
2684 + ROUND(bb, cc, dd, aa, F2, K2, in[5], 9);
2685 + ROUND(aa, bb, cc, dd, F2, K2, in[2], 11);
2686 + ROUND(dd, aa, bb, cc, F2, K2, in[14], 7);
2687 + ROUND(cc, dd, aa, bb, F2, K2, in[11], 13);
2688 + ROUND(bb, cc, dd, aa, F2, K2, in[8], 12);
2689 +
2690 + /* round 2: right lane */
2691 + ROUND(aaa, bbb, ccc, ddd, F3, KK2, in[6], 9);
2692 + ROUND(ddd, aaa, bbb, ccc, F3, KK2, in[11], 13);
2693 + ROUND(ccc, ddd, aaa, bbb, F3, KK2, in[3], 15);
2694 + ROUND(bbb, ccc, ddd, aaa, F3, KK2, in[7], 7);
2695 + ROUND(aaa, bbb, ccc, ddd, F3, KK2, in[0], 12);
2696 + ROUND(ddd, aaa, bbb, ccc, F3, KK2, in[13], 8);
2697 + ROUND(ccc, ddd, aaa, bbb, F3, KK2, in[5], 9);
2698 + ROUND(bbb, ccc, ddd, aaa, F3, KK2, in[10], 11);
2699 + ROUND(aaa, bbb, ccc, ddd, F3, KK2, in[14], 7);
2700 + ROUND(ddd, aaa, bbb, ccc, F3, KK2, in[15], 7);
2701 + ROUND(ccc, ddd, aaa, bbb, F3, KK2, in[8], 12);
2702 + ROUND(bbb, ccc, ddd, aaa, F3, KK2, in[12], 7);
2703 + ROUND(aaa, bbb, ccc, ddd, F3, KK2, in[4], 6);
2704 + ROUND(ddd, aaa, bbb, ccc, F3, KK2, in[9], 15);
2705 + ROUND(ccc, ddd, aaa, bbb, F3, KK2, in[1], 13);
2706 + ROUND(bbb, ccc, ddd, aaa, F3, KK2, in[2], 11);
2707 +
2708 + /* Swap contents of "b" registers */
2709 + tmp = bb; bb = bbb; bbb = tmp;
2710 +
2711 + /* round 3: left lane */
2712 + ROUND(aa, bb, cc, dd, F3, K3, in[3], 11);
2713 + ROUND(dd, aa, bb, cc, F3, K3, in[10], 13);
2714 + ROUND(cc, dd, aa, bb, F3, K3, in[14], 6);
2715 + ROUND(bb, cc, dd, aa, F3, K3, in[4], 7);
2716 + ROUND(aa, bb, cc, dd, F3, K3, in[9], 14);
2717 + ROUND(dd, aa, bb, cc, F3, K3, in[15], 9);
2718 + ROUND(cc, dd, aa, bb, F3, K3, in[8], 13);
2719 + ROUND(bb, cc, dd, aa, F3, K3, in[1], 15);
2720 + ROUND(aa, bb, cc, dd, F3, K3, in[2], 14);
2721 + ROUND(dd, aa, bb, cc, F3, K3, in[7], 8);
2722 + ROUND(cc, dd, aa, bb, F3, K3, in[0], 13);
2723 + ROUND(bb, cc, dd, aa, F3, K3, in[6], 6);
2724 + ROUND(aa, bb, cc, dd, F3, K3, in[13], 5);
2725 + ROUND(dd, aa, bb, cc, F3, K3, in[11], 12);
2726 + ROUND(cc, dd, aa, bb, F3, K3, in[5], 7);
2727 + ROUND(bb, cc, dd, aa, F3, K3, in[12], 5);
2728 +
2729 + /* round 3: right lane */
2730 + ROUND(aaa, bbb, ccc, ddd, F2, KK3, in[15], 9);
2731 + ROUND(ddd, aaa, bbb, ccc, F2, KK3, in[5], 7);
2732 + ROUND(ccc, ddd, aaa, bbb, F2, KK3, in[1], 15);
2733 + ROUND(bbb, ccc, ddd, aaa, F2, KK3, in[3], 11);
2734 + ROUND(aaa, bbb, ccc, ddd, F2, KK3, in[7], 8);
2735 + ROUND(ddd, aaa, bbb, ccc, F2, KK3, in[14], 6);
2736 + ROUND(ccc, ddd, aaa, bbb, F2, KK3, in[6], 6);
2737 + ROUND(bbb, ccc, ddd, aaa, F2, KK3, in[9], 14);
2738 + ROUND(aaa, bbb, ccc, ddd, F2, KK3, in[11], 12);
2739 + ROUND(ddd, aaa, bbb, ccc, F2, KK3, in[8], 13);
2740 + ROUND(ccc, ddd, aaa, bbb, F2, KK3, in[12], 5);
2741 + ROUND(bbb, ccc, ddd, aaa, F2, KK3, in[2], 14);
2742 + ROUND(aaa, bbb, ccc, ddd, F2, KK3, in[10], 13);
2743 + ROUND(ddd, aaa, bbb, ccc, F2, KK3, in[0], 13);
2744 + ROUND(ccc, ddd, aaa, bbb, F2, KK3, in[4], 7);
2745 + ROUND(bbb, ccc, ddd, aaa, F2, KK3, in[13], 5);
2746 +
2747 + /* Swap contents of "c" registers */
2748 + tmp = cc; cc = ccc; ccc = tmp;
2749 +
2750 + /* round 4: left lane */
2751 + ROUND(aa, bb, cc, dd, F4, K4, in[1], 11);
2752 + ROUND(dd, aa, bb, cc, F4, K4, in[9], 12);
2753 + ROUND(cc, dd, aa, bb, F4, K4, in[11], 14);
2754 + ROUND(bb, cc, dd, aa, F4, K4, in[10], 15);
2755 + ROUND(aa, bb, cc, dd, F4, K4, in[0], 14);
2756 + ROUND(dd, aa, bb, cc, F4, K4, in[8], 15);
2757 + ROUND(cc, dd, aa, bb, F4, K4, in[12], 9);
2758 + ROUND(bb, cc, dd, aa, F4, K4, in[4], 8);
2759 + ROUND(aa, bb, cc, dd, F4, K4, in[13], 9);
2760 + ROUND(dd, aa, bb, cc, F4, K4, in[3], 14);
2761 + ROUND(cc, dd, aa, bb, F4, K4, in[7], 5);
2762 + ROUND(bb, cc, dd, aa, F4, K4, in[15], 6);
2763 + ROUND(aa, bb, cc, dd, F4, K4, in[14], 8);
2764 + ROUND(dd, aa, bb, cc, F4, K4, in[5], 6);
2765 + ROUND(cc, dd, aa, bb, F4, K4, in[6], 5);
2766 + ROUND(bb, cc, dd, aa, F4, K4, in[2], 12);
2767 +
2768 + /* round 4: right lane */
2769 + ROUND(aaa, bbb, ccc, ddd, F1, KK4, in[8], 15);
2770 + ROUND(ddd, aaa, bbb, ccc, F1, KK4, in[6], 5);
2771 + ROUND(ccc, ddd, aaa, bbb, F1, KK4, in[4], 8);
2772 + ROUND(bbb, ccc, ddd, aaa, F1, KK4, in[1], 11);
2773 + ROUND(aaa, bbb, ccc, ddd, F1, KK4, in[3], 14);
2774 + ROUND(ddd, aaa, bbb, ccc, F1, KK4, in[11], 14);
2775 + ROUND(ccc, ddd, aaa, bbb, F1, KK4, in[15], 6);
2776 + ROUND(bbb, ccc, ddd, aaa, F1, KK4, in[0], 14);
2777 + ROUND(aaa, bbb, ccc, ddd, F1, KK4, in[5], 6);
2778 + ROUND(ddd, aaa, bbb, ccc, F1, KK4, in[12], 9);
2779 + ROUND(ccc, ddd, aaa, bbb, F1, KK4, in[2], 12);
2780 + ROUND(bbb, ccc, ddd, aaa, F1, KK4, in[13], 9);
2781 + ROUND(aaa, bbb, ccc, ddd, F1, KK4, in[9], 12);
2782 + ROUND(ddd, aaa, bbb, ccc, F1, KK4, in[7], 5);
2783 + ROUND(ccc, ddd, aaa, bbb, F1, KK4, in[10], 15);
2784 + ROUND(bbb, ccc, ddd, aaa, F1, KK4, in[14], 8);
2785 +
2786 + /* Swap contents of "d" registers */
2787 + tmp = dd; dd = ddd; ddd = tmp;
2788 +
2789 + /* combine results */
2790 + state[0] += aa;
2791 + state[1] += bb;
2792 + state[2] += cc;
2793 + state[3] += dd;
2794 + state[4] += aaa;
2795 + state[5] += bbb;
2796 + state[6] += ccc;
2797 + state[7] += ddd;
2798 +
2799 + return;
2800 +}
2801 +
2802 +static void rmd256_init(struct crypto_tfm *tfm)
2803 +{
2804 + struct rmd256_ctx *rctx = crypto_tfm_ctx(tfm);
2805 +
2806 + rctx->byte_count = 0;
2807 +
2808 + rctx->state[0] = RMD_H0;
2809 + rctx->state[1] = RMD_H1;
2810 + rctx->state[2] = RMD_H2;
2811 + rctx->state[3] = RMD_H3;
2812 + rctx->state[4] = RMD_H5;
2813 + rctx->state[5] = RMD_H6;
2814 + rctx->state[6] = RMD_H7;
2815 + rctx->state[7] = RMD_H8;
2816 +
2817 + memset(rctx->buffer, 0, sizeof(rctx->buffer));
2818 +}
2819 +
2820 +static void rmd256_update(struct crypto_tfm *tfm, const u8 *data,
2821 + unsigned int len)
2822 +{
2823 + struct rmd256_ctx *rctx = crypto_tfm_ctx(tfm);
2824 + const u32 avail = sizeof(rctx->buffer) - (rctx->byte_count & 0x3f);
2825 +
2826 + rctx->byte_count += len;
2827 +
2828 + /* Enough space in buffer? If so copy and we're done */
2829 + if (avail > len) {
2830 + memcpy((char *)rctx->buffer + (sizeof(rctx->buffer) - avail),
2831 + data, len);
2832 + return;
2833 + }
2834 +
2835 + memcpy((char *)rctx->buffer + (sizeof(rctx->buffer) - avail),
2836 + data, avail);
2837 +
2838 + rmd256_transform(rctx->state, rctx->buffer);
2839 + data += avail;
2840 + len -= avail;
2841 +
2842 + while (len >= sizeof(rctx->buffer)) {
2843 + memcpy(rctx->buffer, data, sizeof(rctx->buffer));
2844 + rmd256_transform(rctx->state, rctx->buffer);
2845 + data += sizeof(rctx->buffer);
2846 + len -= sizeof(rctx->buffer);
2847 + }
2848 +
2849 + memcpy(rctx->buffer, data, len);
2850 +}
2851 +
2852 +/* Add padding and return the message digest. */
2853 +static void rmd256_final(struct crypto_tfm *tfm, u8 *out)
2854 +{
2855 + struct rmd256_ctx *rctx = crypto_tfm_ctx(tfm);
2856 + u32 i, index, padlen;
2857 + __le64 bits;
2858 + __le32 *dst = (__le32 *)out;
2859 + static const u8 padding[64] = { 0x80, };
2860 +
2861 + bits = cpu_to_le64(rctx->byte_count << 3);
2862 +
2863 + /* Pad out to 56 mod 64 */
2864 + index = rctx->byte_count & 0x3f;
2865 + padlen = (index < 56) ? (56 - index) : ((64+56) - index);
2866 + rmd256_update(tfm, padding, padlen);
2867 +
2868 + /* Append length */
2869 + rmd256_update(tfm, (const u8 *)&bits, sizeof(bits));
2870 +
2871 + /* Store state in digest */
2872 + for (i = 0; i < 8; i++)
2873 + dst[i] = cpu_to_le32p(&rctx->state[i]);
2874 +
2875 + /* Wipe context */
2876 + memset(rctx, 0, sizeof(*rctx));
2877 +}
2878 +
2879 +static struct crypto_alg alg = {
2880 + .cra_name = "rmd256",
2881 + .cra_driver_name = "rmd256",
2882 + .cra_flags = CRYPTO_ALG_TYPE_DIGEST,
2883 + .cra_blocksize = RMD256_BLOCK_SIZE,
2884 + .cra_ctxsize = sizeof(struct rmd256_ctx),
2885 + .cra_module = THIS_MODULE,
2886 + .cra_list = LIST_HEAD_INIT(alg.cra_list),
2887 + .cra_u = { .digest = {
2888 + .dia_digestsize = RMD256_DIGEST_SIZE,
2889 + .dia_init = rmd256_init,
2890 + .dia_update = rmd256_update,
2891 + .dia_final = rmd256_final } }
2892 +};
2893 +
2894 +static int __init rmd256_mod_init(void)
2895 +{
2896 + return crypto_register_alg(&alg);
2897 +}
2898 +
2899 +static void __exit rmd256_mod_fini(void)
2900 +{
2901 + crypto_unregister_alg(&alg);
2902 +}
2903 +
2904 +module_init(rmd256_mod_init);
2905 +module_exit(rmd256_mod_fini);
2906 +
2907 +MODULE_LICENSE("GPL");
2908 +MODULE_DESCRIPTION("RIPEMD-256 Message Digest");
2909 +
2910 +MODULE_ALIAS("rmd256");
2911 --- /dev/null
2912 +++ b/crypto/rmd320.c
2913 @@ -0,0 +1,393 @@
2914 +/*
2915 + * Cryptographic API.
2916 + *
2917 + * RIPEMD-320 - RACE Integrity Primitives Evaluation Message Digest.
2918 + *
2919 + * Based on the reference implementation by Antoon Bosselaers, ESAT-COSIC
2920 + *
2921 + * Copyright (c) 2008 Adrian-Ken Rueegsegger <rueegsegger (at) swiss-it.ch>
2922 + *
2923 + * This program is free software; you can redistribute it and/or modify it
2924 + * under the terms of the GNU General Public License as published by the Free
2925 + * Software Foundation; either version 2 of the License, or (at your option)
2926 + * any later version.
2927 + *
2928 + */
2929 +#include <linux/init.h>
2930 +#include <linux/module.h>
2931 +#include <linux/mm.h>
2932 +#include <linux/crypto.h>
2933 +#include <linux/cryptohash.h>
2934 +#include <linux/types.h>
2935 +#include <asm/byteorder.h>
2936 +
2937 +#include "ripemd.h"
2938 +
2939 +struct rmd320_ctx {
2940 + u64 byte_count;
2941 + u32 state[10];
2942 + __le32 buffer[16];
2943 +};
2944 +
2945 +#define K1 RMD_K1
2946 +#define K2 RMD_K2
2947 +#define K3 RMD_K3
2948 +#define K4 RMD_K4
2949 +#define K5 RMD_K5
2950 +#define KK1 RMD_K6
2951 +#define KK2 RMD_K7
2952 +#define KK3 RMD_K8
2953 +#define KK4 RMD_K9
2954 +#define KK5 RMD_K1
2955 +
2956 +#define F1(x, y, z) (x ^ y ^ z) /* XOR */
2957 +#define F2(x, y, z) (z ^ (x & (y ^ z))) /* x ? y : z */
2958 +#define F3(x, y, z) ((x | ~y) ^ z)
2959 +#define F4(x, y, z) (y ^ (z & (x ^ y))) /* z ? x : y */
2960 +#define F5(x, y, z) (x ^ (y | ~z))
2961 +
2962 +#define ROUND(a, b, c, d, e, f, k, x, s) { \
2963 + (a) += f((b), (c), (d)) + le32_to_cpup(&(x)) + (k); \
2964 + (a) = rol32((a), (s)) + (e); \
2965 + (c) = rol32((c), 10); \
2966 +}
2967 +
2968 +static void rmd320_transform(u32 *state, const __le32 *in)
2969 +{
2970 + u32 aa, bb, cc, dd, ee, aaa, bbb, ccc, ddd, eee, tmp;
2971 +
2972 + /* Initialize left lane */
2973 + aa = state[0];
2974 + bb = state[1];
2975 + cc = state[2];
2976 + dd = state[3];
2977 + ee = state[4];
2978 +
2979 + /* Initialize right lane */
2980 + aaa = state[5];
2981 + bbb = state[6];
2982 + ccc = state[7];
2983 + ddd = state[8];
2984 + eee = state[9];
2985 +
2986 + /* round 1: left lane */
2987 + ROUND(aa, bb, cc, dd, ee, F1, K1, in[0], 11);
2988 + ROUND(ee, aa, bb, cc, dd, F1, K1, in[1], 14);
2989 + ROUND(dd, ee, aa, bb, cc, F1, K1, in[2], 15);
2990 + ROUND(cc, dd, ee, aa, bb, F1, K1, in[3], 12);
2991 + ROUND(bb, cc, dd, ee, aa, F1, K1, in[4], 5);
2992 + ROUND(aa, bb, cc, dd, ee, F1, K1, in[5], 8);
2993 + ROUND(ee, aa, bb, cc, dd, F1, K1, in[6], 7);
2994 + ROUND(dd, ee, aa, bb, cc, F1, K1, in[7], 9);
2995 + ROUND(cc, dd, ee, aa, bb, F1, K1, in[8], 11);
2996 + ROUND(bb, cc, dd, ee, aa, F1, K1, in[9], 13);
2997 + ROUND(aa, bb, cc, dd, ee, F1, K1, in[10], 14);
2998 + ROUND(ee, aa, bb, cc, dd, F1, K1, in[11], 15);
2999 + ROUND(dd, ee, aa, bb, cc, F1, K1, in[12], 6);
3000 + ROUND(cc, dd, ee, aa, bb, F1, K1, in[13], 7);
3001 + ROUND(bb, cc, dd, ee, aa, F1, K1, in[14], 9);
3002 + ROUND(aa, bb, cc, dd, ee, F1, K1, in[15], 8);
3003 +
3004 + /* round 1: right lane */
3005 + ROUND(aaa, bbb, ccc, ddd, eee, F5, KK1, in[5], 8);
3006 + ROUND(eee, aaa, bbb, ccc, ddd, F5, KK1, in[14], 9);
3007 + ROUND(ddd, eee, aaa, bbb, ccc, F5, KK1, in[7], 9);
3008 + ROUND(ccc, ddd, eee, aaa, bbb, F5, KK1, in[0], 11);
3009 + ROUND(bbb, ccc, ddd, eee, aaa, F5, KK1, in[9], 13);
3010 + ROUND(aaa, bbb, ccc, ddd, eee, F5, KK1, in[2], 15);
3011 + ROUND(eee, aaa, bbb, ccc, ddd, F5, KK1, in[11], 15);
3012 + ROUND(ddd, eee, aaa, bbb, ccc, F5, KK1, in[4], 5);
3013 + ROUND(ccc, ddd, eee, aaa, bbb, F5, KK1, in[13], 7);
3014 + ROUND(bbb, ccc, ddd, eee, aaa, F5, KK1, in[6], 7);
3015 + ROUND(aaa, bbb, ccc, ddd, eee, F5, KK1, in[15], 8);
3016 + ROUND(eee, aaa, bbb, ccc, ddd, F5, KK1, in[8], 11);
3017 + ROUND(ddd, eee, aaa, bbb, ccc, F5, KK1, in[1], 14);
3018 + ROUND(ccc, ddd, eee, aaa, bbb, F5, KK1, in[10], 14);
3019 + ROUND(bbb, ccc, ddd, eee, aaa, F5, KK1, in[3], 12);
3020 + ROUND(aaa, bbb, ccc, ddd, eee, F5, KK1, in[12], 6);
3021 +
3022 + /* Swap contents of "a" registers */
3023 + tmp = aa; aa = aaa; aaa = tmp;
3024 +
3025 + /* round 2: left lane" */
3026 + ROUND(ee, aa, bb, cc, dd, F2, K2, in[7], 7);
3027 + ROUND(dd, ee, aa, bb, cc, F2, K2, in[4], 6);
3028 + ROUND(cc, dd, ee, aa, bb, F2, K2, in[13], 8);
3029 + ROUND(bb, cc, dd, ee, aa, F2, K2, in[1], 13);
3030 + ROUND(aa, bb, cc, dd, ee, F2, K2, in[10], 11);
3031 + ROUND(ee, aa, bb, cc, dd, F2, K2, in[6], 9);
3032 + ROUND(dd, ee, aa, bb, cc, F2, K2, in[15], 7);
3033 + ROUND(cc, dd, ee, aa, bb, F2, K2, in[3], 15);
3034 + ROUND(bb, cc, dd, ee, aa, F2, K2, in[12], 7);
3035 + ROUND(aa, bb, cc, dd, ee, F2, K2, in[0], 12);
3036 + ROUND(ee, aa, bb, cc, dd, F2, K2, in[9], 15);
3037 + ROUND(dd, ee, aa, bb, cc, F2, K2, in[5], 9);
3038 + ROUND(cc, dd, ee, aa, bb, F2, K2, in[2], 11);
3039 + ROUND(bb, cc, dd, ee, aa, F2, K2, in[14], 7);
3040 + ROUND(aa, bb, cc, dd, ee, F2, K2, in[11], 13);
3041 + ROUND(ee, aa, bb, cc, dd, F2, K2, in[8], 12);
3042 +
3043 + /* round 2: right lane */
3044 + ROUND(eee, aaa, bbb, ccc, ddd, F4, KK2, in[6], 9);
3045 + ROUND(ddd, eee, aaa, bbb, ccc, F4, KK2, in[11], 13);
3046 + ROUND(ccc, ddd, eee, aaa, bbb, F4, KK2, in[3], 15);
3047 + ROUND(bbb, ccc, ddd, eee, aaa, F4, KK2, in[7], 7);
3048 + ROUND(aaa, bbb, ccc, ddd, eee, F4, KK2, in[0], 12);
3049 + ROUND(eee, aaa, bbb, ccc, ddd, F4, KK2, in[13], 8);
3050 + ROUND(ddd, eee, aaa, bbb, ccc, F4, KK2, in[5], 9);
3051 + ROUND(ccc, ddd, eee, aaa, bbb, F4, KK2, in[10], 11);
3052 + ROUND(bbb, ccc, ddd, eee, aaa, F4, KK2, in[14], 7);
3053 + ROUND(aaa, bbb, ccc, ddd, eee, F4, KK2, in[15], 7);
3054 + ROUND(eee, aaa, bbb, ccc, ddd, F4, KK2, in[8], 12);
3055 + ROUND(ddd, eee, aaa, bbb, ccc, F4, KK2, in[12], 7);
3056 + ROUND(ccc, ddd, eee, aaa, bbb, F4, KK2, in[4], 6);
3057 + ROUND(bbb, ccc, ddd, eee, aaa, F4, KK2, in[9], 15);
3058 + ROUND(aaa, bbb, ccc, ddd, eee, F4, KK2, in[1], 13);
3059 + ROUND(eee, aaa, bbb, ccc, ddd, F4, KK2, in[2], 11);
3060 +
3061 + /* Swap contents of "b" registers */
3062 + tmp = bb; bb = bbb; bbb = tmp;
3063 +
3064 + /* round 3: left lane" */
3065 + ROUND(dd, ee, aa, bb, cc, F3, K3, in[3], 11);
3066 + ROUND(cc, dd, ee, aa, bb, F3, K3, in[10], 13);
3067 + ROUND(bb, cc, dd, ee, aa, F3, K3, in[14], 6);
3068 + ROUND(aa, bb, cc, dd, ee, F3, K3, in[4], 7);
3069 + ROUND(ee, aa, bb, cc, dd, F3, K3, in[9], 14);
3070 + ROUND(dd, ee, aa, bb, cc, F3, K3, in[15], 9);
3071 + ROUND(cc, dd, ee, aa, bb, F3, K3, in[8], 13);
3072 + ROUND(bb, cc, dd, ee, aa, F3, K3, in[1], 15);
3073 + ROUND(aa, bb, cc, dd, ee, F3, K3, in[2], 14);
3074 + ROUND(ee, aa, bb, cc, dd, F3, K3, in[7], 8);
3075 + ROUND(dd, ee, aa, bb, cc, F3, K3, in[0], 13);
3076 + ROUND(cc, dd, ee, aa, bb, F3, K3, in[6], 6);
3077 + ROUND(bb, cc, dd, ee, aa, F3, K3, in[13], 5);
3078 + ROUND(aa, bb, cc, dd, ee, F3, K3, in[11], 12);
3079 + ROUND(ee, aa, bb, cc, dd, F3, K3, in[5], 7);
3080 + ROUND(dd, ee, aa, bb, cc, F3, K3, in[12], 5);
3081 +
3082 + /* round 3: right lane */
3083 + ROUND(ddd, eee, aaa, bbb, ccc, F3, KK3, in[15], 9);
3084 + ROUND(ccc, ddd, eee, aaa, bbb, F3, KK3, in[5], 7);
3085 + ROUND(bbb, ccc, ddd, eee, aaa, F3, KK3, in[1], 15);
3086 + ROUND(aaa, bbb, ccc, ddd, eee, F3, KK3, in[3], 11);
3087 + ROUND(eee, aaa, bbb, ccc, ddd, F3, KK3, in[7], 8);
3088 + ROUND(ddd, eee, aaa, bbb, ccc, F3, KK3, in[14], 6);
3089 + ROUND(ccc, ddd, eee, aaa, bbb, F3, KK3, in[6], 6);
3090 + ROUND(bbb, ccc, ddd, eee, aaa, F3, KK3, in[9], 14);
3091 + ROUND(aaa, bbb, ccc, ddd, eee, F3, KK3, in[11], 12);
3092 + ROUND(eee, aaa, bbb, ccc, ddd, F3, KK3, in[8], 13);
3093 + ROUND(ddd, eee, aaa, bbb, ccc, F3, KK3, in[12], 5);
3094 + ROUND(ccc, ddd, eee, aaa, bbb, F3, KK3, in[2], 14);
3095 + ROUND(bbb, ccc, ddd, eee, aaa, F3, KK3, in[10], 13);
3096 + ROUND(aaa, bbb, ccc, ddd, eee, F3, KK3, in[0], 13);
3097 + ROUND(eee, aaa, bbb, ccc, ddd, F3, KK3, in[4], 7);
3098 + ROUND(ddd, eee, aaa, bbb, ccc, F3, KK3, in[13], 5);
3099 +
3100 + /* Swap contents of "c" registers */
3101 + tmp = cc; cc = ccc; ccc = tmp;
3102 +
3103 + /* round 4: left lane" */
3104 + ROUND(cc, dd, ee, aa, bb, F4, K4, in[1], 11);
3105 + ROUND(bb, cc, dd, ee, aa, F4, K4, in[9], 12);
3106 + ROUND(aa, bb, cc, dd, ee, F4, K4, in[11], 14);
3107 + ROUND(ee, aa, bb, cc, dd, F4, K4, in[10], 15);
3108 + ROUND(dd, ee, aa, bb, cc, F4, K4, in[0], 14);
3109 + ROUND(cc, dd, ee, aa, bb, F4, K4, in[8], 15);
3110 + ROUND(bb, cc, dd, ee, aa, F4, K4, in[12], 9);
3111 + ROUND(aa, bb, cc, dd, ee, F4, K4, in[4], 8);
3112 + ROUND(ee, aa, bb, cc, dd, F4, K4, in[13], 9);
3113 + ROUND(dd, ee, aa, bb, cc, F4, K4, in[3], 14);
3114 + ROUND(cc, dd, ee, aa, bb, F4, K4, in[7], 5);
3115 + ROUND(bb, cc, dd, ee, aa, F4, K4, in[15], 6);
3116 + ROUND(aa, bb, cc, dd, ee, F4, K4, in[14], 8);
3117 + ROUND(ee, aa, bb, cc, dd, F4, K4, in[5], 6);
3118 + ROUND(dd, ee, aa, bb, cc, F4, K4, in[6], 5);
3119 + ROUND(cc, dd, ee, aa, bb, F4, K4, in[2], 12);
3120 +
3121 + /* round 4: right lane */
3122 + ROUND(ccc, ddd, eee, aaa, bbb, F2, KK4, in[8], 15);
3123 + ROUND(bbb, ccc, ddd, eee, aaa, F2, KK4, in[6], 5);
3124 + ROUND(aaa, bbb, ccc, ddd, eee, F2, KK4, in[4], 8);
3125 + ROUND(eee, aaa, bbb, ccc, ddd, F2, KK4, in[1], 11);
3126 + ROUND(ddd, eee, aaa, bbb, ccc, F2, KK4, in[3], 14);
3127 + ROUND(ccc, ddd, eee, aaa, bbb, F2, KK4, in[11], 14);
3128 + ROUND(bbb, ccc, ddd, eee, aaa, F2, KK4, in[15], 6);
3129 + ROUND(aaa, bbb, ccc, ddd, eee, F2, KK4, in[0], 14);
3130 + ROUND(eee, aaa, bbb, ccc, ddd, F2, KK4, in[5], 6);
3131 + ROUND(ddd, eee, aaa, bbb, ccc, F2, KK4, in[12], 9);
3132 + ROUND(ccc, ddd, eee, aaa, bbb, F2, KK4, in[2], 12);
3133 + ROUND(bbb, ccc, ddd, eee, aaa, F2, KK4, in[13], 9);
3134 + ROUND(aaa, bbb, ccc, ddd, eee, F2, KK4, in[9], 12);
3135 + ROUND(eee, aaa, bbb, ccc, ddd, F2, KK4, in[7], 5);
3136 + ROUND(ddd, eee, aaa, bbb, ccc, F2, KK4, in[10], 15);
3137 + ROUND(ccc, ddd, eee, aaa, bbb, F2, KK4, in[14], 8);
3138 +
3139 + /* Swap contents of "d" registers */
3140 + tmp = dd; dd = ddd; ddd = tmp;
3141 +
3142 + /* round 5: left lane" */
3143 + ROUND(bb, cc, dd, ee, aa, F5, K5, in[4], 9);
3144 + ROUND(aa, bb, cc, dd, ee, F5, K5, in[0], 15);
3145 + ROUND(ee, aa, bb, cc, dd, F5, K5, in[5], 5);
3146 + ROUND(dd, ee, aa, bb, cc, F5, K5, in[9], 11);
3147 + ROUND(cc, dd, ee, aa, bb, F5, K5, in[7], 6);
3148 + ROUND(bb, cc, dd, ee, aa, F5, K5, in[12], 8);
3149 + ROUND(aa, bb, cc, dd, ee, F5, K5, in[2], 13);
3150 + ROUND(ee, aa, bb, cc, dd, F5, K5, in[10], 12);
3151 + ROUND(dd, ee, aa, bb, cc, F5, K5, in[14], 5);
3152 + ROUND(cc, dd, ee, aa, bb, F5, K5, in[1], 12);
3153 + ROUND(bb, cc, dd, ee, aa, F5, K5, in[3], 13);
3154 + ROUND(aa, bb, cc, dd, ee, F5, K5, in[8], 14);
3155 + ROUND(ee, aa, bb, cc, dd, F5, K5, in[11], 11);
3156 + ROUND(dd, ee, aa, bb, cc, F5, K5, in[6], 8);
3157 + ROUND(cc, dd, ee, aa, bb, F5, K5, in[15], 5);
3158 + ROUND(bb, cc, dd, ee, aa, F5, K5, in[13], 6);
3159 +
3160 + /* round 5: right lane */
3161 + ROUND(bbb, ccc, ddd, eee, aaa, F1, KK5, in[12], 8);
3162 + ROUND(aaa, bbb, ccc, ddd, eee, F1, KK5, in[15], 5);
3163 + ROUND(eee, aaa, bbb, ccc, ddd, F1, KK5, in[10], 12);
3164 + ROUND(ddd, eee, aaa, bbb, ccc, F1, KK5, in[4], 9);
3165 + ROUND(ccc, ddd, eee, aaa, bbb, F1, KK5, in[1], 12);
3166 + ROUND(bbb, ccc, ddd, eee, aaa, F1, KK5, in[5], 5);
3167 + ROUND(aaa, bbb, ccc, ddd, eee, F1, KK5, in[8], 14);
3168 + ROUND(eee, aaa, bbb, ccc, ddd, F1, KK5, in[7], 6);
3169 + ROUND(ddd, eee, aaa, bbb, ccc, F1, KK5, in[6], 8);
3170 + ROUND(ccc, ddd, eee, aaa, bbb, F1, KK5, in[2], 13);
3171 + ROUND(bbb, ccc, ddd, eee, aaa, F1, KK5, in[13], 6);
3172 + ROUND(aaa, bbb, ccc, ddd, eee, F1, KK5, in[14], 5);
3173 + ROUND(eee, aaa, bbb, ccc, ddd, F1, KK5, in[0], 15);
3174 + ROUND(ddd, eee, aaa, bbb, ccc, F1, KK5, in[3], 13);
3175 + ROUND(ccc, ddd, eee, aaa, bbb, F1, KK5, in[9], 11);
3176 + ROUND(bbb, ccc, ddd, eee, aaa, F1, KK5, in[11], 11);
3177 +
3178 + /* Swap contents of "e" registers */
3179 + tmp = ee; ee = eee; eee = tmp;
3180 +
3181 + /* combine results */
3182 + state[0] += aa;
3183 + state[1] += bb;
3184 + state[2] += cc;
3185 + state[3] += dd;
3186 + state[4] += ee;
3187 + state[5] += aaa;
3188 + state[6] += bbb;
3189 + state[7] += ccc;
3190 + state[8] += ddd;
3191 + state[9] += eee;
3192 +
3193 + return;
3194 +}
3195 +
3196 +static void rmd320_init(struct crypto_tfm *tfm)
3197 +{
3198 + struct rmd320_ctx *rctx = crypto_tfm_ctx(tfm);
3199 +
3200 + rctx->byte_count = 0;
3201 +
3202 + rctx->state[0] = RMD_H0;
3203 + rctx->state[1] = RMD_H1;
3204 + rctx->state[2] = RMD_H2;
3205 + rctx->state[3] = RMD_H3;
3206 + rctx->state[4] = RMD_H4;
3207 + rctx->state[5] = RMD_H5;
3208 + rctx->state[6] = RMD_H6;
3209 + rctx->state[7] = RMD_H7;
3210 + rctx->state[8] = RMD_H8;
3211 + rctx->state[9] = RMD_H9;
3212 +
3213 + memset(rctx->buffer, 0, sizeof(rctx->buffer));
3214 +}
3215 +
3216 +static void rmd320_update(struct crypto_tfm *tfm, const u8 *data,
3217 + unsigned int len)
3218 +{
3219 + struct rmd320_ctx *rctx = crypto_tfm_ctx(tfm);
3220 + const u32 avail = sizeof(rctx->buffer) - (rctx->byte_count & 0x3f);
3221 +
3222 + rctx->byte_count += len;
3223 +
3224 + /* Enough space in buffer? If so copy and we're done */
3225 + if (avail > len) {
3226 + memcpy((char *)rctx->buffer + (sizeof(rctx->buffer) - avail),
3227 + data, len);
3228 + return;
3229 + }
3230 +
3231 + memcpy((char *)rctx->buffer + (sizeof(rctx->buffer) - avail),
3232 + data, avail);
3233 +
3234 + rmd320_transform(rctx->state, rctx->buffer);
3235 + data += avail;
3236 + len -= avail;
3237 +
3238 + while (len >= sizeof(rctx->buffer)) {
3239 + memcpy(rctx->buffer, data, sizeof(rctx->buffer));
3240 + rmd320_transform(rctx->state, rctx->buffer);
3241 + data += sizeof(rctx->buffer);
3242 + len -= sizeof(rctx->buffer);
3243 + }
3244 +
3245 + memcpy(rctx->buffer, data, len);
3246 +}
3247 +
3248 +/* Add padding and return the message digest. */
3249 +static void rmd320_final(struct crypto_tfm *tfm, u8 *out)
3250 +{
3251 + struct rmd320_ctx *rctx = crypto_tfm_ctx(tfm);
3252 + u32 i, index, padlen;
3253 + __le64 bits;
3254 + __le32 *dst = (__le32 *)out;
3255 + static const u8 padding[64] = { 0x80, };
3256 +
3257 + bits = cpu_to_le64(rctx->byte_count << 3);
3258 +
3259 + /* Pad out to 56 mod 64 */
3260 + index = rctx->byte_count & 0x3f;
3261 + padlen = (index < 56) ? (56 - index) : ((64+56) - index);
3262 + rmd320_update(tfm, padding, padlen);
3263 +
3264 + /* Append length */
3265 + rmd320_update(tfm, (const u8 *)&bits, sizeof(bits));
3266 +
3267 + /* Store state in digest */
3268 + for (i = 0; i < 10; i++)
3269 + dst[i] = cpu_to_le32p(&rctx->state[i]);
3270 +
3271 + /* Wipe context */
3272 + memset(rctx, 0, sizeof(*rctx));
3273 +}
3274 +
3275 +static struct crypto_alg alg = {
3276 + .cra_name = "rmd320",
3277 + .cra_driver_name = "rmd320",
3278 + .cra_flags = CRYPTO_ALG_TYPE_DIGEST,
3279 + .cra_blocksize = RMD320_BLOCK_SIZE,
3280 + .cra_ctxsize = sizeof(struct rmd320_ctx),
3281 + .cra_module = THIS_MODULE,
3282 + .cra_list = LIST_HEAD_INIT(alg.cra_list),
3283 + .cra_u = { .digest = {
3284 + .dia_digestsize = RMD320_DIGEST_SIZE,
3285 + .dia_init = rmd320_init,
3286 + .dia_update = rmd320_update,
3287 + .dia_final = rmd320_final } }
3288 +};
3289 +
3290 +static int __init rmd320_mod_init(void)
3291 +{
3292 + return crypto_register_alg(&alg);
3293 +}
3294 +
3295 +static void __exit rmd320_mod_fini(void)
3296 +{
3297 + crypto_unregister_alg(&alg);
3298 +}
3299 +
3300 +module_init(rmd320_mod_init);
3301 +module_exit(rmd320_mod_fini);
3302 +
3303 +MODULE_LICENSE("GPL");
3304 +MODULE_DESCRIPTION("RIPEMD-320 Message Digest");
3305 +
3306 +MODULE_ALIAS("rmd320");
3307 --- a/crypto/tcrypt.c
3308 +++ b/crypto/tcrypt.c
3309 @@ -13,15 +13,9 @@
3310 * Software Foundation; either version 2 of the License, or (at your option)
3311 * any later version.
3312 *
3313 - * 2007-11-13 Added GCM tests
3314 - * 2007-11-13 Added AEAD support
3315 - * 2007-11-06 Added SHA-224 and SHA-224-HMAC tests
3316 - * 2006-12-07 Added SHA384 HMAC and SHA512 HMAC tests
3317 - * 2004-08-09 Added cipher speed tests (Reyk Floeter <reyk@vantronix.net>)
3318 - * 2003-09-14 Rewritten by Kartikey Mahendra Bhatt
3319 - *
3320 */
3321
3322 +#include <crypto/hash.h>
3323 #include <linux/err.h>
3324 #include <linux/init.h>
3325 #include <linux/module.h>
3326 @@ -30,7 +24,6 @@
3327 #include <linux/scatterlist.h>
3328 #include <linux/string.h>
3329 #include <linux/crypto.h>
3330 -#include <linux/highmem.h>
3331 #include <linux/moduleparam.h>
3332 #include <linux/jiffies.h>
3333 #include <linux/timex.h>
3334 @@ -38,7 +31,7 @@
3335 #include "tcrypt.h"
3336
3337 /*
3338 - * Need to kmalloc() memory for testing kmap().
3339 + * Need to kmalloc() memory for testing.
3340 */
3341 #define TVMEMSIZE 16384
3342 #define XBUFSIZE 32768
3343 @@ -46,7 +39,7 @@
3344 /*
3345 * Indexes into the xbuf to simulate cross-page access.
3346 */
3347 -#define IDX1 37
3348 +#define IDX1 32
3349 #define IDX2 32400
3350 #define IDX3 1
3351 #define IDX4 8193
3352 @@ -83,7 +76,8 @@
3353 "blowfish", "twofish", "serpent", "sha384", "sha512", "md4", "aes",
3354 "cast6", "arc4", "michael_mic", "deflate", "crc32c", "tea", "xtea",
3355 "khazad", "wp512", "wp384", "wp256", "tnepres", "xeta", "fcrypt",
3356 - "camellia", "seed", "salsa20", "lzo", "cts", NULL
3357 + "camellia", "seed", "salsa20", "rmd128", "rmd160", "rmd256", "rmd320",
3358 + "lzo", "cts", NULL
3359 };
3360
3361 static void hexdump(unsigned char *buf, unsigned int len)
3362 @@ -110,22 +104,30 @@
3363 unsigned int i, j, k, temp;
3364 struct scatterlist sg[8];
3365 char result[64];
3366 - struct crypto_hash *tfm;
3367 - struct hash_desc desc;
3368 + struct crypto_ahash *tfm;
3369 + struct ahash_request *req;
3370 + struct tcrypt_result tresult;
3371 int ret;
3372 void *hash_buff;
3373
3374 printk("\ntesting %s\n", algo);
3375
3376 - tfm = crypto_alloc_hash(algo, 0, CRYPTO_ALG_ASYNC);
3377 + init_completion(&tresult.completion);
3378 +
3379 + tfm = crypto_alloc_ahash(algo, 0, 0);
3380 if (IS_ERR(tfm)) {
3381 printk("failed to load transform for %s: %ld\n", algo,
3382 PTR_ERR(tfm));
3383 return;
3384 }
3385
3386 - desc.tfm = tfm;
3387 - desc.flags = 0;
3388 + req = ahash_request_alloc(tfm, GFP_KERNEL);
3389 + if (!req) {
3390 + printk(KERN_ERR "failed to allocate request for %s\n", algo);
3391 + goto out_noreq;
3392 + }
3393 + ahash_request_set_callback(req, CRYPTO_TFM_REQ_MAY_BACKLOG,
3394 + tcrypt_complete, &tresult);
3395
3396 for (i = 0; i < tcount; i++) {
3397 printk("test %u:\n", i + 1);
3398 @@ -139,8 +141,9 @@
3399 sg_init_one(&sg[0], hash_buff, template[i].psize);
3400
3401 if (template[i].ksize) {
3402 - ret = crypto_hash_setkey(tfm, template[i].key,
3403 - template[i].ksize);
3404 + crypto_ahash_clear_flags(tfm, ~0);
3405 + ret = crypto_ahash_setkey(tfm, template[i].key,
3406 + template[i].ksize);
3407 if (ret) {
3408 printk("setkey() failed ret=%d\n", ret);
3409 kfree(hash_buff);
3410 @@ -148,17 +151,30 @@
3411 }
3412 }
3413
3414 - ret = crypto_hash_digest(&desc, sg, template[i].psize, result);
3415 - if (ret) {
3416 + ahash_request_set_crypt(req, sg, result, template[i].psize);
3417 + ret = crypto_ahash_digest(req);
3418 + switch (ret) {
3419 + case 0:
3420 + break;
3421 + case -EINPROGRESS:
3422 + case -EBUSY:
3423 + ret = wait_for_completion_interruptible(
3424 + &tresult.completion);
3425 + if (!ret && !(ret = tresult.err)) {
3426 + INIT_COMPLETION(tresult.completion);
3427 + break;
3428 + }
3429 + /* fall through */
3430 + default:
3431 printk("digest () failed ret=%d\n", ret);
3432 kfree(hash_buff);
3433 goto out;
3434 }
3435
3436 - hexdump(result, crypto_hash_digestsize(tfm));
3437 + hexdump(result, crypto_ahash_digestsize(tfm));
3438 printk("%s\n",
3439 memcmp(result, template[i].digest,
3440 - crypto_hash_digestsize(tfm)) ?
3441 + crypto_ahash_digestsize(tfm)) ?
3442 "fail" : "pass");
3443 kfree(hash_buff);
3444 }
3445 @@ -187,8 +203,9 @@
3446 }
3447
3448 if (template[i].ksize) {
3449 - ret = crypto_hash_setkey(tfm, template[i].key,
3450 - template[i].ksize);
3451 + crypto_ahash_clear_flags(tfm, ~0);
3452 + ret = crypto_ahash_setkey(tfm, template[i].key,
3453 + template[i].ksize);
3454
3455 if (ret) {
3456 printk("setkey() failed ret=%d\n", ret);
3457 @@ -196,29 +213,44 @@
3458 }
3459 }
3460
3461 - ret = crypto_hash_digest(&desc, sg, template[i].psize,
3462 - result);
3463 - if (ret) {
3464 + ahash_request_set_crypt(req, sg, result,
3465 + template[i].psize);
3466 + ret = crypto_ahash_digest(req);
3467 + switch (ret) {
3468 + case 0:
3469 + break;
3470 + case -EINPROGRESS:
3471 + case -EBUSY:
3472 + ret = wait_for_completion_interruptible(
3473 + &tresult.completion);
3474 + if (!ret && !(ret = tresult.err)) {
3475 + INIT_COMPLETION(tresult.completion);
3476 + break;
3477 + }
3478 + /* fall through */
3479 + default:
3480 printk("digest () failed ret=%d\n", ret);
3481 goto out;
3482 }
3483
3484 - hexdump(result, crypto_hash_digestsize(tfm));
3485 + hexdump(result, crypto_ahash_digestsize(tfm));
3486 printk("%s\n",
3487 memcmp(result, template[i].digest,
3488 - crypto_hash_digestsize(tfm)) ?
3489 + crypto_ahash_digestsize(tfm)) ?
3490 "fail" : "pass");
3491 }
3492 }
3493
3494 out:
3495 - crypto_free_hash(tfm);
3496 + ahash_request_free(req);
3497 +out_noreq:
3498 + crypto_free_ahash(tfm);
3499 }
3500
3501 static void test_aead(char *algo, int enc, struct aead_testvec *template,
3502 unsigned int tcount)
3503 {
3504 - unsigned int ret, i, j, k, temp;
3505 + unsigned int ret, i, j, k, n, temp;
3506 char *q;
3507 struct crypto_aead *tfm;
3508 char *key;
3509 @@ -344,13 +376,12 @@
3510 goto next_one;
3511 }
3512
3513 - q = kmap(sg_page(&sg[0])) + sg[0].offset;
3514 + q = input;
3515 hexdump(q, template[i].rlen);
3516
3517 printk(KERN_INFO "enc/dec: %s\n",
3518 memcmp(q, template[i].result,
3519 template[i].rlen) ? "fail" : "pass");
3520 - kunmap(sg_page(&sg[0]));
3521 next_one:
3522 if (!template[i].key)
3523 kfree(key);
3524 @@ -360,7 +391,6 @@
3525 }
3526
3527 printk(KERN_INFO "\ntesting %s %s across pages (chunking)\n", algo, e);
3528 - memset(xbuf, 0, XBUFSIZE);
3529 memset(axbuf, 0, XBUFSIZE);
3530
3531 for (i = 0, j = 0; i < tcount; i++) {
3532 @@ -388,6 +418,7 @@
3533 goto out;
3534 }
3535
3536 + memset(xbuf, 0, XBUFSIZE);
3537 sg_init_table(sg, template[i].np);
3538 for (k = 0, temp = 0; k < template[i].np; k++) {
3539 memcpy(&xbuf[IDX[k]],
3540 @@ -450,7 +481,7 @@
3541
3542 for (k = 0, temp = 0; k < template[i].np; k++) {
3543 printk(KERN_INFO "page %u\n", k);
3544 - q = kmap(sg_page(&sg[k])) + sg[k].offset;
3545 + q = &axbuf[IDX[k]];
3546 hexdump(q, template[i].tap[k]);
3547 printk(KERN_INFO "%s\n",
3548 memcmp(q, template[i].result + temp,
3549 @@ -459,8 +490,15 @@
3550 0 : authsize)) ?
3551 "fail" : "pass");
3552
3553 + for (n = 0; q[template[i].tap[k] + n]; n++)
3554 + ;
3555 + if (n) {
3556 + printk("Result buffer corruption %u "
3557 + "bytes:\n", n);
3558 + hexdump(&q[template[i].tap[k]], n);
3559 + }
3560 +
3561 temp += template[i].tap[k];
3562 - kunmap(sg_page(&sg[k]));
3563 }
3564 }
3565 }
3566 @@ -473,7 +511,7 @@
3567 static void test_cipher(char *algo, int enc,
3568 struct cipher_testvec *template, unsigned int tcount)
3569 {
3570 - unsigned int ret, i, j, k, temp;
3571 + unsigned int ret, i, j, k, n, temp;
3572 char *q;
3573 struct crypto_ablkcipher *tfm;
3574 struct ablkcipher_request *req;
3575 @@ -569,19 +607,17 @@
3576 goto out;
3577 }
3578
3579 - q = kmap(sg_page(&sg[0])) + sg[0].offset;
3580 + q = data;
3581 hexdump(q, template[i].rlen);
3582
3583 printk("%s\n",
3584 memcmp(q, template[i].result,
3585 template[i].rlen) ? "fail" : "pass");
3586 - kunmap(sg_page(&sg[0]));
3587 }
3588 kfree(data);
3589 }
3590
3591 printk("\ntesting %s %s across pages (chunking)\n", algo, e);
3592 - memset(xbuf, 0, XBUFSIZE);
3593
3594 j = 0;
3595 for (i = 0; i < tcount; i++) {
3596 @@ -602,6 +638,7 @@
3597 printk("test %u (%d bit key):\n",
3598 j, template[i].klen * 8);
3599
3600 + memset(xbuf, 0, XBUFSIZE);
3601 crypto_ablkcipher_clear_flags(tfm, ~0);
3602 if (template[i].wk)
3603 crypto_ablkcipher_set_flags(
3604 @@ -657,14 +694,21 @@
3605 temp = 0;
3606 for (k = 0; k < template[i].np; k++) {
3607 printk("page %u\n", k);
3608 - q = kmap(sg_page(&sg[k])) + sg[k].offset;
3609 + q = &xbuf[IDX[k]];
3610 hexdump(q, template[i].tap[k]);
3611 printk("%s\n",
3612 memcmp(q, template[i].result + temp,
3613 template[i].tap[k]) ? "fail" :
3614 "pass");
3615 +
3616 + for (n = 0; q[template[i].tap[k] + n]; n++)
3617 + ;
3618 + if (n) {
3619 + printk("Result buffer corruption %u "
3620 + "bytes:\n", n);
3621 + hexdump(&q[template[i].tap[k]], n);
3622 + }
3623 temp += template[i].tap[k];
3624 - kunmap(sg_page(&sg[k]));
3625 }
3626 }
3627 }
3628 @@ -1180,6 +1224,14 @@
3629 test_cipher("ecb(des3_ede)", DECRYPT, des3_ede_dec_tv_template,
3630 DES3_EDE_DEC_TEST_VECTORS);
3631
3632 + test_cipher("cbc(des3_ede)", ENCRYPT,
3633 + des3_ede_cbc_enc_tv_template,
3634 + DES3_EDE_CBC_ENC_TEST_VECTORS);
3635 +
3636 + test_cipher("cbc(des3_ede)", DECRYPT,
3637 + des3_ede_cbc_dec_tv_template,
3638 + DES3_EDE_CBC_DEC_TEST_VECTORS);
3639 +
3640 test_hash("md4", md4_tv_template, MD4_TEST_VECTORS);
3641
3642 test_hash("sha224", sha224_tv_template, SHA224_TEST_VECTORS);
3643 @@ -1390,6 +1442,14 @@
3644 DES3_EDE_ENC_TEST_VECTORS);
3645 test_cipher("ecb(des3_ede)", DECRYPT, des3_ede_dec_tv_template,
3646 DES3_EDE_DEC_TEST_VECTORS);
3647 +
3648 + test_cipher("cbc(des3_ede)", ENCRYPT,
3649 + des3_ede_cbc_enc_tv_template,
3650 + DES3_EDE_CBC_ENC_TEST_VECTORS);
3651 +
3652 + test_cipher("cbc(des3_ede)", DECRYPT,
3653 + des3_ede_cbc_dec_tv_template,
3654 + DES3_EDE_CBC_DEC_TEST_VECTORS);
3655 break;
3656
3657 case 5:
3658 @@ -1558,7 +1618,7 @@
3659 case 29:
3660 test_hash("tgr128", tgr128_tv_template, TGR128_TEST_VECTORS);
3661 break;
3662 -
3663 +
3664 case 30:
3665 test_cipher("ecb(xeta)", ENCRYPT, xeta_enc_tv_template,
3666 XETA_ENC_TEST_VECTORS);
3667 @@ -1623,6 +1683,22 @@
3668 CTS_MODE_DEC_TEST_VECTORS);
3669 break;
3670
3671 + case 39:
3672 + test_hash("rmd128", rmd128_tv_template, RMD128_TEST_VECTORS);
3673 + break;
3674 +
3675 + case 40:
3676 + test_hash("rmd160", rmd160_tv_template, RMD160_TEST_VECTORS);
3677 + break;
3678 +
3679 + case 41:
3680 + test_hash("rmd256", rmd256_tv_template, RMD256_TEST_VECTORS);
3681 + break;
3682 +
3683 + case 42:
3684 + test_hash("rmd320", rmd320_tv_template, RMD320_TEST_VECTORS);
3685 + break;
3686 +
3687 case 100:
3688 test_hash("hmac(md5)", hmac_md5_tv_template,
3689 HMAC_MD5_TEST_VECTORS);
3690 @@ -1658,6 +1734,16 @@
3691 XCBC_AES_TEST_VECTORS);
3692 break;
3693
3694 + case 107:
3695 + test_hash("hmac(rmd128)", hmac_rmd128_tv_template,
3696 + HMAC_RMD128_TEST_VECTORS);
3697 + break;
3698 +
3699 + case 108:
3700 + test_hash("hmac(rmd160)", hmac_rmd160_tv_template,
3701 + HMAC_RMD160_TEST_VECTORS);
3702 + break;
3703 +
3704 case 200:
3705 test_cipher_speed("ecb(aes)", ENCRYPT, sec, NULL, 0,
3706 speed_template_16_24_32);
3707 @@ -1796,6 +1882,22 @@
3708 test_hash_speed("sha224", sec, generic_hash_speed_template);
3709 if (mode > 300 && mode < 400) break;
3710
3711 + case 314:
3712 + test_hash_speed("rmd128", sec, generic_hash_speed_template);
3713 + if (mode > 300 && mode < 400) break;
3714 +
3715 + case 315:
3716 + test_hash_speed("rmd160", sec, generic_hash_speed_template);
3717 + if (mode > 300 && mode < 400) break;
3718 +
3719 + case 316:
3720 + test_hash_speed("rmd256", sec, generic_hash_speed_template);
3721 + if (mode > 300 && mode < 400) break;
3722 +
3723 + case 317:
3724 + test_hash_speed("rmd320", sec, generic_hash_speed_template);
3725 + if (mode > 300 && mode < 400) break;
3726 +
3727 case 399:
3728 break;
3729
3730 --- a/crypto/tcrypt.h
3731 +++ b/crypto/tcrypt.h
3732 @@ -13,12 +13,6 @@
3733 * Software Foundation; either version 2 of the License, or (at your option)
3734 * any later version.
3735 *
3736 - * 2007-11-13 Added GCM tests
3737 - * 2007-11-13 Added AEAD support
3738 - * 2006-12-07 Added SHA384 HMAC and SHA512 HMAC tests
3739 - * 2004-08-09 Cipher speed tests by Reyk Floeter <reyk@vantronix.net>
3740 - * 2003-09-14 Changes by Kartikey Mahendra Bhatt
3741 - *
3742 */
3743 #ifndef _CRYPTO_TCRYPT_H
3744 #define _CRYPTO_TCRYPT_H
3745 @@ -168,6 +162,271 @@
3746 .digest = "\x57\xed\xf4\xa2\x2b\xe3\xc9\x55"
3747 "\xac\x49\xda\x2e\x21\x07\xb6\x7a",
3748 }
3749 +
3750 +};
3751 +
3752 +/*
3753 + * RIPEMD-128 test vectors from ISO/IEC 10118-3:2004(E)
3754 + */
3755 +#define RMD128_TEST_VECTORS 10
3756 +
3757 +static struct hash_testvec rmd128_tv_template[] = {
3758 + {
3759 + .digest = "\xcd\xf2\x62\x13\xa1\x50\xdc\x3e"
3760 + "\xcb\x61\x0f\x18\xf6\xb3\x8b\x46",
3761 + }, {
3762 + .plaintext = "a",
3763 + .psize = 1,
3764 + .digest = "\x86\xbe\x7a\xfa\x33\x9d\x0f\xc7"
3765 + "\xcf\xc7\x85\xe7\x2f\x57\x8d\x33",
3766 + }, {
3767 + .plaintext = "abc",
3768 + .psize = 3,
3769 + .digest = "\xc1\x4a\x12\x19\x9c\x66\xe4\xba"
3770 + "\x84\x63\x6b\x0f\x69\x14\x4c\x77",
3771 + }, {
3772 + .plaintext = "message digest",
3773 + .psize = 14,
3774 + .digest = "\x9e\x32\x7b\x3d\x6e\x52\x30\x62"
3775 + "\xaf\xc1\x13\x2d\x7d\xf9\xd1\xb8",
3776 + }, {
3777 + .plaintext = "abcdefghijklmnopqrstuvwxyz",
3778 + .psize = 26,
3779 + .digest = "\xfd\x2a\xa6\x07\xf7\x1d\xc8\xf5"
3780 + "\x10\x71\x49\x22\xb3\x71\x83\x4e",
3781 + }, {
3782 + .plaintext = "ABCDEFGHIJKLMNOPQRSTUVWXYZabcde"
3783 + "fghijklmnopqrstuvwxyz0123456789",
3784 + .psize = 62,
3785 + .digest = "\xd1\xe9\x59\xeb\x17\x9c\x91\x1f"
3786 + "\xae\xa4\x62\x4c\x60\xc5\xc7\x02",
3787 + }, {
3788 + .plaintext = "1234567890123456789012345678901234567890"
3789 + "1234567890123456789012345678901234567890",
3790 + .psize = 80,
3791 + .digest = "\x3f\x45\xef\x19\x47\x32\xc2\xdb"
3792 + "\xb2\xc4\xa2\xc7\x69\x79\x5f\xa3",
3793 + }, {
3794 + .plaintext = "abcdbcdecdefdefgefghfghighij"
3795 + "hijkijkljklmklmnlmnomnopnopq",
3796 + .psize = 56,
3797 + .digest = "\xa1\xaa\x06\x89\xd0\xfa\xfa\x2d"
3798 + "\xdc\x22\xe8\x8b\x49\x13\x3a\x06",
3799 + .np = 2,
3800 + .tap = { 28, 28 },
3801 + }, {
3802 + .plaintext = "abcdefghbcdefghicdefghijdefghijkefghijklfghi"
3803 + "jklmghijklmnhijklmnoijklmnopjklmnopqklmnopqr"
3804 + "lmnopqrsmnopqrstnopqrstu",
3805 + .psize = 112,
3806 + .digest = "\xd4\xec\xc9\x13\xe1\xdf\x77\x6b"
3807 + "\xf4\x8d\xe9\xd5\x5b\x1f\x25\x46",
3808 + }, {
3809 + .plaintext = "abcdbcdecdefdefgefghfghighijhijk",
3810 + .psize = 32,
3811 + .digest = "\x13\xfc\x13\xe8\xef\xff\x34\x7d"
3812 + "\xe1\x93\xff\x46\xdb\xac\xcf\xd4",
3813 + }
3814 +};
3815 +
3816 +/*
3817 + * RIPEMD-160 test vectors from ISO/IEC 10118-3:2004(E)
3818 + */
3819 +#define RMD160_TEST_VECTORS 10
3820 +
3821 +static struct hash_testvec rmd160_tv_template[] = {
3822 + {
3823 + .digest = "\x9c\x11\x85\xa5\xc5\xe9\xfc\x54\x61\x28"
3824 + "\x08\x97\x7e\xe8\xf5\x48\xb2\x25\x8d\x31",
3825 + }, {
3826 + .plaintext = "a",
3827 + .psize = 1,
3828 + .digest = "\x0b\xdc\x9d\x2d\x25\x6b\x3e\xe9\xda\xae"
3829 + "\x34\x7b\xe6\xf4\xdc\x83\x5a\x46\x7f\xfe",
3830 + }, {
3831 + .plaintext = "abc",
3832 + .psize = 3,
3833 + .digest = "\x8e\xb2\x08\xf7\xe0\x5d\x98\x7a\x9b\x04"
3834 + "\x4a\x8e\x98\xc6\xb0\x87\xf1\x5a\x0b\xfc",
3835 + }, {
3836 + .plaintext = "message digest",
3837 + .psize = 14,
3838 + .digest = "\x5d\x06\x89\xef\x49\xd2\xfa\xe5\x72\xb8"
3839 + "\x81\xb1\x23\xa8\x5f\xfa\x21\x59\x5f\x36",
3840 + }, {
3841 + .plaintext = "abcdefghijklmnopqrstuvwxyz",
3842 + .psize = 26,
3843 + .digest = "\xf7\x1c\x27\x10\x9c\x69\x2c\x1b\x56\xbb"
3844 + "\xdc\xeb\x5b\x9d\x28\x65\xb3\x70\x8d\xbc",
3845 + }, {
3846 + .plaintext = "ABCDEFGHIJKLMNOPQRSTUVWXYZabcde"
3847 + "fghijklmnopqrstuvwxyz0123456789",
3848 + .psize = 62,
3849 + .digest = "\xb0\xe2\x0b\x6e\x31\x16\x64\x02\x86\xed"
3850 + "\x3a\x87\xa5\x71\x30\x79\xb2\x1f\x51\x89",
3851 + }, {
3852 + .plaintext = "1234567890123456789012345678901234567890"
3853 + "1234567890123456789012345678901234567890",
3854 + .psize = 80,
3855 + .digest = "\x9b\x75\x2e\x45\x57\x3d\x4b\x39\xf4\xdb"
3856 + "\xd3\x32\x3c\xab\x82\xbf\x63\x32\x6b\xfb",
3857 + }, {
3858 + .plaintext = "abcdbcdecdefdefgefghfghighij"
3859 + "hijkijkljklmklmnlmnomnopnopq",
3860 + .psize = 56,
3861 + .digest = "\x12\xa0\x53\x38\x4a\x9c\x0c\x88\xe4\x05"
3862 + "\xa0\x6c\x27\xdc\xf4\x9a\xda\x62\xeb\x2b",
3863 + .np = 2,
3864 + .tap = { 28, 28 },
3865 + }, {
3866 + .plaintext = "abcdefghbcdefghicdefghijdefghijkefghijklfghi"
3867 + "jklmghijklmnhijklmnoijklmnopjklmnopqklmnopqr"
3868 + "lmnopqrsmnopqrstnopqrstu",
3869 + .psize = 112,
3870 + .digest = "\x6f\x3f\xa3\x9b\x6b\x50\x3c\x38\x4f\x91"
3871 + "\x9a\x49\xa7\xaa\x5c\x2c\x08\xbd\xfb\x45",
3872 + }, {
3873 + .plaintext = "abcdbcdecdefdefgefghfghighijhijk",
3874 + .psize = 32,
3875 + .digest = "\x94\xc2\x64\x11\x54\x04\xe6\x33\x79\x0d"
3876 + "\xfc\xc8\x7b\x58\x7d\x36\x77\x06\x7d\x9f",
3877 + }
3878 +};
3879 +
3880 +/*
3881 + * RIPEMD-256 test vectors
3882 + */
3883 +#define RMD256_TEST_VECTORS 8
3884 +
3885 +static struct hash_testvec rmd256_tv_template[] = {
3886 + {
3887 + .digest = "\x02\xba\x4c\x4e\x5f\x8e\xcd\x18"
3888 + "\x77\xfc\x52\xd6\x4d\x30\xe3\x7a"
3889 + "\x2d\x97\x74\xfb\x1e\x5d\x02\x63"
3890 + "\x80\xae\x01\x68\xe3\xc5\x52\x2d",
3891 + }, {
3892 + .plaintext = "a",
3893 + .psize = 1,
3894 + .digest = "\xf9\x33\x3e\x45\xd8\x57\xf5\xd9"
3895 + "\x0a\x91\xba\xb7\x0a\x1e\xba\x0c"
3896 + "\xfb\x1b\xe4\xb0\x78\x3c\x9a\xcf"
3897 + "\xcd\x88\x3a\x91\x34\x69\x29\x25",
3898 + }, {
3899 + .plaintext = "abc",
3900 + .psize = 3,
3901 + .digest = "\xaf\xbd\x6e\x22\x8b\x9d\x8c\xbb"
3902 + "\xce\xf5\xca\x2d\x03\xe6\xdb\xa1"
3903 + "\x0a\xc0\xbc\x7d\xcb\xe4\x68\x0e"
3904 + "\x1e\x42\xd2\xe9\x75\x45\x9b\x65",
3905 + }, {
3906 + .plaintext = "message digest",
3907 + .psize = 14,
3908 + .digest = "\x87\xe9\x71\x75\x9a\x1c\xe4\x7a"
3909 + "\x51\x4d\x5c\x91\x4c\x39\x2c\x90"
3910 + "\x18\xc7\xc4\x6b\xc1\x44\x65\x55"
3911 + "\x4a\xfc\xdf\x54\xa5\x07\x0c\x0e",
3912 + }, {
3913 + .plaintext = "abcdefghijklmnopqrstuvwxyz",
3914 + .psize = 26,
3915 + .digest = "\x64\x9d\x30\x34\x75\x1e\xa2\x16"
3916 + "\x77\x6b\xf9\xa1\x8a\xcc\x81\xbc"
3917 + "\x78\x96\x11\x8a\x51\x97\x96\x87"
3918 + "\x82\xdd\x1f\xd9\x7d\x8d\x51\x33",
3919 + }, {
3920 + .plaintext = "ABCDEFGHIJKLMNOPQRSTUVWXYZabcde"
3921 + "fghijklmnopqrstuvwxyz0123456789",
3922 + .psize = 62,
3923 + .digest = "\x57\x40\xa4\x08\xac\x16\xb7\x20"
3924 + "\xb8\x44\x24\xae\x93\x1c\xbb\x1f"
3925 + "\xe3\x63\xd1\xd0\xbf\x40\x17\xf1"
3926 + "\xa8\x9f\x7e\xa6\xde\x77\xa0\xb8",
3927 + }, {
3928 + .plaintext = "1234567890123456789012345678901234567890"
3929 + "1234567890123456789012345678901234567890",
3930 + .psize = 80,
3931 + .digest = "\x06\xfd\xcc\x7a\x40\x95\x48\xaa"
3932 + "\xf9\x13\x68\xc0\x6a\x62\x75\xb5"
3933 + "\x53\xe3\xf0\x99\xbf\x0e\xa4\xed"
3934 + "\xfd\x67\x78\xdf\x89\xa8\x90\xdd",
3935 + }, {
3936 + .plaintext = "abcdbcdecdefdefgefghfghighij"
3937 + "hijkijkljklmklmnlmnomnopnopq",
3938 + .psize = 56,
3939 + .digest = "\x38\x43\x04\x55\x83\xaa\xc6\xc8"
3940 + "\xc8\xd9\x12\x85\x73\xe7\xa9\x80"
3941 + "\x9a\xfb\x2a\x0f\x34\xcc\xc3\x6e"
3942 + "\xa9\xe7\x2f\x16\xf6\x36\x8e\x3f",
3943 + .np = 2,
3944 + .tap = { 28, 28 },
3945 + }
3946 +};
3947 +
3948 +/*
3949 + * RIPEMD-320 test vectors
3950 + */
3951 +#define RMD320_TEST_VECTORS 8
3952 +
3953 +static struct hash_testvec rmd320_tv_template[] = {
3954 + {
3955 + .digest = "\x22\xd6\x5d\x56\x61\x53\x6c\xdc\x75\xc1"
3956 + "\xfd\xf5\xc6\xde\x7b\x41\xb9\xf2\x73\x25"
3957 + "\xeb\xc6\x1e\x85\x57\x17\x7d\x70\x5a\x0e"
3958 + "\xc8\x80\x15\x1c\x3a\x32\xa0\x08\x99\xb8",
3959 + }, {
3960 + .plaintext = "a",
3961 + .psize = 1,
3962 + .digest = "\xce\x78\x85\x06\x38\xf9\x26\x58\xa5\xa5"
3963 + "\x85\x09\x75\x79\x92\x6d\xda\x66\x7a\x57"
3964 + "\x16\x56\x2c\xfc\xf6\xfb\xe7\x7f\x63\x54"
3965 + "\x2f\x99\xb0\x47\x05\xd6\x97\x0d\xff\x5d",
3966 + }, {
3967 + .plaintext = "abc",
3968 + .psize = 3,
3969 + .digest = "\xde\x4c\x01\xb3\x05\x4f\x89\x30\xa7\x9d"
3970 + "\x09\xae\x73\x8e\x92\x30\x1e\x5a\x17\x08"
3971 + "\x5b\xef\xfd\xc1\xb8\xd1\x16\x71\x3e\x74"
3972 + "\xf8\x2f\xa9\x42\xd6\x4c\xdb\xc4\x68\x2d",
3973 + }, {
3974 + .plaintext = "message digest",
3975 + .psize = 14,
3976 + .digest = "\x3a\x8e\x28\x50\x2e\xd4\x5d\x42\x2f\x68"
3977 + "\x84\x4f\x9d\xd3\x16\xe7\xb9\x85\x33\xfa"
3978 + "\x3f\x2a\x91\xd2\x9f\x84\xd4\x25\xc8\x8d"
3979 + "\x6b\x4e\xff\x72\x7d\xf6\x6a\x7c\x01\x97",
3980 + }, {
3981 + .plaintext = "abcdefghijklmnopqrstuvwxyz",
3982 + .psize = 26,
3983 + .digest = "\xca\xbd\xb1\x81\x0b\x92\x47\x0a\x20\x93"
3984 + "\xaa\x6b\xce\x05\x95\x2c\x28\x34\x8c\xf4"
3985 + "\x3f\xf6\x08\x41\x97\x51\x66\xbb\x40\xed"
3986 + "\x23\x40\x04\xb8\x82\x44\x63\xe6\xb0\x09",
3987 + }, {
3988 + .plaintext = "ABCDEFGHIJKLMNOPQRSTUVWXYZabcde"
3989 + "fghijklmnopqrstuvwxyz0123456789",
3990 + .psize = 62,
3991 + .digest = "\xed\x54\x49\x40\xc8\x6d\x67\xf2\x50\xd2"
3992 + "\x32\xc3\x0b\x7b\x3e\x57\x70\xe0\xc6\x0c"
3993 + "\x8c\xb9\xa4\xca\xfe\x3b\x11\x38\x8a\xf9"
3994 + "\x92\x0e\x1b\x99\x23\x0b\x84\x3c\x86\xa4",
3995 + }, {
3996 + .plaintext = "1234567890123456789012345678901234567890"
3997 + "1234567890123456789012345678901234567890",
3998 + .psize = 80,
3999 + .digest = "\x55\x78\x88\xaf\x5f\x6d\x8e\xd6\x2a\xb6"
4000 + "\x69\x45\xc6\xd2\xa0\xa4\x7e\xcd\x53\x41"
4001 + "\xe9\x15\xeb\x8f\xea\x1d\x05\x24\x95\x5f"
4002 + "\x82\x5d\xc7\x17\xe4\xa0\x08\xab\x2d\x42",
4003 + }, {
4004 + .plaintext = "abcdbcdecdefdefgefghfghighij"
4005 + "hijkijkljklmklmnlmnomnopnopq",
4006 + .psize = 56,
4007 + .digest = "\xd0\x34\xa7\x95\x0c\xf7\x22\x02\x1b\xa4"
4008 + "\xb8\x4d\xf7\x69\xa5\xde\x20\x60\xe2\x59"
4009 + "\xdf\x4c\x9b\xb4\xa4\x26\x8c\x0e\x93\x5b"
4010 + "\xbc\x74\x70\xa9\x69\xc9\xd0\x72\xa1\xac",
4011 + .np = 2,
4012 + .tap = { 28, 28 },
4013 + }
4014 };
4015
4016 /*
4017 @@ -817,6 +1076,168 @@
4018 };
4019
4020 /*
4021 + * HMAC-RIPEMD128 test vectors from RFC2286
4022 + */
4023 +#define HMAC_RMD128_TEST_VECTORS 7
4024 +
4025 +static struct hash_testvec hmac_rmd128_tv_template[] = {
4026 + {
4027 + .key = "\x0b\x0b\x0b\x0b\x0b\x0b\x0b\x0b\x0b\x0b\x0b\x0b\x0b\x0b\x0b\x0b",
4028 + .ksize = 16,
4029 + .plaintext = "Hi There",
4030 + .psize = 8,
4031 + .digest = "\xfb\xf6\x1f\x94\x92\xaa\x4b\xbf"
4032 + "\x81\xc1\x72\xe8\x4e\x07\x34\xdb",
4033 + }, {
4034 + .key = "Jefe",
4035 + .ksize = 4,
4036 + .plaintext = "what do ya want for nothing?",
4037 + .psize = 28,
4038 + .digest = "\x87\x5f\x82\x88\x62\xb6\xb3\x34"
4039 + "\xb4\x27\xc5\x5f\x9f\x7f\xf0\x9b",
4040 + .np = 2,
4041 + .tap = { 14, 14 },
4042 + }, {
4043 + .key = "\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa",
4044 + .ksize = 16,
4045 + .plaintext = "\xdd\xdd\xdd\xdd\xdd\xdd\xdd\xdd\xdd\xdd\xdd\xdd"
4046 + "\xdd\xdd\xdd\xdd\xdd\xdd\xdd\xdd\xdd\xdd\xdd\xdd\xdd"
4047 + "\xdd\xdd\xdd\xdd\xdd\xdd\xdd\xdd\xdd\xdd\xdd\xdd\xdd"
4048 + "\xdd\xdd\xdd\xdd\xdd\xdd\xdd\xdd\xdd\xdd\xdd\xdd",
4049 + .psize = 50,
4050 + .digest = "\x09\xf0\xb2\x84\x6d\x2f\x54\x3d"
4051 + "\xa3\x63\xcb\xec\x8d\x62\xa3\x8d",
4052 + }, {
4053 + .key = "\x01\x02\x03\x04\x05\x06\x07\x08"
4054 + "\x09\x0a\x0b\x0c\x0d\x0e\x0f\x10"
4055 + "\x11\x12\x13\x14\x15\x16\x17\x18\x19",
4056 + .ksize = 25,
4057 + .plaintext = "\xcd\xcd\xcd\xcd\xcd\xcd\xcd\xcd\xcd\xcd\xcd\xcd"
4058 + "\xcd\xcd\xcd\xcd\xcd\xcd\xcd\xcd\xcd\xcd\xcd\xcd\xcd"
4059 + "\xcd\xcd\xcd\xcd\xcd\xcd\xcd\xcd\xcd\xcd\xcd\xcd\xcd"
4060 + "\xcd\xcd\xcd\xcd\xcd\xcd\xcd\xcd\xcd\xcd\xcd\xcd",
4061 + .psize = 50,
4062 + .digest = "\xbd\xbb\xd7\xcf\x03\xe4\x4b\x5a"
4063 + "\xa6\x0a\xf8\x15\xbe\x4d\x22\x94",
4064 + }, {
4065 + .key = "\x0c\x0c\x0c\x0c\x0c\x0c\x0c\x0c\x0c\x0c\x0c\x0c\x0c\x0c\x0c\x0c",
4066 + .ksize = 16,
4067 + .plaintext = "Test With Truncation",
4068 + .psize = 20,
4069 + .digest = "\xe7\x98\x08\xf2\x4b\x25\xfd\x03"
4070 + "\x1c\x15\x5f\x0d\x55\x1d\x9a\x3a",
4071 + }, {
4072 + .key = "\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa"
4073 + "\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa"
4074 + "\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa"
4075 + "\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa"
4076 + "\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa"
4077 + "\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa"
4078 + "\xaa\xaa",
4079 + .ksize = 80,
4080 + .plaintext = "Test Using Larger Than Block-Size Key - Hash Key First",
4081 + .psize = 54,
4082 + .digest = "\xdc\x73\x29\x28\xde\x98\x10\x4a"
4083 + "\x1f\x59\xd3\x73\xc1\x50\xac\xbb",
4084 + }, {
4085 + .key = "\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa"
4086 + "\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa"
4087 + "\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa"
4088 + "\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa"
4089 + "\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa"
4090 + "\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa"
4091 + "\xaa\xaa",
4092 + .ksize = 80,
4093 + .plaintext = "Test Using Larger Than Block-Size Key and Larger Than One "
4094 + "Block-Size Data",
4095 + .psize = 73,
4096 + .digest = "\x5c\x6b\xec\x96\x79\x3e\x16\xd4"
4097 + "\x06\x90\xc2\x37\x63\x5f\x30\xc5",
4098 + },
4099 +};
4100 +
4101 +/*
4102 + * HMAC-RIPEMD160 test vectors from RFC2286
4103 + */
4104 +#define HMAC_RMD160_TEST_VECTORS 7
4105 +
4106 +static struct hash_testvec hmac_rmd160_tv_template[] = {
4107 + {
4108 + .key = "\x0b\x0b\x0b\x0b\x0b\x0b\x0b\x0b\x0b\x0b\x0b\x0b\x0b\x0b\x0b\x0b\x0b\x0b\x0b\x0b",
4109 + .ksize = 20,
4110 + .plaintext = "Hi There",
4111 + .psize = 8,
4112 + .digest = "\x24\xcb\x4b\xd6\x7d\x20\xfc\x1a\x5d\x2e"
4113 + "\xd7\x73\x2d\xcc\x39\x37\x7f\x0a\x56\x68",
4114 + }, {
4115 + .key = "Jefe",
4116 + .ksize = 4,
4117 + .plaintext = "what do ya want for nothing?",
4118 + .psize = 28,
4119 + .digest = "\xdd\xa6\xc0\x21\x3a\x48\x5a\x9e\x24\xf4"
4120 + "\x74\x20\x64\xa7\xf0\x33\xb4\x3c\x40\x69",
4121 + .np = 2,
4122 + .tap = { 14, 14 },
4123 + }, {
4124 + .key = "\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa",
4125 + .ksize = 20,
4126 + .plaintext = "\xdd\xdd\xdd\xdd\xdd\xdd\xdd\xdd\xdd\xdd\xdd\xdd"
4127 + "\xdd\xdd\xdd\xdd\xdd\xdd\xdd\xdd\xdd\xdd\xdd\xdd\xdd"
4128 + "\xdd\xdd\xdd\xdd\xdd\xdd\xdd\xdd\xdd\xdd\xdd\xdd\xdd"
4129 + "\xdd\xdd\xdd\xdd\xdd\xdd\xdd\xdd\xdd\xdd\xdd\xdd",
4130 + .psize = 50,
4131 + .digest = "\xb0\xb1\x05\x36\x0d\xe7\x59\x96\x0a\xb4"
4132 + "\xf3\x52\x98\xe1\x16\xe2\x95\xd8\xe7\xc1",
4133 + }, {
4134 + .key = "\x01\x02\x03\x04\x05\x06\x07\x08"
4135 + "\x09\x0a\x0b\x0c\x0d\x0e\x0f\x10"
4136 + "\x11\x12\x13\x14\x15\x16\x17\x18\x19",
4137 + .ksize = 25,
4138 + .plaintext = "\xcd\xcd\xcd\xcd\xcd\xcd\xcd\xcd\xcd\xcd\xcd\xcd"
4139 + "\xcd\xcd\xcd\xcd\xcd\xcd\xcd\xcd\xcd\xcd\xcd\xcd\xcd"
4140 + "\xcd\xcd\xcd\xcd\xcd\xcd\xcd\xcd\xcd\xcd\xcd\xcd\xcd"
4141 + "\xcd\xcd\xcd\xcd\xcd\xcd\xcd\xcd\xcd\xcd\xcd\xcd",
4142 + .psize = 50,
4143 + .digest = "\xd5\xca\x86\x2f\x4d\x21\xd5\xe6\x10\xe1"
4144 + "\x8b\x4c\xf1\xbe\xb9\x7a\x43\x65\xec\xf4",
4145 + }, {
4146 + .key = "\x0c\x0c\x0c\x0c\x0c\x0c\x0c\x0c\x0c\x0c\x0c\x0c\x0c\x0c\x0c\x0c\x0c\x0c\x0c\x0c",
4147 + .ksize = 20,
4148 + .plaintext = "Test With Truncation",
4149 + .psize = 20,
4150 + .digest = "\x76\x19\x69\x39\x78\xf9\x1d\x90\x53\x9a"
4151 + "\xe7\x86\x50\x0f\xf3\xd8\xe0\x51\x8e\x39",
4152 + }, {
4153 + .key = "\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa"
4154 + "\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa"
4155 + "\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa"
4156 + "\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa"
4157 + "\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa"
4158 + "\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa"
4159 + "\xaa\xaa",
4160 + .ksize = 80,
4161 + .plaintext = "Test Using Larger Than Block-Size Key - Hash Key First",
4162 + .psize = 54,
4163 + .digest = "\x64\x66\xca\x07\xac\x5e\xac\x29\xe1\xbd"
4164 + "\x52\x3e\x5a\xda\x76\x05\xb7\x91\xfd\x8b",
4165 + }, {
4166 + .key = "\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa"
4167 + "\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa"
4168 + "\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa"
4169 + "\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa"
4170 + "\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa"
4171 + "\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa"
4172 + "\xaa\xaa",
4173 + .ksize = 80,
4174 + .plaintext = "Test Using Larger Than Block-Size Key and Larger Than One "
4175 + "Block-Size Data",
4176 + .psize = 73,
4177 + .digest = "\x69\xea\x60\x79\x8d\x71\x61\x6c\xce\x5f"
4178 + "\xd0\x87\x1e\x23\x75\x4c\xd7\x5d\x5a\x0a",
4179 + },
4180 +};
4181 +
4182 +/*
4183 * HMAC-SHA1 test vectors from RFC2202
4184 */
4185 #define HMAC_SHA1_TEST_VECTORS 7
4186 @@ -1442,6 +1863,8 @@
4187 #define DES_CBC_DEC_TEST_VECTORS 4
4188 #define DES3_EDE_ENC_TEST_VECTORS 3
4189 #define DES3_EDE_DEC_TEST_VECTORS 3
4190 +#define DES3_EDE_CBC_ENC_TEST_VECTORS 1
4191 +#define DES3_EDE_CBC_DEC_TEST_VECTORS 1
4192
4193 static struct cipher_testvec des_enc_tv_template[] = {
4194 { /* From Applied Cryptography */
4195 @@ -1680,9 +2103,6 @@
4196 },
4197 };
4198
4199 -/*
4200 - * We really need some more test vectors, especially for DES3 CBC.
4201 - */
4202 static struct cipher_testvec des3_ede_enc_tv_template[] = {
4203 { /* These are from openssl */
4204 .key = "\x01\x23\x45\x67\x89\xab\xcd\xef"
4205 @@ -1745,6 +2165,94 @@
4206 },
4207 };
4208
4209 +static struct cipher_testvec des3_ede_cbc_enc_tv_template[] = {
4210 + { /* Generated from openssl */
4211 + .key = "\xE9\xC0\xFF\x2E\x76\x0B\x64\x24"
4212 + "\x44\x4D\x99\x5A\x12\xD6\x40\xC0"
4213 + "\xEA\xC2\x84\xE8\x14\x95\xDB\xE8",
4214 + .klen = 24,
4215 + .iv = "\x7D\x33\x88\x93\x0F\x93\xB2\x42",
4216 + .input = "\x6f\x54\x20\x6f\x61\x4d\x79\x6e"
4217 + "\x53\x20\x63\x65\x65\x72\x73\x74"
4218 + "\x54\x20\x6f\x6f\x4d\x20\x6e\x61"
4219 + "\x20\x79\x65\x53\x72\x63\x74\x65"
4220 + "\x20\x73\x6f\x54\x20\x6f\x61\x4d"
4221 + "\x79\x6e\x53\x20\x63\x65\x65\x72"
4222 + "\x73\x74\x54\x20\x6f\x6f\x4d\x20"
4223 + "\x6e\x61\x20\x79\x65\x53\x72\x63"
4224 + "\x74\x65\x20\x73\x6f\x54\x20\x6f"
4225 + "\x61\x4d\x79\x6e\x53\x20\x63\x65"
4226 + "\x65\x72\x73\x74\x54\x20\x6f\x6f"
4227 + "\x4d\x20\x6e\x61\x20\x79\x65\x53"
4228 + "\x72\x63\x74\x65\x20\x73\x6f\x54"
4229 + "\x20\x6f\x61\x4d\x79\x6e\x53\x20"
4230 + "\x63\x65\x65\x72\x73\x74\x54\x20"
4231 + "\x6f\x6f\x4d\x20\x6e\x61\x0a\x79",
4232 + .ilen = 128,
4233 + .result = "\x0e\x2d\xb6\x97\x3c\x56\x33\xf4"
4234 + "\x67\x17\x21\xc7\x6e\x8a\xd5\x49"
4235 + "\x74\xb3\x49\x05\xc5\x1c\xd0\xed"
4236 + "\x12\x56\x5c\x53\x96\xb6\x00\x7d"
4237 + "\x90\x48\xfc\xf5\x8d\x29\x39\xcc"
4238 + "\x8a\xd5\x35\x18\x36\x23\x4e\xd7"
4239 + "\x76\xd1\xda\x0c\x94\x67\xbb\x04"
4240 + "\x8b\xf2\x03\x6c\xa8\xcf\xb6\xea"
4241 + "\x22\x64\x47\xaa\x8f\x75\x13\xbf"
4242 + "\x9f\xc2\xc3\xf0\xc9\x56\xc5\x7a"
4243 + "\x71\x63\x2e\x89\x7b\x1e\x12\xca"
4244 + "\xe2\x5f\xaf\xd8\xa4\xf8\xc9\x7a"
4245 + "\xd6\xf9\x21\x31\x62\x44\x45\xa6"
4246 + "\xd6\xbc\x5a\xd3\x2d\x54\x43\xcc"
4247 + "\x9d\xde\xa5\x70\xe9\x42\x45\x8a"
4248 + "\x6b\xfa\xb1\x91\x13\xb0\xd9\x19",
4249 + .rlen = 128,
4250 + },
4251 +};
4252 +
4253 +static struct cipher_testvec des3_ede_cbc_dec_tv_template[] = {
4254 + { /* Generated from openssl */
4255 + .key = "\xE9\xC0\xFF\x2E\x76\x0B\x64\x24"
4256 + "\x44\x4D\x99\x5A\x12\xD6\x40\xC0"
4257 + "\xEA\xC2\x84\xE8\x14\x95\xDB\xE8",
4258 + .klen = 24,
4259 + .iv = "\x7D\x33\x88\x93\x0F\x93\xB2\x42",
4260 + .input = "\x0e\x2d\xb6\x97\x3c\x56\x33\xf4"
4261 + "\x67\x17\x21\xc7\x6e\x8a\xd5\x49"
4262 + "\x74\xb3\x49\x05\xc5\x1c\xd0\xed"
4263 + "\x12\x56\x5c\x53\x96\xb6\x00\x7d"
4264 + "\x90\x48\xfc\xf5\x8d\x29\x39\xcc"
4265 + "\x8a\xd5\x35\x18\x36\x23\x4e\xd7"
4266 + "\x76\xd1\xda\x0c\x94\x67\xbb\x04"
4267 + "\x8b\xf2\x03\x6c\xa8\xcf\xb6\xea"
4268 + "\x22\x64\x47\xaa\x8f\x75\x13\xbf"
4269 + "\x9f\xc2\xc3\xf0\xc9\x56\xc5\x7a"
4270 + "\x71\x63\x2e\x89\x7b\x1e\x12\xca"
4271 + "\xe2\x5f\xaf\xd8\xa4\xf8\xc9\x7a"
4272 + "\xd6\xf9\x21\x31\x62\x44\x45\xa6"
4273 + "\xd6\xbc\x5a\xd3\x2d\x54\x43\xcc"
4274 + "\x9d\xde\xa5\x70\xe9\x42\x45\x8a"
4275 + "\x6b\xfa\xb1\x91\x13\xb0\xd9\x19",
4276 + .ilen = 128,
4277 + .result = "\x6f\x54\x20\x6f\x61\x4d\x79\x6e"
4278 + "\x53\x20\x63\x65\x65\x72\x73\x74"
4279 + "\x54\x20\x6f\x6f\x4d\x20\x6e\x61"
4280 + "\x20\x79\x65\x53\x72\x63\x74\x65"
4281 + "\x20\x73\x6f\x54\x20\x6f\x61\x4d"
4282 + "\x79\x6e\x53\x20\x63\x65\x65\x72"
4283 + "\x73\x74\x54\x20\x6f\x6f\x4d\x20"
4284 + "\x6e\x61\x20\x79\x65\x53\x72\x63"
4285 + "\x74\x65\x20\x73\x6f\x54\x20\x6f"
4286 + "\x61\x4d\x79\x6e\x53\x20\x63\x65"
4287 + "\x65\x72\x73\x74\x54\x20\x6f\x6f"
4288 + "\x4d\x20\x6e\x61\x20\x79\x65\x53"
4289 + "\x72\x63\x74\x65\x20\x73\x6f\x54"
4290 + "\x20\x6f\x61\x4d\x79\x6e\x53\x20"
4291 + "\x63\x65\x65\x72\x73\x74\x54\x20"
4292 + "\x6f\x6f\x4d\x20\x6e\x61\x0a\x79",
4293 + .rlen = 128,
4294 + },
4295 +};
4296 +
4297 /*
4298 * Blowfish test vectors.
4299 */
4300 --- a/drivers/crypto/Kconfig
4301 +++ b/drivers/crypto/Kconfig
4302 @@ -174,4 +174,30 @@
4303 Select this option if you want to enable the random number generator
4304 on the HIFN 795x crypto adapters.
4305
4306 +config CRYPTO_DEV_TALITOS
4307 + tristate "Talitos Freescale Security Engine (SEC)"
4308 + select CRYPTO_ALGAPI
4309 + select CRYPTO_AUTHENC
4310 + select HW_RANDOM
4311 + depends on FSL_SOC
4312 + help
4313 + Say 'Y' here to use the Freescale Security Engine (SEC)
4314 + to offload cryptographic algorithm computation.
4315 +
4316 + The Freescale SEC is present on PowerQUICC 'E' processors, such
4317 + as the MPC8349E and MPC8548E.
4318 +
4319 + To compile this driver as a module, choose M here: the module
4320 + will be called talitos.
4321 +
4322 +config CRYPTO_DEV_IXP4XX
4323 + tristate "Driver for IXP4xx crypto hardware acceleration"
4324 + depends on ARCH_IXP4XX
4325 + select CRYPTO_DES
4326 + select CRYPTO_ALGAPI
4327 + select CRYPTO_AUTHENC
4328 + select CRYPTO_BLKCIPHER
4329 + help
4330 + Driver for the IXP4xx NPE crypto engine.
4331 +
4332 endif # CRYPTO_HW
4333 --- a/drivers/crypto/Makefile
4334 +++ b/drivers/crypto/Makefile
4335 @@ -2,3 +2,5 @@
4336 obj-$(CONFIG_CRYPTO_DEV_PADLOCK_SHA) += padlock-sha.o
4337 obj-$(CONFIG_CRYPTO_DEV_GEODE) += geode-aes.o
4338 obj-$(CONFIG_CRYPTO_DEV_HIFN_795X) += hifn_795x.o
4339 +obj-$(CONFIG_CRYPTO_DEV_TALITOS) += talitos.o
4340 +obj-$(CONFIG_CRYPTO_DEV_IXP4XX) += ixp4xx_crypto.o
4341 --- a/drivers/crypto/hifn_795x.c
4342 +++ b/drivers/crypto/hifn_795x.c
4343 @@ -29,7 +29,6 @@
4344 #include <linux/dma-mapping.h>
4345 #include <linux/scatterlist.h>
4346 #include <linux/highmem.h>
4347 -#include <linux/interrupt.h>
4348 #include <linux/crypto.h>
4349 #include <linux/hw_random.h>
4350 #include <linux/ktime.h>
4351 @@ -369,7 +368,9 @@
4352 #define HIFN_D_DST_RSIZE 80*4
4353 #define HIFN_D_RES_RSIZE 24*4
4354
4355 -#define HIFN_QUEUE_LENGTH HIFN_D_CMD_RSIZE-5
4356 +#define HIFN_D_DST_DALIGN 4
4357 +
4358 +#define HIFN_QUEUE_LENGTH HIFN_D_CMD_RSIZE-1
4359
4360 #define AES_MIN_KEY_SIZE 16
4361 #define AES_MAX_KEY_SIZE 32
4362 @@ -535,10 +536,10 @@
4363 */
4364 struct hifn_mac_command
4365 {
4366 - volatile u16 masks;
4367 - volatile u16 header_skip;
4368 - volatile u16 source_count;
4369 - volatile u16 reserved;
4370 + volatile __le16 masks;
4371 + volatile __le16 header_skip;
4372 + volatile __le16 source_count;
4373 + volatile __le16 reserved;
4374 };
4375
4376 #define HIFN_MAC_CMD_ALG_MASK 0x0001
4377 @@ -564,10 +565,10 @@
4378
4379 struct hifn_comp_command
4380 {
4381 - volatile u16 masks;
4382 - volatile u16 header_skip;
4383 - volatile u16 source_count;
4384 - volatile u16 reserved;
4385 + volatile __le16 masks;
4386 + volatile __le16 header_skip;
4387 + volatile __le16 source_count;
4388 + volatile __le16 reserved;
4389 };
4390
4391 #define HIFN_COMP_CMD_SRCLEN_M 0xc000
4392 @@ -583,10 +584,10 @@
4393
4394 struct hifn_base_result
4395 {
4396 - volatile u16 flags;
4397 - volatile u16 session;
4398 - volatile u16 src_cnt; /* 15:0 of source count */
4399 - volatile u16 dst_cnt; /* 15:0 of dest count */
4400 + volatile __le16 flags;
4401 + volatile __le16 session;
4402 + volatile __le16 src_cnt; /* 15:0 of source count */
4403 + volatile __le16 dst_cnt; /* 15:0 of dest count */
4404 };
4405
4406 #define HIFN_BASE_RES_DSTOVERRUN 0x0200 /* destination overrun */
4407 @@ -597,8 +598,8 @@
4408
4409 struct hifn_comp_result
4410 {
4411 - volatile u16 flags;
4412 - volatile u16 crc;
4413 + volatile __le16 flags;
4414 + volatile __le16 crc;
4415 };
4416
4417 #define HIFN_COMP_RES_LCB_M 0xff00 /* longitudinal check byte */
4418 @@ -609,8 +610,8 @@
4419
4420 struct hifn_mac_result
4421 {
4422 - volatile u16 flags;
4423 - volatile u16 reserved;
4424 + volatile __le16 flags;
4425 + volatile __le16 reserved;
4426 /* followed by 0, 6, 8, or 10 u16's of the MAC, then crypt */
4427 };
4428
4429 @@ -619,8 +620,8 @@
4430
4431 struct hifn_crypt_result
4432 {
4433 - volatile u16 flags;
4434 - volatile u16 reserved;
4435 + volatile __le16 flags;
4436 + volatile __le16 reserved;
4437 };
4438
4439 #define HIFN_CRYPT_RES_SRC_NOTZERO 0x0001 /* source expired */
4440 @@ -686,12 +687,12 @@
4441
4442 static inline void hifn_write_0(struct hifn_device *dev, u32 reg, u32 val)
4443 {
4444 - writel(val, dev->bar[0] + reg);
4445 + writel((__force u32)cpu_to_le32(val), dev->bar[0] + reg);
4446 }
4447
4448 static inline void hifn_write_1(struct hifn_device *dev, u32 reg, u32 val)
4449 {
4450 - writel(val, dev->bar[1] + reg);
4451 + writel((__force u32)cpu_to_le32(val), dev->bar[1] + reg);
4452 }
4453
4454 static void hifn_wait_puc(struct hifn_device *dev)
4455 @@ -894,7 +895,7 @@
4456 char *offtbl = NULL;
4457 int i;
4458
4459 - for (i = 0; i < sizeof(pci2id)/sizeof(pci2id[0]); i++) {
4460 + for (i = 0; i < ARRAY_SIZE(pci2id); i++) {
4461 if (pci2id[i].pci_vendor == dev->pdev->vendor &&
4462 pci2id[i].pci_prod == dev->pdev->device) {
4463 offtbl = pci2id[i].card_id;
4464 @@ -1037,14 +1038,14 @@
4465 hifn_write_0(dev, HIFN_0_PUIER, HIFN_PUIER_DSTOVER);
4466
4467 /* write all 4 ring address registers */
4468 - hifn_write_1(dev, HIFN_1_DMA_CRAR, __cpu_to_le32(dptr +
4469 - offsetof(struct hifn_dma, cmdr[0])));
4470 - hifn_write_1(dev, HIFN_1_DMA_SRAR, __cpu_to_le32(dptr +
4471 - offsetof(struct hifn_dma, srcr[0])));
4472 - hifn_write_1(dev, HIFN_1_DMA_DRAR, __cpu_to_le32(dptr +
4473 - offsetof(struct hifn_dma, dstr[0])));
4474 - hifn_write_1(dev, HIFN_1_DMA_RRAR, __cpu_to_le32(dptr +
4475 - offsetof(struct hifn_dma, resr[0])));
4476 + hifn_write_1(dev, HIFN_1_DMA_CRAR, dptr +
4477 + offsetof(struct hifn_dma, cmdr[0]));
4478 + hifn_write_1(dev, HIFN_1_DMA_SRAR, dptr +
4479 + offsetof(struct hifn_dma, srcr[0]));
4480 + hifn_write_1(dev, HIFN_1_DMA_DRAR, dptr +
4481 + offsetof(struct hifn_dma, dstr[0]));
4482 + hifn_write_1(dev, HIFN_1_DMA_RRAR, dptr +
4483 + offsetof(struct hifn_dma, resr[0]));
4484
4485 mdelay(2);
4486 #if 0
4487 @@ -1166,109 +1167,15 @@
4488 return cmd_len;
4489 }
4490
4491 -static int hifn_setup_src_desc(struct hifn_device *dev, struct page *page,
4492 - unsigned int offset, unsigned int size)
4493 -{
4494 - struct hifn_dma *dma = (struct hifn_dma *)dev->desc_virt;
4495 - int idx;
4496 - dma_addr_t addr;
4497 -
4498 - addr = pci_map_page(dev->pdev, page, offset, size, PCI_DMA_TODEVICE);
4499 -
4500 - idx = dma->srci;
4501 -
4502 - dma->srcr[idx].p = __cpu_to_le32(addr);
4503 - dma->srcr[idx].l = __cpu_to_le32(size) | HIFN_D_VALID |
4504 - HIFN_D_MASKDONEIRQ | HIFN_D_NOINVALID | HIFN_D_LAST;
4505 -
4506 - if (++idx == HIFN_D_SRC_RSIZE) {
4507 - dma->srcr[idx].l = __cpu_to_le32(HIFN_D_VALID |
4508 - HIFN_D_JUMP |
4509 - HIFN_D_MASKDONEIRQ | HIFN_D_LAST);
4510 - idx = 0;
4511 - }
4512 -
4513 - dma->srci = idx;
4514 - dma->srcu++;
4515 -
4516 - if (!(dev->flags & HIFN_FLAG_SRC_BUSY)) {
4517 - hifn_write_1(dev, HIFN_1_DMA_CSR, HIFN_DMACSR_S_CTRL_ENA);
4518 - dev->flags |= HIFN_FLAG_SRC_BUSY;
4519 - }
4520 -
4521 - return size;
4522 -}
4523 -
4524 -static void hifn_setup_res_desc(struct hifn_device *dev)
4525 -{
4526 - struct hifn_dma *dma = (struct hifn_dma *)dev->desc_virt;
4527 -
4528 - dma->resr[dma->resi].l = __cpu_to_le32(HIFN_USED_RESULT |
4529 - HIFN_D_VALID | HIFN_D_LAST);
4530 - /*
4531 - * dma->resr[dma->resi].l = __cpu_to_le32(HIFN_MAX_RESULT | HIFN_D_VALID |
4532 - * HIFN_D_LAST | HIFN_D_NOINVALID);
4533 - */
4534 -
4535 - if (++dma->resi == HIFN_D_RES_RSIZE) {
4536 - dma->resr[HIFN_D_RES_RSIZE].l = __cpu_to_le32(HIFN_D_VALID |
4537 - HIFN_D_JUMP | HIFN_D_MASKDONEIRQ | HIFN_D_LAST);
4538 - dma->resi = 0;
4539 - }
4540 -
4541 - dma->resu++;
4542 -
4543 - if (!(dev->flags & HIFN_FLAG_RES_BUSY)) {
4544 - hifn_write_1(dev, HIFN_1_DMA_CSR, HIFN_DMACSR_R_CTRL_ENA);
4545 - dev->flags |= HIFN_FLAG_RES_BUSY;
4546 - }
4547 -}
4548 -
4549 -static void hifn_setup_dst_desc(struct hifn_device *dev, struct page *page,
4550 - unsigned offset, unsigned size)
4551 -{
4552 - struct hifn_dma *dma = (struct hifn_dma *)dev->desc_virt;
4553 - int idx;
4554 - dma_addr_t addr;
4555 -
4556 - addr = pci_map_page(dev->pdev, page, offset, size, PCI_DMA_FROMDEVICE);
4557 -
4558 - idx = dma->dsti;
4559 - dma->dstr[idx].p = __cpu_to_le32(addr);
4560 - dma->dstr[idx].l = __cpu_to_le32(size | HIFN_D_VALID |
4561 - HIFN_D_MASKDONEIRQ | HIFN_D_NOINVALID | HIFN_D_LAST);
4562 -
4563 - if (++idx == HIFN_D_DST_RSIZE) {
4564 - dma->dstr[idx].l = __cpu_to_le32(HIFN_D_VALID |
4565 - HIFN_D_JUMP | HIFN_D_MASKDONEIRQ |
4566 - HIFN_D_LAST | HIFN_D_NOINVALID);
4567 - idx = 0;
4568 - }
4569 - dma->dsti = idx;
4570 - dma->dstu++;
4571 -
4572 - if (!(dev->flags & HIFN_FLAG_DST_BUSY)) {
4573 - hifn_write_1(dev, HIFN_1_DMA_CSR, HIFN_DMACSR_D_CTRL_ENA);
4574 - dev->flags |= HIFN_FLAG_DST_BUSY;
4575 - }
4576 -}
4577 -
4578 -static int hifn_setup_dma(struct hifn_device *dev, struct page *spage, unsigned int soff,
4579 - struct page *dpage, unsigned int doff, unsigned int nbytes, void *priv,
4580 - struct hifn_context *ctx)
4581 +static int hifn_setup_cmd_desc(struct hifn_device *dev,
4582 + struct hifn_context *ctx, void *priv, unsigned int nbytes)
4583 {
4584 struct hifn_dma *dma = (struct hifn_dma *)dev->desc_virt;
4585 int cmd_len, sa_idx;
4586 u8 *buf, *buf_pos;
4587 u16 mask;
4588
4589 - dprintk("%s: spage: %p, soffset: %u, dpage: %p, doffset: %u, nbytes: %u, priv: %p, ctx: %p.\n",
4590 - dev->name, spage, soff, dpage, doff, nbytes, priv, ctx);
4591 -
4592 - sa_idx = dma->resi;
4593 -
4594 - hifn_setup_src_desc(dev, spage, soff, nbytes);
4595 -
4596 + sa_idx = dma->cmdi;
4597 buf_pos = buf = dma->command_bufs[dma->cmdi];
4598
4599 mask = 0;
4600 @@ -1370,16 +1277,113 @@
4601 hifn_write_1(dev, HIFN_1_DMA_CSR, HIFN_DMACSR_C_CTRL_ENA);
4602 dev->flags |= HIFN_FLAG_CMD_BUSY;
4603 }
4604 -
4605 - hifn_setup_dst_desc(dev, dpage, doff, nbytes);
4606 - hifn_setup_res_desc(dev);
4607 -
4608 return 0;
4609
4610 err_out:
4611 return -EINVAL;
4612 }
4613
4614 +static int hifn_setup_src_desc(struct hifn_device *dev, struct page *page,
4615 + unsigned int offset, unsigned int size)
4616 +{
4617 + struct hifn_dma *dma = (struct hifn_dma *)dev->desc_virt;
4618 + int idx;
4619 + dma_addr_t addr;
4620 +
4621 + addr = pci_map_page(dev->pdev, page, offset, size, PCI_DMA_TODEVICE);
4622 +
4623 + idx = dma->srci;
4624 +
4625 + dma->srcr[idx].p = __cpu_to_le32(addr);
4626 + dma->srcr[idx].l = __cpu_to_le32(size | HIFN_D_VALID |
4627 + HIFN_D_MASKDONEIRQ | HIFN_D_LAST);
4628 +
4629 + if (++idx == HIFN_D_SRC_RSIZE) {
4630 + dma->srcr[idx].l = __cpu_to_le32(HIFN_D_VALID |
4631 + HIFN_D_JUMP |
4632 + HIFN_D_MASKDONEIRQ | HIFN_D_LAST);
4633 + idx = 0;
4634 + }
4635 +
4636 + dma->srci = idx;
4637 + dma->srcu++;
4638 +
4639 + if (!(dev->flags & HIFN_FLAG_SRC_BUSY)) {
4640 + hifn_write_1(dev, HIFN_1_DMA_CSR, HIFN_DMACSR_S_CTRL_ENA);
4641 + dev->flags |= HIFN_FLAG_SRC_BUSY;
4642 + }
4643 +
4644 + return size;
4645 +}
4646 +
4647 +static void hifn_setup_res_desc(struct hifn_device *dev)
4648 +{
4649 + struct hifn_dma *dma = (struct hifn_dma *)dev->desc_virt;
4650 +
4651 + dma->resr[dma->resi].l = __cpu_to_le32(HIFN_USED_RESULT |
4652 + HIFN_D_VALID | HIFN_D_LAST);
4653 + /*
4654 + * dma->resr[dma->resi].l = __cpu_to_le32(HIFN_MAX_RESULT | HIFN_D_VALID |
4655 + * HIFN_D_LAST);
4656 + */
4657 +
4658 + if (++dma->resi == HIFN_D_RES_RSIZE) {
4659 + dma->resr[HIFN_D_RES_RSIZE].l = __cpu_to_le32(HIFN_D_VALID |
4660 + HIFN_D_JUMP | HIFN_D_MASKDONEIRQ | HIFN_D_LAST);
4661 + dma->resi = 0;
4662 + }
4663 +
4664 + dma->resu++;
4665 +
4666 + if (!(dev->flags & HIFN_FLAG_RES_BUSY)) {
4667 + hifn_write_1(dev, HIFN_1_DMA_CSR, HIFN_DMACSR_R_CTRL_ENA);
4668 + dev->flags |= HIFN_FLAG_RES_BUSY;
4669 + }
4670 +}
4671 +
4672 +static void hifn_setup_dst_desc(struct hifn_device *dev, struct page *page,
4673 + unsigned offset, unsigned size)
4674 +{
4675 + struct hifn_dma *dma = (struct hifn_dma *)dev->desc_virt;
4676 + int idx;
4677 + dma_addr_t addr;
4678 +
4679 + addr = pci_map_page(dev->pdev, page, offset, size, PCI_DMA_FROMDEVICE);
4680 +
4681 + idx = dma->dsti;
4682 + dma->dstr[idx].p = __cpu_to_le32(addr);
4683 + dma->dstr[idx].l = __cpu_to_le32(size | HIFN_D_VALID |
4684 + HIFN_D_MASKDONEIRQ | HIFN_D_LAST);
4685 +
4686 + if (++idx == HIFN_D_DST_RSIZE) {
4687 + dma->dstr[idx].l = __cpu_to_le32(HIFN_D_VALID |
4688 + HIFN_D_JUMP | HIFN_D_MASKDONEIRQ |
4689 + HIFN_D_LAST);
4690 + idx = 0;
4691 + }
4692 + dma->dsti = idx;
4693 + dma->dstu++;
4694 +
4695 + if (!(dev->flags & HIFN_FLAG_DST_BUSY)) {
4696 + hifn_write_1(dev, HIFN_1_DMA_CSR, HIFN_DMACSR_D_CTRL_ENA);
4697 + dev->flags |= HIFN_FLAG_DST_BUSY;
4698 + }
4699 +}
4700 +
4701 +static int hifn_setup_dma(struct hifn_device *dev, struct page *spage, unsigned int soff,
4702 + struct page *dpage, unsigned int doff, unsigned int nbytes, void *priv,
4703 + struct hifn_context *ctx)
4704 +{
4705 + dprintk("%s: spage: %p, soffset: %u, dpage: %p, doffset: %u, nbytes: %u, priv: %p, ctx: %p.\n",
4706 + dev->name, spage, soff, dpage, doff, nbytes, priv, ctx);
4707 +
4708 + hifn_setup_src_desc(dev, spage, soff, nbytes);
4709 + hifn_setup_cmd_desc(dev, ctx, priv, nbytes);
4710 + hifn_setup_dst_desc(dev, dpage, doff, nbytes);
4711 + hifn_setup_res_desc(dev);
4712 + return 0;
4713 +}
4714 +
4715 static int ablkcipher_walk_init(struct ablkcipher_walk *w,
4716 int num, gfp_t gfp_flags)
4717 {
4718 @@ -1431,7 +1435,7 @@
4719 return -EINVAL;
4720
4721 while (size) {
4722 - copy = min(drest, src->length);
4723 + copy = min(drest, min(size, src->length));
4724
4725 saddr = kmap_atomic(sg_page(src), KM_SOFTIRQ1);
4726 memcpy(daddr, saddr + src->offset, copy);
4727 @@ -1458,10 +1462,6 @@
4728 static int ablkcipher_walk(struct ablkcipher_request *req,
4729 struct ablkcipher_walk *w)
4730 {
4731 - unsigned blocksize =
4732 - crypto_ablkcipher_blocksize(crypto_ablkcipher_reqtfm(req));
4733 - unsigned alignmask =
4734 - crypto_ablkcipher_alignmask(crypto_ablkcipher_reqtfm(req));
4735 struct scatterlist *src, *dst, *t;
4736 void *daddr;
4737 unsigned int nbytes = req->nbytes, offset, copy, diff;
4738 @@ -1477,16 +1477,14 @@
4739 dst = &req->dst[idx];
4740
4741 dprintk("\n%s: slen: %u, dlen: %u, soff: %u, doff: %u, offset: %u, "
4742 - "blocksize: %u, nbytes: %u.\n",
4743 + "nbytes: %u.\n",
4744 __func__, src->length, dst->length, src->offset,
4745 - dst->offset, offset, blocksize, nbytes);
4746 + dst->offset, offset, nbytes);
4747
4748 - if (src->length & (blocksize - 1) ||
4749 - src->offset & (alignmask - 1) ||
4750 - dst->length & (blocksize - 1) ||
4751 - dst->offset & (alignmask - 1) ||
4752 - offset) {
4753 - unsigned slen = src->length - offset;
4754 + if (!IS_ALIGNED(dst->offset, HIFN_D_DST_DALIGN) ||
4755 + !IS_ALIGNED(dst->length, HIFN_D_DST_DALIGN) ||
4756 + offset) {
4757 + unsigned slen = min(src->length - offset, nbytes);
4758 unsigned dlen = PAGE_SIZE;
4759
4760 t = &w->cache[idx];
4761 @@ -1498,8 +1496,8 @@
4762
4763 idx += err;
4764
4765 - copy = slen & ~(blocksize - 1);
4766 - diff = slen & (blocksize - 1);
4767 + copy = slen & ~(HIFN_D_DST_DALIGN - 1);
4768 + diff = slen & (HIFN_D_DST_DALIGN - 1);
4769
4770 if (dlen < nbytes) {
4771 /*
4772 @@ -1507,7 +1505,7 @@
4773 * to put there additional blocksized chunk,
4774 * so we mark that page as containing only
4775 * blocksize aligned chunks:
4776 - * t->length = (slen & ~(blocksize - 1));
4777 + * t->length = (slen & ~(HIFN_D_DST_DALIGN - 1));
4778 * and increase number of bytes to be processed
4779 * in next chunk:
4780 * nbytes += diff;
4781 @@ -1544,7 +1542,7 @@
4782
4783 kunmap_atomic(daddr, KM_SOFTIRQ0);
4784 } else {
4785 - nbytes -= src->length;
4786 + nbytes -= min(src->length, nbytes);
4787 idx++;
4788 }
4789
4790 @@ -1563,14 +1561,10 @@
4791 struct hifn_context *ctx = crypto_tfm_ctx(req->base.tfm);
4792 struct hifn_device *dev = ctx->dev;
4793 struct page *spage, *dpage;
4794 - unsigned long soff, doff, flags;
4795 + unsigned long soff, doff, dlen, flags;
4796 unsigned int nbytes = req->nbytes, idx = 0, len;
4797 int err = -EINVAL, sg_num;
4798 struct scatterlist *src, *dst, *t;
4799 - unsigned blocksize =
4800 - crypto_ablkcipher_blocksize(crypto_ablkcipher_reqtfm(req));
4801 - unsigned alignmask =
4802 - crypto_ablkcipher_alignmask(crypto_ablkcipher_reqtfm(req));
4803
4804 if (ctx->iv && !ctx->ivsize && ctx->mode != ACRYPTO_MODE_ECB)
4805 goto err_out_exit;
4806 @@ -1578,17 +1572,14 @@
4807 ctx->walk.flags = 0;
4808
4809 while (nbytes) {
4810 - src = &req->src[idx];
4811 dst = &req->dst[idx];
4812 + dlen = min(dst->length, nbytes);
4813
4814 - if (src->length & (blocksize - 1) ||
4815 - src->offset & (alignmask - 1) ||
4816 - dst->length & (blocksize - 1) ||
4817 - dst->offset & (alignmask - 1)) {
4818 + if (!IS_ALIGNED(dst->offset, HIFN_D_DST_DALIGN) ||
4819 + !IS_ALIGNED(dlen, HIFN_D_DST_DALIGN))
4820 ctx->walk.flags |= ASYNC_FLAGS_MISALIGNED;
4821 - }
4822
4823 - nbytes -= src->length;
4824 + nbytes -= dlen;
4825 idx++;
4826 }
4827
4828 @@ -1602,7 +1593,10 @@
4829 idx = 0;
4830
4831 sg_num = ablkcipher_walk(req, &ctx->walk);
4832 -
4833 + if (sg_num < 0) {
4834 + err = sg_num;
4835 + goto err_out_exit;
4836 + }
4837 atomic_set(&ctx->sg_num, sg_num);
4838
4839 spin_lock_irqsave(&dev->lock, flags);
4840 @@ -1640,7 +1634,7 @@
4841 if (err)
4842 goto err_out;
4843
4844 - nbytes -= len;
4845 + nbytes -= min(len, nbytes);
4846 }
4847
4848 dev->active = HIFN_DEFAULT_ACTIVE_NUM;
4849 @@ -1651,7 +1645,7 @@
4850 err_out:
4851 spin_unlock_irqrestore(&dev->lock, flags);
4852 err_out_exit:
4853 - if (err && printk_ratelimit())
4854 + if (err)
4855 dprintk("%s: iv: %p [%d], key: %p [%d], mode: %u, op: %u, "
4856 "type: %u, err: %d.\n",
4857 dev->name, ctx->iv, ctx->ivsize,
4858 @@ -1745,8 +1739,7 @@
4859 return -EINVAL;
4860
4861 while (size) {
4862 -
4863 - copy = min(dst->length, srest);
4864 + copy = min(srest, min(dst->length, size));
4865
4866 daddr = kmap_atomic(sg_page(dst), KM_IRQ0);
4867 memcpy(daddr + dst->offset + offset, saddr, copy);
4868 @@ -1803,7 +1796,7 @@
4869 sg_page(dst), dst->length, nbytes);
4870
4871 if (!t->length) {
4872 - nbytes -= dst->length;
4873 + nbytes -= min(dst->length, nbytes);
4874 idx++;
4875 continue;
4876 }
4877 @@ -2202,9 +2195,9 @@
4878 return err;
4879
4880 if (dev->started < HIFN_QUEUE_LENGTH && dev->queue.qlen)
4881 - err = hifn_process_queue(dev);
4882 + hifn_process_queue(dev);
4883
4884 - return err;
4885 + return -EINPROGRESS;
4886 }
4887
4888 /*
4889 @@ -2364,7 +2357,7 @@
4890 * 3DES ECB, CBC, CFB and OFB modes.
4891 */
4892 {
4893 - .name = "cfb(des3_ede)", .drv_name = "hifn-3des", .bsize = 8,
4894 + .name = "cfb(des3_ede)", .drv_name = "cfb-3des", .bsize = 8,
4895 .ablkcipher = {
4896 .min_keysize = HIFN_3DES_KEY_LENGTH,
4897 .max_keysize = HIFN_3DES_KEY_LENGTH,
4898 @@ -2374,7 +2367,7 @@
4899 },
4900 },
4901 {
4902 - .name = "ofb(des3_ede)", .drv_name = "hifn-3des", .bsize = 8,
4903 + .name = "ofb(des3_ede)", .drv_name = "ofb-3des", .bsize = 8,
4904 .ablkcipher = {
4905 .min_keysize = HIFN_3DES_KEY_LENGTH,
4906 .max_keysize = HIFN_3DES_KEY_LENGTH,
4907 @@ -2384,8 +2377,9 @@
4908 },
4909 },
4910 {
4911 - .name = "cbc(des3_ede)", .drv_name = "hifn-3des", .bsize = 8,
4912 + .name = "cbc(des3_ede)", .drv_name = "cbc-3des", .bsize = 8,
4913 .ablkcipher = {
4914 + .ivsize = HIFN_IV_LENGTH,
4915 .min_keysize = HIFN_3DES_KEY_LENGTH,
4916 .max_keysize = HIFN_3DES_KEY_LENGTH,
4917 .setkey = hifn_setkey,
4918 @@ -2394,7 +2388,7 @@
4919 },
4920 },
4921 {
4922 - .name = "ecb(des3_ede)", .drv_name = "hifn-3des", .bsize = 8,
4923 + .name = "ecb(des3_ede)", .drv_name = "ecb-3des", .bsize = 8,
4924 .ablkcipher = {
4925 .min_keysize = HIFN_3DES_KEY_LENGTH,
4926 .max_keysize = HIFN_3DES_KEY_LENGTH,
4927 @@ -2408,7 +2402,7 @@
4928 * DES ECB, CBC, CFB and OFB modes.
4929 */
4930 {
4931 - .name = "cfb(des)", .drv_name = "hifn-des", .bsize = 8,
4932 + .name = "cfb(des)", .drv_name = "cfb-des", .bsize = 8,
4933 .ablkcipher = {
4934 .min_keysize = HIFN_DES_KEY_LENGTH,
4935 .max_keysize = HIFN_DES_KEY_LENGTH,
4936 @@ -2418,7 +2412,7 @@
4937 },
4938 },
4939 {
4940 - .name = "ofb(des)", .drv_name = "hifn-des", .bsize = 8,
4941 + .name = "ofb(des)", .drv_name = "ofb-des", .bsize = 8,
4942 .ablkcipher = {
4943 .min_keysize = HIFN_DES_KEY_LENGTH,
4944 .max_keysize = HIFN_DES_KEY_LENGTH,
4945 @@ -2428,8 +2422,9 @@
4946 },
4947 },
4948 {
4949 - .name = "cbc(des)", .drv_name = "hifn-des", .bsize = 8,
4950 + .name = "cbc(des)", .drv_name = "cbc-des", .bsize = 8,
4951 .ablkcipher = {
4952 + .ivsize = HIFN_IV_LENGTH,
4953 .min_keysize = HIFN_DES_KEY_LENGTH,
4954 .max_keysize = HIFN_DES_KEY_LENGTH,
4955 .setkey = hifn_setkey,
4956 @@ -2438,7 +2433,7 @@
4957 },
4958 },
4959 {
4960 - .name = "ecb(des)", .drv_name = "hifn-des", .bsize = 8,
4961 + .name = "ecb(des)", .drv_name = "ecb-des", .bsize = 8,
4962 .ablkcipher = {
4963 .min_keysize = HIFN_DES_KEY_LENGTH,
4964 .max_keysize = HIFN_DES_KEY_LENGTH,
4965 @@ -2452,7 +2447,7 @@
4966 * AES ECB, CBC, CFB and OFB modes.
4967 */
4968 {
4969 - .name = "ecb(aes)", .drv_name = "hifn-aes", .bsize = 16,
4970 + .name = "ecb(aes)", .drv_name = "ecb-aes", .bsize = 16,
4971 .ablkcipher = {
4972 .min_keysize = AES_MIN_KEY_SIZE,
4973 .max_keysize = AES_MAX_KEY_SIZE,
4974 @@ -2462,8 +2457,9 @@
4975 },
4976 },
4977 {
4978 - .name = "cbc(aes)", .drv_name = "hifn-aes", .bsize = 16,
4979 + .name = "cbc(aes)", .drv_name = "cbc-aes", .bsize = 16,
4980 .ablkcipher = {
4981 + .ivsize = HIFN_AES_IV_LENGTH,
4982 .min_keysize = AES_MIN_KEY_SIZE,
4983 .max_keysize = AES_MAX_KEY_SIZE,
4984 .setkey = hifn_setkey,
4985 @@ -2472,7 +2468,7 @@
4986 },
4987 },
4988 {
4989 - .name = "cfb(aes)", .drv_name = "hifn-aes", .bsize = 16,
4990 + .name = "cfb(aes)", .drv_name = "cfb-aes", .bsize = 16,
4991 .ablkcipher = {
4992 .min_keysize = AES_MIN_KEY_SIZE,
4993 .max_keysize = AES_MAX_KEY_SIZE,
4994 @@ -2482,7 +2478,7 @@
4995 },
4996 },
4997 {
4998 - .name = "ofb(aes)", .drv_name = "hifn-aes", .bsize = 16,
4999 + .name = "ofb(aes)", .drv_name = "ofb-aes", .bsize = 16,
5000 .ablkcipher = {
5001 .min_keysize = AES_MIN_KEY_SIZE,
5002 .max_keysize = AES_MAX_KEY_SIZE,
5003 @@ -2514,15 +2510,14 @@
5004 return -ENOMEM;
5005
5006 snprintf(alg->alg.cra_name, CRYPTO_MAX_ALG_NAME, "%s", t->name);
5007 - snprintf(alg->alg.cra_driver_name, CRYPTO_MAX_ALG_NAME, "%s", t->drv_name);
5008 + snprintf(alg->alg.cra_driver_name, CRYPTO_MAX_ALG_NAME, "%s-%s",
5009 + t->drv_name, dev->name);
5010
5011 alg->alg.cra_priority = 300;
5012 alg->alg.cra_flags = CRYPTO_ALG_TYPE_ABLKCIPHER | CRYPTO_ALG_ASYNC;
5013 alg->alg.cra_blocksize = t->bsize;
5014 alg->alg.cra_ctxsize = sizeof(struct hifn_context);
5015 - alg->alg.cra_alignmask = 15;
5016 - if (t->bsize == 8)
5017 - alg->alg.cra_alignmask = 3;
5018 + alg->alg.cra_alignmask = 0;
5019 alg->alg.cra_type = &crypto_ablkcipher_type;
5020 alg->alg.cra_module = THIS_MODULE;
5021 alg->alg.cra_u.ablkcipher = t->ablkcipher;
5022 --- /dev/null
5023 +++ b/drivers/crypto/ixp4xx_crypto.c
5024 @@ -0,0 +1,1506 @@
5025 +/*
5026 + * Intel IXP4xx NPE-C crypto driver
5027 + *
5028 + * Copyright (C) 2008 Christian Hohnstaedt <chohnstaedt@innominate.com>
5029 + *
5030 + * This program is free software; you can redistribute it and/or modify it
5031 + * under the terms of version 2 of the GNU General Public License
5032 + * as published by the Free Software Foundation.
5033 + *
5034 + */
5035 +
5036 +#include <linux/platform_device.h>
5037 +#include <linux/dma-mapping.h>
5038 +#include <linux/dmapool.h>
5039 +#include <linux/crypto.h>
5040 +#include <linux/kernel.h>
5041 +#include <linux/rtnetlink.h>
5042 +#include <linux/interrupt.h>
5043 +#include <linux/spinlock.h>
5044 +
5045 +#include <crypto/ctr.h>
5046 +#include <crypto/des.h>
5047 +#include <crypto/aes.h>
5048 +#include <crypto/sha.h>
5049 +#include <crypto/algapi.h>
5050 +#include <crypto/aead.h>
5051 +#include <crypto/authenc.h>
5052 +#include <crypto/scatterwalk.h>
5053 +
5054 +#include <asm/arch/npe.h>
5055 +#include <asm/arch/qmgr.h>
5056 +
5057 +#define MAX_KEYLEN 32
5058 +
5059 +/* hash: cfgword + 2 * digestlen; crypt: keylen + cfgword */
5060 +#define NPE_CTX_LEN 80
5061 +#define AES_BLOCK128 16
5062 +
5063 +#define NPE_OP_HASH_VERIFY 0x01
5064 +#define NPE_OP_CCM_ENABLE 0x04
5065 +#define NPE_OP_CRYPT_ENABLE 0x08
5066 +#define NPE_OP_HASH_ENABLE 0x10
5067 +#define NPE_OP_NOT_IN_PLACE 0x20
5068 +#define NPE_OP_HMAC_DISABLE 0x40
5069 +#define NPE_OP_CRYPT_ENCRYPT 0x80
5070 +
5071 +#define NPE_OP_CCM_GEN_MIC 0xcc
5072 +#define NPE_OP_HASH_GEN_ICV 0x50
5073 +#define NPE_OP_ENC_GEN_KEY 0xc9
5074 +
5075 +#define MOD_ECB 0x0000
5076 +#define MOD_CTR 0x1000
5077 +#define MOD_CBC_ENC 0x2000
5078 +#define MOD_CBC_DEC 0x3000
5079 +#define MOD_CCM_ENC 0x4000
5080 +#define MOD_CCM_DEC 0x5000
5081 +
5082 +#define KEYLEN_128 4
5083 +#define KEYLEN_192 6
5084 +#define KEYLEN_256 8
5085 +
5086 +#define CIPH_DECR 0x0000
5087 +#define CIPH_ENCR 0x0400
5088 +
5089 +#define MOD_DES 0x0000
5090 +#define MOD_TDEA2 0x0100
5091 +#define MOD_3DES 0x0200
5092 +#define MOD_AES 0x0800
5093 +#define MOD_AES128 (0x0800 | KEYLEN_128)
5094 +#define MOD_AES192 (0x0900 | KEYLEN_192)
5095 +#define MOD_AES256 (0x0a00 | KEYLEN_256)
5096 +
5097 +#define MAX_IVLEN 16
5098 +#define NPE_ID 2 /* NPE C */
5099 +#define NPE_QLEN 16
5100 +/* Space for registering when the first
5101 + * NPE_QLEN crypt_ctl are busy */
5102 +#define NPE_QLEN_TOTAL 64
5103 +
5104 +#define SEND_QID 29
5105 +#define RECV_QID 30
5106 +
5107 +#define CTL_FLAG_UNUSED 0x0000
5108 +#define CTL_FLAG_USED 0x1000
5109 +#define CTL_FLAG_PERFORM_ABLK 0x0001
5110 +#define CTL_FLAG_GEN_ICV 0x0002
5111 +#define CTL_FLAG_GEN_REVAES 0x0004
5112 +#define CTL_FLAG_PERFORM_AEAD 0x0008
5113 +#define CTL_FLAG_MASK 0x000f
5114 +
5115 +#define HMAC_IPAD_VALUE 0x36
5116 +#define HMAC_OPAD_VALUE 0x5C
5117 +#define HMAC_PAD_BLOCKLEN SHA1_BLOCK_SIZE
5118 +
5119 +#define MD5_DIGEST_SIZE 16
5120 +
5121 +struct buffer_desc {
5122 + u32 phys_next;
5123 + u16 buf_len;
5124 + u16 pkt_len;
5125 + u32 phys_addr;
5126 + u32 __reserved[4];
5127 + struct buffer_desc *next;
5128 +};
5129 +
5130 +struct crypt_ctl {
5131 + u8 mode; /* NPE_OP_* operation mode */
5132 + u8 init_len;
5133 + u16 reserved;
5134 + u8 iv[MAX_IVLEN]; /* IV for CBC mode or CTR IV for CTR mode */
5135 + u32 icv_rev_aes; /* icv or rev aes */
5136 + u32 src_buf;
5137 + u32 dst_buf;
5138 + u16 auth_offs; /* Authentication start offset */
5139 + u16 auth_len; /* Authentication data length */
5140 + u16 crypt_offs; /* Cryption start offset */
5141 + u16 crypt_len; /* Cryption data length */
5142 + u32 aadAddr; /* Additional Auth Data Addr for CCM mode */
5143 + u32 crypto_ctx; /* NPE Crypto Param structure address */
5144 +
5145 + /* Used by Host: 4*4 bytes*/
5146 + unsigned ctl_flags;
5147 + union {
5148 + struct ablkcipher_request *ablk_req;
5149 + struct aead_request *aead_req;
5150 + struct crypto_tfm *tfm;
5151 + } data;
5152 + struct buffer_desc *regist_buf;
5153 + u8 *regist_ptr;
5154 +};
5155 +
5156 +struct ablk_ctx {
5157 + struct buffer_desc *src;
5158 + struct buffer_desc *dst;
5159 + unsigned src_nents;
5160 + unsigned dst_nents;
5161 +};
5162 +
5163 +struct aead_ctx {
5164 + struct buffer_desc *buffer;
5165 + unsigned short assoc_nents;
5166 + unsigned short src_nents;
5167 + struct scatterlist ivlist;
5168 + /* used when the hmac is not on one sg entry */
5169 + u8 *hmac_virt;
5170 + int encrypt;
5171 +};
5172 +
5173 +struct ix_hash_algo {
5174 + u32 cfgword;
5175 + unsigned char *icv;
5176 +};
5177 +
5178 +struct ix_sa_dir {
5179 + unsigned char *npe_ctx;
5180 + dma_addr_t npe_ctx_phys;
5181 + int npe_ctx_idx;
5182 + u8 npe_mode;
5183 +};
5184 +
5185 +struct ixp_ctx {
5186 + struct ix_sa_dir encrypt;
5187 + struct ix_sa_dir decrypt;
5188 + int authkey_len;
5189 + u8 authkey[MAX_KEYLEN];
5190 + int enckey_len;
5191 + u8 enckey[MAX_KEYLEN];
5192 + u8 salt[MAX_IVLEN];
5193 + u8 nonce[CTR_RFC3686_NONCE_SIZE];
5194 + unsigned salted;
5195 + atomic_t configuring;
5196 + struct completion completion;
5197 +};
5198 +
5199 +struct ixp_alg {
5200 + struct crypto_alg crypto;
5201 + const struct ix_hash_algo *hash;
5202 + u32 cfg_enc;
5203 + u32 cfg_dec;
5204 +
5205 + int registered;
5206 +};
5207 +
5208 +static const struct ix_hash_algo hash_alg_md5 = {
5209 + .cfgword = 0xAA010004,
5210 + .icv = "\x01\x23\x45\x67\x89\xAB\xCD\xEF"
5211 + "\xFE\xDC\xBA\x98\x76\x54\x32\x10",
5212 +};
5213 +static const struct ix_hash_algo hash_alg_sha1 = {
5214 + .cfgword = 0x00000005,
5215 + .icv = "\x67\x45\x23\x01\xEF\xCD\xAB\x89\x98\xBA"
5216 + "\xDC\xFE\x10\x32\x54\x76\xC3\xD2\xE1\xF0",
5217 +};
5218 +
5219 +static struct npe *npe_c;
5220 +static struct dma_pool *buffer_pool = NULL;
5221 +static struct dma_pool *ctx_pool = NULL;
5222 +
5223 +static struct crypt_ctl *crypt_virt = NULL;
5224 +static dma_addr_t crypt_phys;
5225 +
5226 +static int support_aes = 1;
5227 +
5228 +static void dev_release(struct device *dev)
5229 +{
5230 + return;
5231 +}
5232 +
5233 +#define DRIVER_NAME "ixp4xx_crypto"
5234 +static struct platform_device pseudo_dev = {
5235 + .name = DRIVER_NAME,
5236 + .id = 0,
5237 + .num_resources = 0,
5238 + .dev = {
5239 + .coherent_dma_mask = DMA_32BIT_MASK,
5240 + .release = dev_release,
5241 + }
5242 +};
5243 +
5244 +static struct device *dev = &pseudo_dev.dev;
5245 +
5246 +static inline dma_addr_t crypt_virt2phys(struct crypt_ctl *virt)
5247 +{
5248 + return crypt_phys + (virt - crypt_virt) * sizeof(struct crypt_ctl);
5249 +}
5250 +
5251 +static inline struct crypt_ctl *crypt_phys2virt(dma_addr_t phys)
5252 +{
5253 + return crypt_virt + (phys - crypt_phys) / sizeof(struct crypt_ctl);
5254 +}
5255 +
5256 +static inline u32 cipher_cfg_enc(struct crypto_tfm *tfm)
5257 +{
5258 + return container_of(tfm->__crt_alg, struct ixp_alg,crypto)->cfg_enc;
5259 +}
5260 +
5261 +static inline u32 cipher_cfg_dec(struct crypto_tfm *tfm)
5262 +{
5263 + return container_of(tfm->__crt_alg, struct ixp_alg,crypto)->cfg_dec;
5264 +}
5265 +
5266 +static inline const struct ix_hash_algo *ix_hash(struct crypto_tfm *tfm)
5267 +{
5268 + return container_of(tfm->__crt_alg, struct ixp_alg, crypto)->hash;
5269 +}
5270 +
5271 +static int setup_crypt_desc(void)
5272 +{
5273 + BUILD_BUG_ON(sizeof(struct crypt_ctl) != 64);
5274 + crypt_virt = dma_alloc_coherent(dev,
5275 + NPE_QLEN * sizeof(struct crypt_ctl),
5276 + &crypt_phys, GFP_KERNEL);
5277 + if (!crypt_virt)
5278 + return -ENOMEM;
5279 + memset(crypt_virt, 0, NPE_QLEN * sizeof(struct crypt_ctl));
5280 + return 0;
5281 +}
5282 +
5283 +static spinlock_t desc_lock;
5284 +static struct crypt_ctl *get_crypt_desc(void)
5285 +{
5286 + int i;
5287 + static int idx = 0;
5288 + unsigned long flags;
5289 +
5290 + spin_lock_irqsave(&desc_lock, flags);
5291 +
5292 + if (unlikely(!crypt_virt))
5293 + setup_crypt_desc();
5294 + if (unlikely(!crypt_virt)) {
5295 + spin_unlock_irqrestore(&desc_lock, flags);
5296 + return NULL;
5297 + }
5298 + i = idx;
5299 + if (crypt_virt[i].ctl_flags == CTL_FLAG_UNUSED) {
5300 + if (++idx >= NPE_QLEN)
5301 + idx = 0;
5302 + crypt_virt[i].ctl_flags = CTL_FLAG_USED;
5303 + spin_unlock_irqrestore(&desc_lock, flags);
5304 + return crypt_virt +i;
5305 + } else {
5306 + spin_unlock_irqrestore(&desc_lock, flags);
5307 + return NULL;
5308 + }
5309 +}
5310 +
5311 +static spinlock_t emerg_lock;
5312 +static struct crypt_ctl *get_crypt_desc_emerg(void)
5313 +{
5314 + int i;
5315 + static int idx = NPE_QLEN;
5316 + struct crypt_ctl *desc;
5317 + unsigned long flags;
5318 +
5319 + desc = get_crypt_desc();
5320 + if (desc)
5321 + return desc;
5322 + if (unlikely(!crypt_virt))
5323 + return NULL;
5324 +
5325 + spin_lock_irqsave(&emerg_lock, flags);
5326 + i = idx;
5327 + if (crypt_virt[i].ctl_flags == CTL_FLAG_UNUSED) {
5328 + if (++idx >= NPE_QLEN_TOTAL)
5329 + idx = NPE_QLEN;
5330 + crypt_virt[i].ctl_flags = CTL_FLAG_USED;
5331 + spin_unlock_irqrestore(&emerg_lock, flags);
5332 + return crypt_virt +i;
5333 + } else {
5334 + spin_unlock_irqrestore(&emerg_lock, flags);
5335 + return NULL;
5336 + }
5337 +}
5338 +
5339 +static void free_buf_chain(struct buffer_desc *buf, u32 phys)
5340 +{
5341 + while (buf) {
5342 + struct buffer_desc *buf1;
5343 + u32 phys1;
5344 +
5345 + buf1 = buf->next;
5346 + phys1 = buf->phys_next;
5347 + dma_pool_free(buffer_pool, buf, phys);
5348 + buf = buf1;
5349 + phys = phys1;
5350 + }
5351 +}
5352 +
5353 +static struct tasklet_struct crypto_done_tasklet;
5354 +
5355 +static void finish_scattered_hmac(struct crypt_ctl *crypt)
5356 +{
5357 + struct aead_request *req = crypt->data.aead_req;
5358 + struct aead_ctx *req_ctx = aead_request_ctx(req);
5359 + struct crypto_aead *tfm = crypto_aead_reqtfm(req);
5360 + int authsize = crypto_aead_authsize(tfm);
5361 + int decryptlen = req->cryptlen - authsize;
5362 +
5363 + if (req_ctx->encrypt) {
5364 + scatterwalk_map_and_copy(req_ctx->hmac_virt,
5365 + req->src, decryptlen, authsize, 1);
5366 + }
5367 + dma_pool_free(buffer_pool, req_ctx->hmac_virt, crypt->icv_rev_aes);
5368 +}
5369 +
5370 +static void one_packet(dma_addr_t phys)
5371 +{
5372 + struct crypt_ctl *crypt;
5373 + struct ixp_ctx *ctx;
5374 + int failed;
5375 + enum dma_data_direction src_direction = DMA_BIDIRECTIONAL;
5376 +
5377 + failed = phys & 0x1 ? -EBADMSG : 0;
5378 + phys &= ~0x3;
5379 + crypt = crypt_phys2virt(phys);
5380 +
5381 + switch (crypt->ctl_flags & CTL_FLAG_MASK) {
5382 + case CTL_FLAG_PERFORM_AEAD: {
5383 + struct aead_request *req = crypt->data.aead_req;
5384 + struct aead_ctx *req_ctx = aead_request_ctx(req);
5385 + dma_unmap_sg(dev, req->assoc, req_ctx->assoc_nents,
5386 + DMA_TO_DEVICE);
5387 + dma_unmap_sg(dev, &req_ctx->ivlist, 1, DMA_BIDIRECTIONAL);
5388 + dma_unmap_sg(dev, req->src, req_ctx->src_nents,
5389 + DMA_BIDIRECTIONAL);
5390 +
5391 + free_buf_chain(req_ctx->buffer, crypt->src_buf);
5392 + if (req_ctx->hmac_virt) {
5393 + finish_scattered_hmac(crypt);
5394 + }
5395 + req->base.complete(&req->base, failed);
5396 + break;
5397 + }
5398 + case CTL_FLAG_PERFORM_ABLK: {
5399 + struct ablkcipher_request *req = crypt->data.ablk_req;
5400 + struct ablk_ctx *req_ctx = ablkcipher_request_ctx(req);
5401 + int nents;
5402 + if (req_ctx->dst) {
5403 + nents = req_ctx->dst_nents;
5404 + dma_unmap_sg(dev, req->dst, nents, DMA_FROM_DEVICE);
5405 + free_buf_chain(req_ctx->dst, crypt->dst_buf);
5406 + src_direction = DMA_TO_DEVICE;
5407 + }
5408 + nents = req_ctx->src_nents;
5409 + dma_unmap_sg(dev, req->src, nents, src_direction);
5410 + free_buf_chain(req_ctx->src, crypt->src_buf);
5411 + req->base.complete(&req->base, failed);
5412 + break;
5413 + }
5414 + case CTL_FLAG_GEN_ICV:
5415 + ctx = crypto_tfm_ctx(crypt->data.tfm);
5416 + dma_pool_free(ctx_pool, crypt->regist_ptr,
5417 + crypt->regist_buf->phys_addr);
5418 + dma_pool_free(buffer_pool, crypt->regist_buf, crypt->src_buf);
5419 + if (atomic_dec_and_test(&ctx->configuring))
5420 + complete(&ctx->completion);
5421 + break;
5422 + case CTL_FLAG_GEN_REVAES:
5423 + ctx = crypto_tfm_ctx(crypt->data.tfm);
5424 + *(u32*)ctx->decrypt.npe_ctx &= cpu_to_be32(~CIPH_ENCR);
5425 + if (atomic_dec_and_test(&ctx->configuring))
5426 + complete(&ctx->completion);
5427 + break;
5428 + default:
5429 + BUG();
5430 + }
5431 + crypt->ctl_flags = CTL_FLAG_UNUSED;
5432 +}
5433 +
5434 +static void irqhandler(void *_unused)
5435 +{
5436 + tasklet_schedule(&crypto_done_tasklet);
5437 +}
5438 +
5439 +static void crypto_done_action(unsigned long arg)
5440 +{
5441 + int i;
5442 +
5443 + for(i=0; i<4; i++) {
5444 + dma_addr_t phys = qmgr_get_entry(RECV_QID);
5445 + if (!phys)
5446 + return;
5447 + one_packet(phys);
5448 + }
5449 + tasklet_schedule(&crypto_done_tasklet);
5450 +}
5451 +
5452 +static int init_ixp_crypto(void)
5453 +{
5454 + int ret = -ENODEV;
5455 +
5456 + if (! ( ~(*IXP4XX_EXP_CFG2) & (IXP4XX_FEATURE_HASH |
5457 + IXP4XX_FEATURE_AES | IXP4XX_FEATURE_DES))) {
5458 + printk(KERN_ERR "ixp_crypto: No HW crypto available\n");
5459 + return ret;
5460 + }
5461 + npe_c = npe_request(NPE_ID);
5462 + if (!npe_c)
5463 + return ret;
5464 +
5465 + if (!npe_running(npe_c)) {
5466 + npe_load_firmware(npe_c, npe_name(npe_c), dev);
5467 + }
5468 +
5469 + /* buffer_pool will also be used to sometimes store the hmac,
5470 + * so assure it is large enough
5471 + */
5472 + BUILD_BUG_ON(SHA1_DIGEST_SIZE > sizeof(struct buffer_desc));
5473 + buffer_pool = dma_pool_create("buffer", dev,
5474 + sizeof(struct buffer_desc), 32, 0);
5475 + ret = -ENOMEM;
5476 + if (!buffer_pool) {
5477 + goto err;
5478 + }
5479 + ctx_pool = dma_pool_create("context", dev,
5480 + NPE_CTX_LEN, 16, 0);
5481 + if (!ctx_pool) {
5482 + goto err;
5483 + }
5484 + ret = qmgr_request_queue(SEND_QID, NPE_QLEN_TOTAL, 0, 0);
5485 + if (ret)
5486 + goto err;
5487 + ret = qmgr_request_queue(RECV_QID, NPE_QLEN, 0, 0);
5488 + if (ret) {
5489 + qmgr_release_queue(SEND_QID);
5490 + goto err;
5491 + }
5492 + qmgr_set_irq(RECV_QID, QUEUE_IRQ_SRC_NOT_EMPTY, irqhandler, NULL);
5493 + tasklet_init(&crypto_done_tasklet, crypto_done_action, 0);
5494 +
5495 + qmgr_enable_irq(RECV_QID);
5496 + return 0;
5497 +err:
5498 + if (ctx_pool)
5499 + dma_pool_destroy(ctx_pool);
5500 + if (buffer_pool)
5501 + dma_pool_destroy(buffer_pool);
5502 + npe_release(npe_c);
5503 + return ret;
5504 +}
5505 +
5506 +static void release_ixp_crypto(void)
5507 +{
5508 + qmgr_disable_irq(RECV_QID);
5509 + tasklet_kill(&crypto_done_tasklet);
5510 +
5511 + qmgr_release_queue(SEND_QID);
5512 + qmgr_release_queue(RECV_QID);
5513 +
5514 + dma_pool_destroy(ctx_pool);
5515 + dma_pool_destroy(buffer_pool);
5516 +
5517 + npe_release(npe_c);
5518 +
5519 + if (crypt_virt) {
5520 + dma_free_coherent(dev,
5521 + NPE_QLEN_TOTAL * sizeof( struct crypt_ctl),
5522 + crypt_virt, crypt_phys);
5523 + }
5524 + return;
5525 +}
5526 +
5527 +static void reset_sa_dir(struct ix_sa_dir *dir)
5528 +{
5529 + memset(dir->npe_ctx, 0, NPE_CTX_LEN);
5530 + dir->npe_ctx_idx = 0;
5531 + dir->npe_mode = 0;
5532 +}
5533 +
5534 +static int init_sa_dir(struct ix_sa_dir *dir)
5535 +{
5536 + dir->npe_ctx = dma_pool_alloc(ctx_pool, GFP_KERNEL, &dir->npe_ctx_phys);
5537 + if (!dir->npe_ctx) {
5538 + return -ENOMEM;
5539 + }
5540 + reset_sa_dir(dir);
5541 + return 0;
5542 +}
5543 +
5544 +static void free_sa_dir(struct ix_sa_dir *dir)
5545 +{
5546 + memset(dir->npe_ctx, 0, NPE_CTX_LEN);
5547 + dma_pool_free(ctx_pool, dir->npe_ctx, dir->npe_ctx_phys);
5548 +}
5549 +
5550 +static int init_tfm(struct crypto_tfm *tfm)
5551 +{
5552 + struct ixp_ctx *ctx = crypto_tfm_ctx(tfm);
5553 + int ret;
5554 +
5555 + atomic_set(&ctx->configuring, 0);
5556 + ret = init_sa_dir(&ctx->encrypt);
5557 + if (ret)
5558 + return ret;
5559 + ret = init_sa_dir(&ctx->decrypt);
5560 + if (ret) {
5561 + free_sa_dir(&ctx->encrypt);
5562 + }
5563 + return ret;
5564 +}
5565 +
5566 +static int init_tfm_ablk(struct crypto_tfm *tfm)
5567 +{
5568 + tfm->crt_ablkcipher.reqsize = sizeof(struct ablk_ctx);
5569 + return init_tfm(tfm);
5570 +}
5571 +
5572 +static int init_tfm_aead(struct crypto_tfm *tfm)
5573 +{
5574 + tfm->crt_aead.reqsize = sizeof(struct aead_ctx);
5575 + return init_tfm(tfm);
5576 +}
5577 +
5578 +static void exit_tfm(struct crypto_tfm *tfm)
5579 +{
5580 + struct ixp_ctx *ctx = crypto_tfm_ctx(tfm);
5581 + free_sa_dir(&ctx->encrypt);
5582 + free_sa_dir(&ctx->decrypt);
5583 +}
5584 +
5585 +static int register_chain_var(struct crypto_tfm *tfm, u8 xpad, u32 target,
5586 + int init_len, u32 ctx_addr, const u8 *key, int key_len)
5587 +{
5588 + struct ixp_ctx *ctx = crypto_tfm_ctx(tfm);
5589 + struct crypt_ctl *crypt;
5590 + struct buffer_desc *buf;
5591 + int i;
5592 + u8 *pad;
5593 + u32 pad_phys, buf_phys;
5594 +
5595 + BUILD_BUG_ON(NPE_CTX_LEN < HMAC_PAD_BLOCKLEN);
5596 + pad = dma_pool_alloc(ctx_pool, GFP_KERNEL, &pad_phys);
5597 + if (!pad)
5598 + return -ENOMEM;
5599 + buf = dma_pool_alloc(buffer_pool, GFP_KERNEL, &buf_phys);
5600 + if (!buf) {
5601 + dma_pool_free(ctx_pool, pad, pad_phys);
5602 + return -ENOMEM;
5603 + }
5604 + crypt = get_crypt_desc_emerg();
5605 + if (!crypt) {
5606 + dma_pool_free(ctx_pool, pad, pad_phys);
5607 + dma_pool_free(buffer_pool, buf, buf_phys);
5608 + return -EAGAIN;
5609 + }
5610 +
5611 + memcpy(pad, key, key_len);
5612 + memset(pad + key_len, 0, HMAC_PAD_BLOCKLEN - key_len);
5613 + for (i = 0; i < HMAC_PAD_BLOCKLEN; i++) {
5614 + pad[i] ^= xpad;
5615 + }
5616 +
5617 + crypt->data.tfm = tfm;
5618 + crypt->regist_ptr = pad;
5619 + crypt->regist_buf = buf;
5620 +
5621 + crypt->auth_offs = 0;
5622 + crypt->auth_len = HMAC_PAD_BLOCKLEN;
5623 + crypt->crypto_ctx = ctx_addr;
5624 + crypt->src_buf = buf_phys;
5625 + crypt->icv_rev_aes = target;
5626 + crypt->mode = NPE_OP_HASH_GEN_ICV;
5627 + crypt->init_len = init_len;
5628 + crypt->ctl_flags |= CTL_FLAG_GEN_ICV;
5629 +
5630 + buf->next = 0;
5631 + buf->buf_len = HMAC_PAD_BLOCKLEN;
5632 + buf->pkt_len = 0;
5633 + buf->phys_addr = pad_phys;
5634 +
5635 + atomic_inc(&ctx->configuring);
5636 + qmgr_put_entry(SEND_QID, crypt_virt2phys(crypt));
5637 + BUG_ON(qmgr_stat_overflow(SEND_QID));
5638 + return 0;
5639 +}
5640 +
5641 +static int setup_auth(struct crypto_tfm *tfm, int encrypt, unsigned authsize,
5642 + const u8 *key, int key_len, unsigned digest_len)
5643 +{
5644 + u32 itarget, otarget, npe_ctx_addr;
5645 + unsigned char *cinfo;
5646 + int init_len, ret = 0;
5647 + u32 cfgword;
5648 + struct ix_sa_dir *dir;
5649 + struct ixp_ctx *ctx = crypto_tfm_ctx(tfm);
5650 + const struct ix_hash_algo *algo;
5651 +
5652 + dir = encrypt ? &ctx->encrypt : &ctx->decrypt;
5653 + cinfo = dir->npe_ctx + dir->npe_ctx_idx;
5654 + algo = ix_hash(tfm);
5655 +
5656 + /* write cfg word to cryptinfo */
5657 + cfgword = algo->cfgword | ( authsize << 6); /* (authsize/4) << 8 */
5658 + *(u32*)cinfo = cpu_to_be32(cfgword);
5659 + cinfo += sizeof(cfgword);
5660 +
5661 + /* write ICV to cryptinfo */
5662 + memcpy(cinfo, algo->icv, digest_len);
5663 + cinfo += digest_len;
5664 +
5665 + itarget = dir->npe_ctx_phys + dir->npe_ctx_idx
5666 + + sizeof(algo->cfgword);
5667 + otarget = itarget + digest_len;
5668 + init_len = cinfo - (dir->npe_ctx + dir->npe_ctx_idx);
5669 + npe_ctx_addr = dir->npe_ctx_phys + dir->npe_ctx_idx;
5670 +
5671 + dir->npe_ctx_idx += init_len;
5672 + dir->npe_mode |= NPE_OP_HASH_ENABLE;
5673 +
5674 + if (!encrypt)
5675 + dir->npe_mode |= NPE_OP_HASH_VERIFY;
5676 +
5677 + ret = register_chain_var(tfm, HMAC_OPAD_VALUE, otarget,
5678 + init_len, npe_ctx_addr, key, key_len);
5679 + if (ret)
5680 + return ret;
5681 + return register_chain_var(tfm, HMAC_IPAD_VALUE, itarget,
5682 + init_len, npe_ctx_addr, key, key_len);
5683 +}
5684 +
5685 +static int gen_rev_aes_key(struct crypto_tfm *tfm)
5686 +{
5687 + struct crypt_ctl *crypt;
5688 + struct ixp_ctx *ctx = crypto_tfm_ctx(tfm);
5689 + struct ix_sa_dir *dir = &ctx->decrypt;
5690 +
5691 + crypt = get_crypt_desc_emerg();
5692 + if (!crypt) {
5693 + return -EAGAIN;
5694 + }
5695 + *(u32*)dir->npe_ctx |= cpu_to_be32(CIPH_ENCR);
5696 +
5697 + crypt->data.tfm = tfm;
5698 + crypt->crypt_offs = 0;
5699 + crypt->crypt_len = AES_BLOCK128;
5700 + crypt->src_buf = 0;
5701 + crypt->crypto_ctx = dir->npe_ctx_phys;
5702 + crypt->icv_rev_aes = dir->npe_ctx_phys + sizeof(u32);
5703 + crypt->mode = NPE_OP_ENC_GEN_KEY;
5704 + crypt->init_len = dir->npe_ctx_idx;
5705 + crypt->ctl_flags |= CTL_FLAG_GEN_REVAES;
5706 +
5707 + atomic_inc(&ctx->configuring);
5708 + qmgr_put_entry(SEND_QID, crypt_virt2phys(crypt));
5709 + BUG_ON(qmgr_stat_overflow(SEND_QID));
5710 + return 0;
5711 +}
5712 +
5713 +static int setup_cipher(struct crypto_tfm *tfm, int encrypt,
5714 + const u8 *key, int key_len)
5715 +{
5716 + u8 *cinfo;
5717 + u32 cipher_cfg;
5718 + u32 keylen_cfg = 0;
5719 + struct ix_sa_dir *dir;
5720 + struct ixp_ctx *ctx = crypto_tfm_ctx(tfm);
5721 + u32 *flags = &tfm->crt_flags;
5722 +
5723 + dir = encrypt ? &ctx->encrypt : &ctx->decrypt;
5724 + cinfo = dir->npe_ctx;
5725 +
5726 + if (encrypt) {
5727 + cipher_cfg = cipher_cfg_enc(tfm);
5728 + dir->npe_mode |= NPE_OP_CRYPT_ENCRYPT;
5729 + } else {
5730 + cipher_cfg = cipher_cfg_dec(tfm);
5731 + }
5732 + if (cipher_cfg & MOD_AES) {
5733 + switch (key_len) {
5734 + case 16: keylen_cfg = MOD_AES128 | KEYLEN_128; break;
5735 + case 24: keylen_cfg = MOD_AES192 | KEYLEN_192; break;
5736 + case 32: keylen_cfg = MOD_AES256 | KEYLEN_256; break;
5737 + default:
5738 + *flags |= CRYPTO_TFM_RES_BAD_KEY_LEN;
5739 + return -EINVAL;
5740 + }
5741 + cipher_cfg |= keylen_cfg;
5742 + } else if (cipher_cfg & MOD_3DES) {
5743 + const u32 *K = (const u32 *)key;
5744 + if (unlikely(!((K[0] ^ K[2]) | (K[1] ^ K[3])) ||
5745 + !((K[2] ^ K[4]) | (K[3] ^ K[5]))))
5746 + {
5747 + *flags |= CRYPTO_TFM_RES_BAD_KEY_SCHED;
5748 + return -EINVAL;
5749 + }
5750 + } else {
5751 + u32 tmp[DES_EXPKEY_WORDS];
5752 + if (des_ekey(tmp, key) == 0) {
5753 + *flags |= CRYPTO_TFM_RES_WEAK_KEY;
5754 + }
5755 + }
5756 + /* write cfg word to cryptinfo */
5757 + *(u32*)cinfo = cpu_to_be32(cipher_cfg);
5758 + cinfo += sizeof(cipher_cfg);
5759 +
5760 + /* write cipher key to cryptinfo */
5761 + memcpy(cinfo, key, key_len);
5762 + /* NPE wants keylen set to DES3_EDE_KEY_SIZE even for single DES */
5763 + if (key_len < DES3_EDE_KEY_SIZE && !(cipher_cfg & MOD_AES)) {
5764 + memset(cinfo + key_len, 0, DES3_EDE_KEY_SIZE -key_len);
5765 + key_len = DES3_EDE_KEY_SIZE;
5766 + }
5767 + dir->npe_ctx_idx = sizeof(cipher_cfg) + key_len;
5768 + dir->npe_mode |= NPE_OP_CRYPT_ENABLE;
5769 + if ((cipher_cfg & MOD_AES) && !encrypt) {
5770 + return gen_rev_aes_key(tfm);
5771 + }
5772 + return 0;
5773 +}
5774 +
5775 +static int count_sg(struct scatterlist *sg, int nbytes)
5776 +{
5777 + int i;
5778 + for (i = 0; nbytes > 0; i++, sg = sg_next(sg))
5779 + nbytes -= sg->length;
5780 + return i;
5781 +}
5782 +
5783 +static struct buffer_desc *chainup_buffers(struct scatterlist *sg,
5784 + unsigned nbytes, struct buffer_desc *buf, gfp_t flags)
5785 +{
5786 + int nents = 0;
5787 +
5788 + while (nbytes > 0) {
5789 + struct buffer_desc *next_buf;
5790 + u32 next_buf_phys;
5791 + unsigned len = min(nbytes, sg_dma_len(sg));
5792 +
5793 + nents++;
5794 + nbytes -= len;
5795 + if (!buf->phys_addr) {
5796 + buf->phys_addr = sg_dma_address(sg);
5797 + buf->buf_len = len;
5798 + buf->next = NULL;
5799 + buf->phys_next = 0;
5800 + goto next;
5801 + }
5802 + /* Two consecutive chunks on one page may be handled by the old
5803 + * buffer descriptor, increased by the length of the new one
5804 + */
5805 + if (sg_dma_address(sg) == buf->phys_addr + buf->buf_len) {
5806 + buf->buf_len += len;
5807 + goto next;
5808 + }
5809 + next_buf = dma_pool_alloc(buffer_pool, flags, &next_buf_phys);
5810 + if (!next_buf)
5811 + return NULL;
5812 + buf->next = next_buf;
5813 + buf->phys_next = next_buf_phys;
5814 +
5815 + buf = next_buf;
5816 + buf->next = NULL;
5817 + buf->phys_next = 0;
5818 + buf->phys_addr = sg_dma_address(sg);
5819 + buf->buf_len = len;
5820 +next:
5821 + if (nbytes > 0) {
5822 + sg = sg_next(sg);
5823 + }
5824 + }
5825 + return buf;
5826 +}
5827 +
5828 +static int ablk_setkey(struct crypto_ablkcipher *tfm, const u8 *key,
5829 + unsigned int key_len)
5830 +{
5831 + struct ixp_ctx *ctx = crypto_ablkcipher_ctx(tfm);
5832 + u32 *flags = &tfm->base.crt_flags;
5833 + int ret;
5834 +
5835 + init_completion(&ctx->completion);
5836 + atomic_inc(&ctx->configuring);
5837 +
5838 + reset_sa_dir(&ctx->encrypt);
5839 + reset_sa_dir(&ctx->decrypt);
5840 +
5841 + ctx->encrypt.npe_mode = NPE_OP_HMAC_DISABLE;
5842 + ctx->decrypt.npe_mode = NPE_OP_HMAC_DISABLE;
5843 +
5844 + ret = setup_cipher(&tfm->base, 0, key, key_len);
5845 + if (ret)
5846 + goto out;
5847 + ret = setup_cipher(&tfm->base, 1, key, key_len);
5848 + if (ret)
5849 + goto out;
5850 +
5851 + if (*flags & CRYPTO_TFM_RES_WEAK_KEY) {
5852 + if (*flags & CRYPTO_TFM_REQ_WEAK_KEY) {
5853 + ret = -EINVAL;
5854 + } else {
5855 + *flags &= ~CRYPTO_TFM_RES_WEAK_KEY;
5856 + }
5857 + }
5858 +out:
5859 + if (!atomic_dec_and_test(&ctx->configuring))
5860 + wait_for_completion(&ctx->completion);
5861 + return ret;
5862 +}
5863 +
5864 +static int ablk_rfc3686_setkey(struct crypto_ablkcipher *tfm, const u8 *key,
5865 + unsigned int key_len)
5866 +{
5867 + struct ixp_ctx *ctx = crypto_ablkcipher_ctx(tfm);
5868 +
5869 + /* the nonce is stored in bytes at end of key */
5870 + if (key_len < CTR_RFC3686_NONCE_SIZE)
5871 + return -EINVAL;
5872 +
5873 + memcpy(ctx->nonce, key + (key_len - CTR_RFC3686_NONCE_SIZE),
5874 + CTR_RFC3686_NONCE_SIZE);
5875 +
5876 + key_len -= CTR_RFC3686_NONCE_SIZE;
5877 + return ablk_setkey(tfm, key, key_len);
5878 +}
5879 +
5880 +static int ablk_perform(struct ablkcipher_request *req, int encrypt)
5881 +{
5882 + struct crypto_ablkcipher *tfm = crypto_ablkcipher_reqtfm(req);
5883 + struct ixp_ctx *ctx = crypto_ablkcipher_ctx(tfm);
5884 + unsigned ivsize = crypto_ablkcipher_ivsize(tfm);
5885 + int ret = -ENOMEM;
5886 + struct ix_sa_dir *dir;
5887 + struct crypt_ctl *crypt;
5888 + unsigned int nbytes = req->nbytes, nents;
5889 + enum dma_data_direction src_direction = DMA_BIDIRECTIONAL;
5890 + struct ablk_ctx *req_ctx = ablkcipher_request_ctx(req);
5891 + gfp_t flags = req->base.flags & CRYPTO_TFM_REQ_MAY_SLEEP ?
5892 + GFP_KERNEL : GFP_ATOMIC;
5893 +
5894 + if (qmgr_stat_full(SEND_QID))
5895 + return -EAGAIN;
5896 + if (atomic_read(&ctx->configuring))
5897 + return -EAGAIN;
5898 +
5899 + dir = encrypt ? &ctx->encrypt : &ctx->decrypt;
5900 +
5901 + crypt = get_crypt_desc();
5902 + if (!crypt)
5903 + return ret;
5904 +
5905 + crypt->data.ablk_req = req;
5906 + crypt->crypto_ctx = dir->npe_ctx_phys;
5907 + crypt->mode = dir->npe_mode;
5908 + crypt->init_len = dir->npe_ctx_idx;
5909 +
5910 + crypt->crypt_offs = 0;
5911 + crypt->crypt_len = nbytes;
5912 +
5913 + BUG_ON(ivsize && !req->info);
5914 + memcpy(crypt->iv, req->info, ivsize);
5915 + if (req->src != req->dst) {
5916 + crypt->mode |= NPE_OP_NOT_IN_PLACE;
5917 + nents = count_sg(req->dst, nbytes);
5918 + /* This was never tested by Intel
5919 + * for more than one dst buffer, I think. */
5920 + BUG_ON(nents != 1);
5921 + req_ctx->dst_nents = nents;
5922 + dma_map_sg(dev, req->dst, nents, DMA_FROM_DEVICE);
5923 + req_ctx->dst = dma_pool_alloc(buffer_pool, flags,&crypt->dst_buf);
5924 + if (!req_ctx->dst)
5925 + goto unmap_sg_dest;
5926 + req_ctx->dst->phys_addr = 0;
5927 + if (!chainup_buffers(req->dst, nbytes, req_ctx->dst, flags))
5928 + goto free_buf_dest;
5929 + src_direction = DMA_TO_DEVICE;
5930 + } else {
5931 + req_ctx->dst = NULL;
5932 + req_ctx->dst_nents = 0;
5933 + }
5934 + nents = count_sg(req->src, nbytes);
5935 + req_ctx->src_nents = nents;
5936 + dma_map_sg(dev, req->src, nents, src_direction);
5937 +
5938 + req_ctx->src = dma_pool_alloc(buffer_pool, flags, &crypt->src_buf);
5939 + if (!req_ctx->src)
5940 + goto unmap_sg_src;
5941 + req_ctx->src->phys_addr = 0;
5942 + if (!chainup_buffers(req->src, nbytes, req_ctx->src, flags))
5943 + goto free_buf_src;
5944 +
5945 + crypt->ctl_flags |= CTL_FLAG_PERFORM_ABLK;
5946 + qmgr_put_entry(SEND_QID, crypt_virt2phys(crypt));
5947 + BUG_ON(qmgr_stat_overflow(SEND_QID));
5948 + return -EINPROGRESS;
5949 +
5950 +free_buf_src:
5951 + free_buf_chain(req_ctx->src, crypt->src_buf);
5952 +unmap_sg_src:
5953 + dma_unmap_sg(dev, req->src, req_ctx->src_nents, src_direction);
5954 +free_buf_dest:
5955 + if (req->src != req->dst) {
5956 + free_buf_chain(req_ctx->dst, crypt->dst_buf);
5957 +unmap_sg_dest:
5958 + dma_unmap_sg(dev, req->src, req_ctx->dst_nents,
5959 + DMA_FROM_DEVICE);
5960 + }
5961 + crypt->ctl_flags = CTL_FLAG_UNUSED;
5962 + return ret;
5963 +}
5964 +
5965 +static int ablk_encrypt(struct ablkcipher_request *req)
5966 +{
5967 + return ablk_perform(req, 1);
5968 +}
5969 +
5970 +static int ablk_decrypt(struct ablkcipher_request *req)
5971 +{
5972 + return ablk_perform(req, 0);
5973 +}
5974 +
5975 +static int ablk_rfc3686_crypt(struct ablkcipher_request *req)
5976 +{
5977 + struct crypto_ablkcipher *tfm = crypto_ablkcipher_reqtfm(req);
5978 + struct ixp_ctx *ctx = crypto_ablkcipher_ctx(tfm);
5979 + u8 iv[CTR_RFC3686_BLOCK_SIZE];
5980 + u8 *info = req->info;
5981 + int ret;
5982 +
5983 + /* set up counter block */
5984 + memcpy(iv, ctx->nonce, CTR_RFC3686_NONCE_SIZE);
5985 + memcpy(iv + CTR_RFC3686_NONCE_SIZE, info, CTR_RFC3686_IV_SIZE);
5986 +
5987 + /* initialize counter portion of counter block */
5988 + *(__be32 *)(iv + CTR_RFC3686_NONCE_SIZE + CTR_RFC3686_IV_SIZE) =
5989 + cpu_to_be32(1);
5990 +
5991 + req->info = iv;
5992 + ret = ablk_perform(req, 1);
5993 + req->info = info;
5994 + return ret;
5995 +}
5996 +
5997 +static int hmac_inconsistent(struct scatterlist *sg, unsigned start,
5998 + unsigned int nbytes)
5999 +{
6000 + int offset = 0;
6001 +
6002 + if (!nbytes)
6003 + return 0;
6004 +
6005 + for (;;) {
6006 + if (start < offset + sg->length)
6007 + break;
6008 +
6009 + offset += sg->length;
6010 + sg = sg_next(sg);
6011 + }
6012 + return (start + nbytes > offset + sg->length);
6013 +}
6014 +
6015 +static int aead_perform(struct aead_request *req, int encrypt,
6016 + int cryptoffset, int eff_cryptlen, u8 *iv)
6017 +{
6018 + struct crypto_aead *tfm = crypto_aead_reqtfm(req);
6019 + struct ixp_ctx *ctx = crypto_aead_ctx(tfm);
6020 + unsigned ivsize = crypto_aead_ivsize(tfm);
6021 + unsigned authsize = crypto_aead_authsize(tfm);
6022 + int ret = -ENOMEM;
6023 + struct ix_sa_dir *dir;
6024 + struct crypt_ctl *crypt;
6025 + unsigned int cryptlen, nents;
6026 + struct buffer_desc *buf;
6027 + struct aead_ctx *req_ctx = aead_request_ctx(req);
6028 + gfp_t flags = req->base.flags & CRYPTO_TFM_REQ_MAY_SLEEP ?
6029 + GFP_KERNEL : GFP_ATOMIC;
6030 +
6031 + if (qmgr_stat_full(SEND_QID))
6032 + return -EAGAIN;
6033 + if (atomic_read(&ctx->configuring))
6034 + return -EAGAIN;
6035 +
6036 + if (encrypt) {
6037 + dir = &ctx->encrypt;
6038 + cryptlen = req->cryptlen;
6039 + } else {
6040 + dir = &ctx->decrypt;
6041 + /* req->cryptlen includes the authsize when decrypting */
6042 + cryptlen = req->cryptlen -authsize;
6043 + eff_cryptlen -= authsize;
6044 + }
6045 + crypt = get_crypt_desc();
6046 + if (!crypt)
6047 + return ret;
6048 +
6049 + crypt->data.aead_req = req;
6050 + crypt->crypto_ctx = dir->npe_ctx_phys;
6051 + crypt->mode = dir->npe_mode;
6052 + crypt->init_len = dir->npe_ctx_idx;
6053 +
6054 + crypt->crypt_offs = cryptoffset;
6055 + crypt->crypt_len = eff_cryptlen;
6056 +
6057 + crypt->auth_offs = 0;
6058 + crypt->auth_len = req->assoclen + ivsize + cryptlen;
6059 + BUG_ON(ivsize && !req->iv);
6060 + memcpy(crypt->iv, req->iv, ivsize);
6061 +
6062 + if (req->src != req->dst) {
6063 + BUG(); /* -ENOTSUP because of my lazyness */
6064 + }
6065 +
6066 + req_ctx->buffer = dma_pool_alloc(buffer_pool, flags, &crypt->src_buf);
6067 + if (!req_ctx->buffer)
6068 + goto out;
6069 + req_ctx->buffer->phys_addr = 0;
6070 + /* ASSOC data */
6071 + nents = count_sg(req->assoc, req->assoclen);
6072 + req_ctx->assoc_nents = nents;
6073 + dma_map_sg(dev, req->assoc, nents, DMA_TO_DEVICE);
6074 + buf = chainup_buffers(req->assoc, req->assoclen, req_ctx->buffer,flags);
6075 + if (!buf)
6076 + goto unmap_sg_assoc;
6077 + /* IV */
6078 + sg_init_table(&req_ctx->ivlist, 1);
6079 + sg_set_buf(&req_ctx->ivlist, iv, ivsize);
6080 + dma_map_sg(dev, &req_ctx->ivlist, 1, DMA_BIDIRECTIONAL);
6081 + buf = chainup_buffers(&req_ctx->ivlist, ivsize, buf, flags);
6082 + if (!buf)
6083 + goto unmap_sg_iv;
6084 + if (unlikely(hmac_inconsistent(req->src, cryptlen, authsize))) {
6085 + /* The 12 hmac bytes are scattered,
6086 + * we need to copy them into a safe buffer */
6087 + req_ctx->hmac_virt = dma_pool_alloc(buffer_pool, flags,
6088 + &crypt->icv_rev_aes);
6089 + if (unlikely(!req_ctx->hmac_virt))
6090 + goto unmap_sg_iv;
6091 + if (!encrypt) {
6092 + scatterwalk_map_and_copy(req_ctx->hmac_virt,
6093 + req->src, cryptlen, authsize, 0);
6094 + }
6095 + req_ctx->encrypt = encrypt;
6096 + } else {
6097 + req_ctx->hmac_virt = NULL;
6098 + }
6099 + /* Crypt */
6100 + nents = count_sg(req->src, cryptlen + authsize);
6101 + req_ctx->src_nents = nents;
6102 + dma_map_sg(dev, req->src, nents, DMA_BIDIRECTIONAL);
6103 + buf = chainup_buffers(req->src, cryptlen + authsize, buf, flags);
6104 + if (!buf)
6105 + goto unmap_sg_src;
6106 + if (!req_ctx->hmac_virt) {
6107 + crypt->icv_rev_aes = buf->phys_addr + buf->buf_len - authsize;
6108 + }
6109 + crypt->ctl_flags |= CTL_FLAG_PERFORM_AEAD;
6110 + qmgr_put_entry(SEND_QID, crypt_virt2phys(crypt));
6111 + BUG_ON(qmgr_stat_overflow(SEND_QID));
6112 + return -EINPROGRESS;
6113 +unmap_sg_src:
6114 + dma_unmap_sg(dev, req->src, req_ctx->src_nents, DMA_BIDIRECTIONAL);
6115 + if (req_ctx->hmac_virt) {
6116 + dma_pool_free(buffer_pool, req_ctx->hmac_virt,
6117 + crypt->icv_rev_aes);
6118 + }
6119 +unmap_sg_iv:
6120 + dma_unmap_sg(dev, &req_ctx->ivlist, 1, DMA_BIDIRECTIONAL);
6121 +unmap_sg_assoc:
6122 + dma_unmap_sg(dev, req->assoc, req_ctx->assoc_nents, DMA_TO_DEVICE);
6123 + free_buf_chain(req_ctx->buffer, crypt->src_buf);
6124 +out:
6125 + crypt->ctl_flags = CTL_FLAG_UNUSED;
6126 + return ret;
6127 +}
6128 +
6129 +static int aead_setup(struct crypto_aead *tfm, unsigned int authsize)
6130 +{
6131 + struct ixp_ctx *ctx = crypto_aead_ctx(tfm);
6132 + u32 *flags = &tfm->base.crt_flags;
6133 + unsigned digest_len = crypto_aead_alg(tfm)->maxauthsize;
6134 + int ret;
6135 +
6136 + if (!ctx->enckey_len && !ctx->authkey_len)
6137 + return 0;
6138 + init_completion(&ctx->completion);
6139 + atomic_inc(&ctx->configuring);
6140 +
6141 + reset_sa_dir(&ctx->encrypt);
6142 + reset_sa_dir(&ctx->decrypt);
6143 +
6144 + ret = setup_cipher(&tfm->base, 0, ctx->enckey, ctx->enckey_len);
6145 + if (ret)
6146 + goto out;
6147 + ret = setup_cipher(&tfm->base, 1, ctx->enckey, ctx->enckey_len);
6148 + if (ret)
6149 + goto out;
6150 + ret = setup_auth(&tfm->base, 0, authsize, ctx->authkey,
6151 + ctx->authkey_len, digest_len);
6152 + if (ret)
6153 + goto out;
6154 + ret = setup_auth(&tfm->base, 1, authsize, ctx->authkey,
6155 + ctx->authkey_len, digest_len);
6156 + if (ret)
6157 + goto out;
6158 +
6159 + if (*flags & CRYPTO_TFM_RES_WEAK_KEY) {
6160 + if (*flags & CRYPTO_TFM_REQ_WEAK_KEY) {
6161 + ret = -EINVAL;
6162 + goto out;
6163 + } else {
6164 + *flags &= ~CRYPTO_TFM_RES_WEAK_KEY;
6165 + }
6166 + }
6167 +out:
6168 + if (!atomic_dec_and_test(&ctx->configuring))
6169 + wait_for_completion(&ctx->completion);
6170 + return ret;
6171 +}
6172 +
6173 +static int aead_setauthsize(struct crypto_aead *tfm, unsigned int authsize)
6174 +{
6175 + int max = crypto_aead_alg(tfm)->maxauthsize >> 2;
6176 +
6177 + if ((authsize>>2) < 1 || (authsize>>2) > max || (authsize & 3))
6178 + return -EINVAL;
6179 + return aead_setup(tfm, authsize);
6180 +}
6181 +
6182 +static int aead_setkey(struct crypto_aead *tfm, const u8 *key,
6183 + unsigned int keylen)
6184 +{
6185 + struct ixp_ctx *ctx = crypto_aead_ctx(tfm);
6186 + struct rtattr *rta = (struct rtattr *)key;
6187 + struct crypto_authenc_key_param *param;
6188 +
6189 + if (!RTA_OK(rta, keylen))
6190 + goto badkey;
6191 + if (rta->rta_type != CRYPTO_AUTHENC_KEYA_PARAM)
6192 + goto badkey;
6193 + if (RTA_PAYLOAD(rta) < sizeof(*param))
6194 + goto badkey;
6195 +
6196 + param = RTA_DATA(rta);
6197 + ctx->enckey_len = be32_to_cpu(param->enckeylen);
6198 +
6199 + key += RTA_ALIGN(rta->rta_len);
6200 + keylen -= RTA_ALIGN(rta->rta_len);
6201 +
6202 + if (keylen < ctx->enckey_len)
6203 + goto badkey;
6204 +
6205 + ctx->authkey_len = keylen - ctx->enckey_len;
6206 + memcpy(ctx->enckey, key + ctx->authkey_len, ctx->enckey_len);
6207 + memcpy(ctx->authkey, key, ctx->authkey_len);
6208 +
6209 + return aead_setup(tfm, crypto_aead_authsize(tfm));
6210 +badkey:
6211 + ctx->enckey_len = 0;
6212 + crypto_aead_set_flags(tfm, CRYPTO_TFM_RES_BAD_KEY_LEN);
6213 + return -EINVAL;
6214 +}
6215 +
6216 +static int aead_encrypt(struct aead_request *req)
6217 +{
6218 + unsigned ivsize = crypto_aead_ivsize(crypto_aead_reqtfm(req));
6219 + return aead_perform(req, 1, req->assoclen + ivsize,
6220 + req->cryptlen, req->iv);
6221 +}
6222 +
6223 +static int aead_decrypt(struct aead_request *req)
6224 +{
6225 + unsigned ivsize = crypto_aead_ivsize(crypto_aead_reqtfm(req));
6226 + return aead_perform(req, 0, req->assoclen + ivsize,
6227 + req->cryptlen, req->iv);
6228 +}
6229 +
6230 +static int aead_givencrypt(struct aead_givcrypt_request *req)
6231 +{
6232 + struct crypto_aead *tfm = aead_givcrypt_reqtfm(req);
6233 + struct ixp_ctx *ctx = crypto_aead_ctx(tfm);
6234 + unsigned len, ivsize = crypto_aead_ivsize(tfm);
6235 + __be64 seq;
6236 +
6237 + /* copied from eseqiv.c */
6238 + if (!ctx->salted) {
6239 + get_random_bytes(ctx->salt, ivsize);
6240 + ctx->salted = 1;
6241 + }
6242 + memcpy(req->areq.iv, ctx->salt, ivsize);
6243 + len = ivsize;
6244 + if (ivsize > sizeof(u64)) {
6245 + memset(req->giv, 0, ivsize - sizeof(u64));
6246 + len = sizeof(u64);
6247 + }
6248 + seq = cpu_to_be64(req->seq);
6249 + memcpy(req->giv + ivsize - len, &seq, len);
6250 + return aead_perform(&req->areq, 1, req->areq.assoclen,
6251 + req->areq.cryptlen +ivsize, req->giv);
6252 +}
6253 +
6254 +static struct ixp_alg ixp4xx_algos[] = {
6255 +{
6256 + .crypto = {
6257 + .cra_name = "cbc(des)",
6258 + .cra_blocksize = DES_BLOCK_SIZE,
6259 + .cra_u = { .ablkcipher = {
6260 + .min_keysize = DES_KEY_SIZE,
6261 + .max_keysize = DES_KEY_SIZE,
6262 + .ivsize = DES_BLOCK_SIZE,
6263 + .geniv = "eseqiv",
6264 + }
6265 + }
6266 + },
6267 + .cfg_enc = CIPH_ENCR | MOD_DES | MOD_CBC_ENC | KEYLEN_192,
6268 + .cfg_dec = CIPH_DECR | MOD_DES | MOD_CBC_DEC | KEYLEN_192,
6269 +
6270 +}, {
6271 + .crypto = {
6272 + .cra_name = "ecb(des)",
6273 + .cra_blocksize = DES_BLOCK_SIZE,
6274 + .cra_u = { .ablkcipher = {
6275 + .min_keysize = DES_KEY_SIZE,
6276 + .max_keysize = DES_KEY_SIZE,
6277 + }
6278 + }
6279 + },
6280 + .cfg_enc = CIPH_ENCR | MOD_DES | MOD_ECB | KEYLEN_192,
6281 + .cfg_dec = CIPH_DECR | MOD_DES | MOD_ECB | KEYLEN_192,
6282 +}, {
6283 + .crypto = {
6284 + .cra_name = "cbc(des3_ede)",
6285 + .cra_blocksize = DES3_EDE_BLOCK_SIZE,
6286 + .cra_u = { .ablkcipher = {
6287 + .min_keysize = DES3_EDE_KEY_SIZE,
6288 + .max_keysize = DES3_EDE_KEY_SIZE,
6289 + .ivsize = DES3_EDE_BLOCK_SIZE,
6290 + .geniv = "eseqiv",
6291 + }
6292 + }
6293 + },
6294 + .cfg_enc = CIPH_ENCR | MOD_3DES | MOD_CBC_ENC | KEYLEN_192,
6295 + .cfg_dec = CIPH_DECR | MOD_3DES | MOD_CBC_DEC | KEYLEN_192,
6296 +}, {
6297 + .crypto = {
6298 + .cra_name = "ecb(des3_ede)",
6299 + .cra_blocksize = DES3_EDE_BLOCK_SIZE,
6300 + .cra_u = { .ablkcipher = {
6301 + .min_keysize = DES3_EDE_KEY_SIZE,
6302 + .max_keysize = DES3_EDE_KEY_SIZE,
6303 + }
6304 + }
6305 + },
6306 + .cfg_enc = CIPH_ENCR | MOD_3DES | MOD_ECB | KEYLEN_192,
6307 + .cfg_dec = CIPH_DECR | MOD_3DES | MOD_ECB | KEYLEN_192,
6308 +}, {
6309 + .crypto = {
6310 + .cra_name = "cbc(aes)",
6311 + .cra_blocksize = AES_BLOCK_SIZE,
6312 + .cra_u = { .ablkcipher = {
6313 + .min_keysize = AES_MIN_KEY_SIZE,
6314 + .max_keysize = AES_MAX_KEY_SIZE,
6315 + .ivsize = AES_BLOCK_SIZE,
6316 + .geniv = "eseqiv",
6317 + }
6318 + }
6319 + },
6320 + .cfg_enc = CIPH_ENCR | MOD_AES | MOD_CBC_ENC,
6321 + .cfg_dec = CIPH_DECR | MOD_AES | MOD_CBC_DEC,
6322 +}, {
6323 + .crypto = {
6324 + .cra_name = "ecb(aes)",
6325 + .cra_blocksize = AES_BLOCK_SIZE,
6326 + .cra_u = { .ablkcipher = {
6327 + .min_keysize = AES_MIN_KEY_SIZE,
6328 + .max_keysize = AES_MAX_KEY_SIZE,
6329 + }
6330 + }
6331 + },
6332 + .cfg_enc = CIPH_ENCR | MOD_AES | MOD_ECB,
6333 + .cfg_dec = CIPH_DECR | MOD_AES | MOD_ECB,
6334 +}, {
6335 + .crypto = {
6336 + .cra_name = "ctr(aes)",
6337 + .cra_blocksize = AES_BLOCK_SIZE,
6338 + .cra_u = { .ablkcipher = {
6339 + .min_keysize = AES_MIN_KEY_SIZE,
6340 + .max_keysize = AES_MAX_KEY_SIZE,
6341 + .ivsize = AES_BLOCK_SIZE,
6342 + .geniv = "eseqiv",
6343 + }
6344 + }
6345 + },
6346 + .cfg_enc = CIPH_ENCR | MOD_AES | MOD_CTR,
6347 + .cfg_dec = CIPH_ENCR | MOD_AES | MOD_CTR,
6348 +}, {
6349 + .crypto = {
6350 + .cra_name = "rfc3686(ctr(aes))",
6351 + .cra_blocksize = AES_BLOCK_SIZE,
6352 + .cra_u = { .ablkcipher = {
6353 + .min_keysize = AES_MIN_KEY_SIZE,
6354 + .max_keysize = AES_MAX_KEY_SIZE,
6355 + .ivsize = AES_BLOCK_SIZE,
6356 + .geniv = "eseqiv",
6357 + .setkey = ablk_rfc3686_setkey,
6358 + .encrypt = ablk_rfc3686_crypt,
6359 + .decrypt = ablk_rfc3686_crypt }
6360 + }
6361 + },
6362 + .cfg_enc = CIPH_ENCR | MOD_AES | MOD_CTR,
6363 + .cfg_dec = CIPH_ENCR | MOD_AES | MOD_CTR,
6364 +}, {
6365 + .crypto = {
6366 + .cra_name = "authenc(hmac(md5),cbc(des))",
6367 + .cra_blocksize = DES_BLOCK_SIZE,
6368 + .cra_u = { .aead = {
6369 + .ivsize = DES_BLOCK_SIZE,
6370 + .maxauthsize = MD5_DIGEST_SIZE,
6371 + }
6372 + }
6373 + },
6374 + .hash = &hash_alg_md5,
6375 + .cfg_enc = CIPH_ENCR | MOD_DES | MOD_CBC_ENC | KEYLEN_192,
6376 + .cfg_dec = CIPH_DECR | MOD_DES | MOD_CBC_DEC | KEYLEN_192,
6377 +}, {
6378 + .crypto = {
6379 + .cra_name = "authenc(hmac(md5),cbc(des3_ede))",
6380 + .cra_blocksize = DES3_EDE_BLOCK_SIZE,
6381 + .cra_u = { .aead = {
6382 + .ivsize = DES3_EDE_BLOCK_SIZE,
6383 + .maxauthsize = MD5_DIGEST_SIZE,
6384 + }
6385 + }
6386 + },
6387 + .hash = &hash_alg_md5,
6388 + .cfg_enc = CIPH_ENCR | MOD_3DES | MOD_CBC_ENC | KEYLEN_192,
6389 + .cfg_dec = CIPH_DECR | MOD_3DES | MOD_CBC_DEC | KEYLEN_192,
6390 +}, {
6391 + .crypto = {
6392 + .cra_name = "authenc(hmac(sha1),cbc(des))",
6393 + .cra_blocksize = DES_BLOCK_SIZE,
6394 + .cra_u = { .aead = {
6395 + .ivsize = DES_BLOCK_SIZE,
6396 + .maxauthsize = SHA1_DIGEST_SIZE,
6397 + }
6398 + }
6399 + },
6400 + .hash = &hash_alg_sha1,
6401 + .cfg_enc = CIPH_ENCR | MOD_DES | MOD_CBC_ENC | KEYLEN_192,
6402 + .cfg_dec = CIPH_DECR | MOD_DES | MOD_CBC_DEC | KEYLEN_192,
6403 +}, {
6404 + .crypto = {
6405 + .cra_name = "authenc(hmac(sha1),cbc(des3_ede))",
6406 + .cra_blocksize = DES3_EDE_BLOCK_SIZE,
6407 + .cra_u = { .aead = {
6408 + .ivsize = DES3_EDE_BLOCK_SIZE,
6409 + .maxauthsize = SHA1_DIGEST_SIZE,
6410 + }
6411 + }
6412 + },
6413 + .hash = &hash_alg_sha1,
6414 + .cfg_enc = CIPH_ENCR | MOD_3DES | MOD_CBC_ENC | KEYLEN_192,
6415 + .cfg_dec = CIPH_DECR | MOD_3DES | MOD_CBC_DEC | KEYLEN_192,
6416 +}, {
6417 + .crypto = {
6418 + .cra_name = "authenc(hmac(md5),cbc(aes))",
6419 + .cra_blocksize = AES_BLOCK_SIZE,
6420 + .cra_u = { .aead = {
6421 + .ivsize = AES_BLOCK_SIZE,
6422 + .maxauthsize = MD5_DIGEST_SIZE,
6423 + }
6424 + }
6425 + },
6426 + .hash = &hash_alg_md5,
6427 + .cfg_enc = CIPH_ENCR | MOD_AES | MOD_CBC_ENC,
6428 + .cfg_dec = CIPH_DECR | MOD_AES | MOD_CBC_DEC,
6429 +}, {
6430 + .crypto = {
6431 + .cra_name = "authenc(hmac(sha1),cbc(aes))",
6432 + .cra_blocksize = AES_BLOCK_SIZE,
6433 + .cra_u = { .aead = {
6434 + .ivsize = AES_BLOCK_SIZE,
6435 + .maxauthsize = SHA1_DIGEST_SIZE,
6436 + }
6437 + }
6438 + },
6439 + .hash = &hash_alg_sha1,
6440 + .cfg_enc = CIPH_ENCR | MOD_AES | MOD_CBC_ENC,
6441 + .cfg_dec = CIPH_DECR | MOD_AES | MOD_CBC_DEC,
6442 +} };
6443 +
6444 +#define IXP_POSTFIX "-ixp4xx"
6445 +static int __init ixp_module_init(void)
6446 +{
6447 + int num = ARRAY_SIZE(ixp4xx_algos);
6448 + int i,err ;
6449 +
6450 + if (platform_device_register(&pseudo_dev))
6451 + return -ENODEV;
6452 +
6453 + spin_lock_init(&desc_lock);
6454 + spin_lock_init(&emerg_lock);
6455 +
6456 + err = init_ixp_crypto();
6457 + if (err) {
6458 + platform_device_unregister(&pseudo_dev);
6459 + return err;
6460 + }
6461 + for (i=0; i< num; i++) {
6462 + struct crypto_alg *cra = &ixp4xx_algos[i].crypto;
6463 +
6464 + if (snprintf(cra->cra_driver_name, CRYPTO_MAX_ALG_NAME,
6465 + "%s"IXP_POSTFIX, cra->cra_name) >=
6466 + CRYPTO_MAX_ALG_NAME)
6467 + {
6468 + continue;
6469 + }
6470 + if (!support_aes && (ixp4xx_algos[i].cfg_enc & MOD_AES)) {
6471 + continue;
6472 + }
6473 + if (!ixp4xx_algos[i].hash) {
6474 + /* block ciphers */
6475 + cra->cra_type = &crypto_ablkcipher_type;
6476 + cra->cra_flags = CRYPTO_ALG_TYPE_ABLKCIPHER |
6477 + CRYPTO_ALG_ASYNC;
6478 + if (!cra->cra_ablkcipher.setkey)
6479 + cra->cra_ablkcipher.setkey = ablk_setkey;
6480 + if (!cra->cra_ablkcipher.encrypt)
6481 + cra->cra_ablkcipher.encrypt = ablk_encrypt;
6482 + if (!cra->cra_ablkcipher.decrypt)
6483 + cra->cra_ablkcipher.decrypt = ablk_decrypt;
6484 + cra->cra_init = init_tfm_ablk;
6485 + } else {
6486 + /* authenc */
6487 + cra->cra_type = &crypto_aead_type;
6488 + cra->cra_flags = CRYPTO_ALG_TYPE_AEAD |
6489 + CRYPTO_ALG_ASYNC;
6490 + cra->cra_aead.setkey = aead_setkey;
6491 + cra->cra_aead.setauthsize = aead_setauthsize;
6492 + cra->cra_aead.encrypt = aead_encrypt;
6493 + cra->cra_aead.decrypt = aead_decrypt;
6494 + cra->cra_aead.givencrypt = aead_givencrypt;
6495 + cra->cra_init = init_tfm_aead;
6496 + }
6497 + cra->cra_ctxsize = sizeof(struct ixp_ctx);
6498 + cra->cra_module = THIS_MODULE;
6499 + cra->cra_alignmask = 3;
6500 + cra->cra_priority = 300;
6501 + cra->cra_exit = exit_tfm;
6502 + if (crypto_register_alg(cra))
6503 + printk(KERN_ERR "Failed to register '%s'\n",
6504 + cra->cra_name);
6505 + else
6506 + ixp4xx_algos[i].registered = 1;
6507 + }
6508 + return 0;
6509 +}
6510 +
6511 +static void __exit ixp_module_exit(void)
6512 +{
6513 + int num = ARRAY_SIZE(ixp4xx_algos);
6514 + int i;
6515 +
6516 + for (i=0; i< num; i++) {
6517 + if (ixp4xx_algos[i].registered)
6518 + crypto_unregister_alg(&ixp4xx_algos[i].crypto);
6519 + }
6520 + release_ixp_crypto();
6521 + platform_device_unregister(&pseudo_dev);
6522 +}
6523 +
6524 +module_init(ixp_module_init);
6525 +module_exit(ixp_module_exit);
6526 +
6527 +MODULE_LICENSE("GPL");
6528 +MODULE_AUTHOR("Christian Hohnstaedt <chohnstaedt@innominate.com>");
6529 +MODULE_DESCRIPTION("IXP4xx hardware crypto");
6530 +
6531 --- a/drivers/crypto/padlock-aes.c
6532 +++ b/drivers/crypto/padlock-aes.c
6533 @@ -385,12 +385,12 @@
6534 int ret;
6535
6536 if (!cpu_has_xcrypt) {
6537 - printk(KERN_ERR PFX "VIA PadLock not detected.\n");
6538 + printk(KERN_NOTICE PFX "VIA PadLock not detected.\n");
6539 return -ENODEV;
6540 }
6541
6542 if (!cpu_has_xcrypt_enabled) {
6543 - printk(KERN_ERR PFX "VIA PadLock detected, but not enabled. Hmm, strange...\n");
6544 + printk(KERN_NOTICE PFX "VIA PadLock detected, but not enabled. Hmm, strange...\n");
6545 return -ENODEV;
6546 }
6547
6548 --- a/drivers/crypto/padlock-sha.c
6549 +++ b/drivers/crypto/padlock-sha.c
6550 @@ -254,12 +254,12 @@
6551 int rc = -ENODEV;
6552
6553 if (!cpu_has_phe) {
6554 - printk(KERN_ERR PFX "VIA PadLock Hash Engine not detected.\n");
6555 + printk(KERN_NOTICE PFX "VIA PadLock Hash Engine not detected.\n");
6556 return -ENODEV;
6557 }
6558
6559 if (!cpu_has_phe_enabled) {
6560 - printk(KERN_ERR PFX "VIA PadLock detected, but not enabled. Hmm, strange...\n");
6561 + printk(KERN_NOTICE PFX "VIA PadLock detected, but not enabled. Hmm, strange...\n");
6562 return -ENODEV;
6563 }
6564
6565 --- /dev/null
6566 +++ b/drivers/crypto/talitos.c
6567 @@ -0,0 +1,1597 @@
6568 +/*
6569 + * talitos - Freescale Integrated Security Engine (SEC) device driver
6570 + *
6571 + * Copyright (c) 2008 Freescale Semiconductor, Inc.
6572 + *
6573 + * Scatterlist Crypto API glue code copied from files with the following:
6574 + * Copyright (c) 2006-2007 Herbert Xu <herbert@gondor.apana.org.au>
6575 + *
6576 + * Crypto algorithm registration code copied from hifn driver:
6577 + * 2007+ Copyright (c) Evgeniy Polyakov <johnpol@2ka.mipt.ru>
6578 + * All rights reserved.
6579 + *
6580 + * This program is free software; you can redistribute it and/or modify
6581 + * it under the terms of the GNU General Public License as published by
6582 + * the Free Software Foundation; either version 2 of the License, or
6583 + * (at your option) any later version.
6584 + *
6585 + * This program is distributed in the hope that it will be useful,
6586 + * but WITHOUT ANY WARRANTY; without even the implied warranty of
6587 + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
6588 + * GNU General Public License for more details.
6589 + *
6590 + * You should have received a copy of the GNU General Public License
6591 + * along with this program; if not, write to the Free Software
6592 + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
6593 + */
6594 +
6595 +#include <linux/kernel.h>
6596 +#include <linux/module.h>
6597 +#include <linux/mod_devicetable.h>
6598 +#include <linux/device.h>
6599 +#include <linux/interrupt.h>
6600 +#include <linux/crypto.h>
6601 +#include <linux/hw_random.h>
6602 +#include <linux/of_platform.h>
6603 +#include <linux/dma-mapping.h>
6604 +#include <linux/io.h>
6605 +#include <linux/spinlock.h>
6606 +#include <linux/rtnetlink.h>
6607 +
6608 +#include <crypto/algapi.h>
6609 +#include <crypto/aes.h>
6610 +#include <crypto/des.h>
6611 +#include <crypto/sha.h>
6612 +#include <crypto/aead.h>
6613 +#include <crypto/authenc.h>
6614 +
6615 +#include "talitos.h"
6616 +
6617 +#define TALITOS_TIMEOUT 100000
6618 +#define TALITOS_MAX_DATA_LEN 65535
6619 +
6620 +#define DESC_TYPE(desc_hdr) ((be32_to_cpu(desc_hdr) >> 3) & 0x1f)
6621 +#define PRIMARY_EU(desc_hdr) ((be32_to_cpu(desc_hdr) >> 28) & 0xf)
6622 +#define SECONDARY_EU(desc_hdr) ((be32_to_cpu(desc_hdr) >> 16) & 0xf)
6623 +
6624 +/* descriptor pointer entry */
6625 +struct talitos_ptr {
6626 + __be16 len; /* length */
6627 + u8 j_extent; /* jump to sg link table and/or extent */
6628 + u8 eptr; /* extended address */
6629 + __be32 ptr; /* address */
6630 +};
6631 +
6632 +/* descriptor */
6633 +struct talitos_desc {
6634 + __be32 hdr; /* header high bits */
6635 + __be32 hdr_lo; /* header low bits */
6636 + struct talitos_ptr ptr[7]; /* ptr/len pair array */
6637 +};
6638 +
6639 +/**
6640 + * talitos_request - descriptor submission request
6641 + * @desc: descriptor pointer (kernel virtual)
6642 + * @dma_desc: descriptor's physical bus address
6643 + * @callback: whom to call when descriptor processing is done
6644 + * @context: caller context (optional)
6645 + */
6646 +struct talitos_request {
6647 + struct talitos_desc *desc;
6648 + dma_addr_t dma_desc;
6649 + void (*callback) (struct device *dev, struct talitos_desc *desc,
6650 + void *context, int error);
6651 + void *context;
6652 +};
6653 +
6654 +struct talitos_private {
6655 + struct device *dev;
6656 + struct of_device *ofdev;
6657 + void __iomem *reg;
6658 + int irq;
6659 +
6660 + /* SEC version geometry (from device tree node) */
6661 + unsigned int num_channels;
6662 + unsigned int chfifo_len;
6663 + unsigned int exec_units;
6664 + unsigned int desc_types;
6665 +
6666 + /* next channel to be assigned next incoming descriptor */
6667 + atomic_t last_chan;
6668 +
6669 + /* per-channel request fifo */
6670 + struct talitos_request **fifo;
6671 +
6672 + /*
6673 + * length of the request fifo
6674 + * fifo_len is chfifo_len rounded up to next power of 2
6675 + * so we can use bitwise ops to wrap
6676 + */
6677 + unsigned int fifo_len;
6678 +
6679 + /* per-channel index to next free descriptor request */
6680 + int *head;
6681 +
6682 + /* per-channel index to next in-progress/done descriptor request */
6683 + int *tail;
6684 +
6685 + /* per-channel request submission (head) and release (tail) locks */
6686 + spinlock_t *head_lock;
6687 + spinlock_t *tail_lock;
6688 +
6689 + /* request callback tasklet */
6690 + struct tasklet_struct done_task;
6691 + struct tasklet_struct error_task;
6692 +
6693 + /* list of registered algorithms */
6694 + struct list_head alg_list;
6695 +
6696 + /* hwrng device */
6697 + struct hwrng rng;
6698 +};
6699 +
6700 +/*
6701 + * map virtual single (contiguous) pointer to h/w descriptor pointer
6702 + */
6703 +static void map_single_talitos_ptr(struct device *dev,
6704 + struct talitos_ptr *talitos_ptr,
6705 + unsigned short len, void *data,
6706 + unsigned char extent,
6707 + enum dma_data_direction dir)
6708 +{
6709 + talitos_ptr->len = cpu_to_be16(len);
6710 + talitos_ptr->ptr = cpu_to_be32(dma_map_single(dev, data, len, dir));
6711 + talitos_ptr->j_extent = extent;
6712 +}
6713 +
6714 +/*
6715 + * unmap bus single (contiguous) h/w descriptor pointer
6716 + */
6717 +static void unmap_single_talitos_ptr(struct device *dev,
6718 + struct talitos_ptr *talitos_ptr,
6719 + enum dma_data_direction dir)
6720 +{
6721 + dma_unmap_single(dev, be32_to_cpu(talitos_ptr->ptr),
6722 + be16_to_cpu(talitos_ptr->len), dir);
6723 +}
6724 +
6725 +static int reset_channel(struct device *dev, int ch)
6726 +{
6727 + struct talitos_private *priv = dev_get_drvdata(dev);
6728 + unsigned int timeout = TALITOS_TIMEOUT;
6729 +
6730 + setbits32(priv->reg + TALITOS_CCCR(ch), TALITOS_CCCR_RESET);
6731 +
6732 + while ((in_be32(priv->reg + TALITOS_CCCR(ch)) & TALITOS_CCCR_RESET)
6733 + && --timeout)
6734 + cpu_relax();
6735 +
6736 + if (timeout == 0) {
6737 + dev_err(dev, "failed to reset channel %d\n", ch);
6738 + return -EIO;
6739 + }
6740 +
6741 + /* set done writeback and IRQ */
6742 + setbits32(priv->reg + TALITOS_CCCR_LO(ch), TALITOS_CCCR_LO_CDWE |
6743 + TALITOS_CCCR_LO_CDIE);
6744 +
6745 + return 0;
6746 +}
6747 +
6748 +static int reset_device(struct device *dev)
6749 +{
6750 + struct talitos_private *priv = dev_get_drvdata(dev);
6751 + unsigned int timeout = TALITOS_TIMEOUT;
6752 +
6753 + setbits32(priv->reg + TALITOS_MCR, TALITOS_MCR_SWR);
6754 +
6755 + while ((in_be32(priv->reg + TALITOS_MCR) & TALITOS_MCR_SWR)
6756 + && --timeout)
6757 + cpu_relax();
6758 +
6759 + if (timeout == 0) {
6760 + dev_err(dev, "failed to reset device\n");
6761 + return -EIO;
6762 + }
6763 +
6764 + return 0;
6765 +}
6766 +
6767 +/*
6768 + * Reset and initialize the device
6769 + */
6770 +static int init_device(struct device *dev)
6771 +{
6772 + struct talitos_private *priv = dev_get_drvdata(dev);
6773 + int ch, err;
6774 +
6775 + /*
6776 + * Master reset
6777 + * errata documentation: warning: certain SEC interrupts
6778 + * are not fully cleared by writing the MCR:SWR bit,
6779 + * set bit twice to completely reset
6780 + */
6781 + err = reset_device(dev);
6782 + if (err)
6783 + return err;
6784 +
6785 + err = reset_device(dev);
6786 + if (err)
6787 + return err;
6788 +
6789 + /* reset channels */
6790 + for (ch = 0; ch < priv->num_channels; ch++) {
6791 + err = reset_channel(dev, ch);
6792 + if (err)
6793 + return err;
6794 + }
6795 +
6796 + /* enable channel done and error interrupts */
6797 + setbits32(priv->reg + TALITOS_IMR, TALITOS_IMR_INIT);
6798 + setbits32(priv->reg + TALITOS_IMR_LO, TALITOS_IMR_LO_INIT);
6799 +
6800 + return 0;
6801 +}
6802 +
6803 +/**
6804 + * talitos_submit - submits a descriptor to the device for processing
6805 + * @dev: the SEC device to be used
6806 + * @desc: the descriptor to be processed by the device
6807 + * @callback: whom to call when processing is complete
6808 + * @context: a handle for use by caller (optional)
6809 + *
6810 + * desc must contain valid dma-mapped (bus physical) address pointers.
6811 + * callback must check err and feedback in descriptor header
6812 + * for device processing status.
6813 + */
6814 +static int talitos_submit(struct device *dev, struct talitos_desc *desc,
6815 + void (*callback)(struct device *dev,
6816 + struct talitos_desc *desc,
6817 + void *context, int error),
6818 + void *context)
6819 +{
6820 + struct talitos_private *priv = dev_get_drvdata(dev);
6821 + struct talitos_request *request;
6822 + unsigned long flags, ch;
6823 + int head;
6824 +
6825 + /* select done notification */
6826 + desc->hdr |= DESC_HDR_DONE_NOTIFY;
6827 +
6828 + /* emulate SEC's round-robin channel fifo polling scheme */
6829 + ch = atomic_inc_return(&priv->last_chan) & (priv->num_channels - 1);
6830 +
6831 + spin_lock_irqsave(&priv->head_lock[ch], flags);
6832 +
6833 + head = priv->head[ch];
6834 + request = &priv->fifo[ch][head];
6835 +
6836 + if (request->desc) {
6837 + /* request queue is full */
6838 + spin_unlock_irqrestore(&priv->head_lock[ch], flags);
6839 + return -EAGAIN;
6840 + }
6841 +
6842 + /* map descriptor and save caller data */
6843 + request->dma_desc = dma_map_single(dev, desc, sizeof(*desc),
6844 + DMA_BIDIRECTIONAL);
6845 + request->callback = callback;
6846 + request->context = context;
6847 +
6848 + /* increment fifo head */
6849 + priv->head[ch] = (priv->head[ch] + 1) & (priv->fifo_len - 1);
6850 +
6851 + smp_wmb();
6852 + request->desc = desc;
6853 +
6854 + /* GO! */
6855 + wmb();
6856 + out_be32(priv->reg + TALITOS_FF_LO(ch), request->dma_desc);
6857 +
6858 + spin_unlock_irqrestore(&priv->head_lock[ch], flags);
6859 +
6860 + return -EINPROGRESS;
6861 +}
6862 +
6863 +/*
6864 + * process what was done, notify callback of error if not
6865 + */
6866 +static void flush_channel(struct device *dev, int ch, int error, int reset_ch)
6867 +{
6868 + struct talitos_private *priv = dev_get_drvdata(dev);
6869 + struct talitos_request *request, saved_req;
6870 + unsigned long flags;
6871 + int tail, status;
6872 +
6873 + spin_lock_irqsave(&priv->tail_lock[ch], flags);
6874 +
6875 + tail = priv->tail[ch];
6876 + while (priv->fifo[ch][tail].desc) {
6877 + request = &priv->fifo[ch][tail];
6878 +
6879 + /* descriptors with their done bits set don't get the error */
6880 + rmb();
6881 + if ((request->desc->hdr & DESC_HDR_DONE) == DESC_HDR_DONE)
6882 + status = 0;
6883 + else
6884 + if (!error)
6885 + break;
6886 + else
6887 + status = error;
6888 +
6889 + dma_unmap_single(dev, request->dma_desc,
6890 + sizeof(struct talitos_desc), DMA_BIDIRECTIONAL);
6891 +
6892 + /* copy entries so we can call callback outside lock */
6893 + saved_req.desc = request->desc;
6894 + saved_req.callback = request->callback;
6895 + saved_req.context = request->context;
6896 +
6897 + /* release request entry in fifo */
6898 + smp_wmb();
6899 + request->desc = NULL;
6900 +
6901 + /* increment fifo tail */
6902 + priv->tail[ch] = (tail + 1) & (priv->fifo_len - 1);
6903 +
6904 + spin_unlock_irqrestore(&priv->tail_lock[ch], flags);
6905 + saved_req.callback(dev, saved_req.desc, saved_req.context,
6906 + status);
6907 + /* channel may resume processing in single desc error case */
6908 + if (error && !reset_ch && status == error)
6909 + return;
6910 + spin_lock_irqsave(&priv->tail_lock[ch], flags);
6911 + tail = priv->tail[ch];
6912 + }
6913 +
6914 + spin_unlock_irqrestore(&priv->tail_lock[ch], flags);
6915 +}
6916 +
6917 +/*
6918 + * process completed requests for channels that have done status
6919 + */
6920 +static void talitos_done(unsigned long data)
6921 +{
6922 + struct device *dev = (struct device *)data;
6923 + struct talitos_private *priv = dev_get_drvdata(dev);
6924 + int ch;
6925 +
6926 + for (ch = 0; ch < priv->num_channels; ch++)
6927 + flush_channel(dev, ch, 0, 0);
6928 +}
6929 +
6930 +/*
6931 + * locate current (offending) descriptor
6932 + */
6933 +static struct talitos_desc *current_desc(struct device *dev, int ch)
6934 +{
6935 + struct talitos_private *priv = dev_get_drvdata(dev);
6936 + int tail = priv->tail[ch];
6937 + dma_addr_t cur_desc;
6938 +
6939 + cur_desc = in_be32(priv->reg + TALITOS_CDPR_LO(ch));
6940 +
6941 + while (priv->fifo[ch][tail].dma_desc != cur_desc) {
6942 + tail = (tail + 1) & (priv->fifo_len - 1);
6943 + if (tail == priv->tail[ch]) {
6944 + dev_err(dev, "couldn't locate current descriptor\n");
6945 + return NULL;
6946 + }
6947 + }
6948 +
6949 + return priv->fifo[ch][tail].desc;
6950 +}
6951 +
6952 +/*
6953 + * user diagnostics; report root cause of error based on execution unit status
6954 + */
6955 +static void report_eu_error(struct device *dev, int ch, struct talitos_desc *desc)
6956 +{
6957 + struct talitos_private *priv = dev_get_drvdata(dev);
6958 + int i;
6959 +
6960 + switch (desc->hdr & DESC_HDR_SEL0_MASK) {
6961 + case DESC_HDR_SEL0_AFEU:
6962 + dev_err(dev, "AFEUISR 0x%08x_%08x\n",
6963 + in_be32(priv->reg + TALITOS_AFEUISR),
6964 + in_be32(priv->reg + TALITOS_AFEUISR_LO));
6965 + break;
6966 + case DESC_HDR_SEL0_DEU:
6967 + dev_err(dev, "DEUISR 0x%08x_%08x\n",
6968 + in_be32(priv->reg + TALITOS_DEUISR),
6969 + in_be32(priv->reg + TALITOS_DEUISR_LO));
6970 + break;
6971 + case DESC_HDR_SEL0_MDEUA:
6972 + case DESC_HDR_SEL0_MDEUB:
6973 + dev_err(dev, "MDEUISR 0x%08x_%08x\n",
6974 + in_be32(priv->reg + TALITOS_MDEUISR),
6975 + in_be32(priv->reg + TALITOS_MDEUISR_LO));
6976 + break;
6977 + case DESC_HDR_SEL0_RNG:
6978 + dev_err(dev, "RNGUISR 0x%08x_%08x\n",
6979 + in_be32(priv->reg + TALITOS_RNGUISR),
6980 + in_be32(priv->reg + TALITOS_RNGUISR_LO));
6981 + break;
6982 + case DESC_HDR_SEL0_PKEU:
6983 + dev_err(dev, "PKEUISR 0x%08x_%08x\n",
6984 + in_be32(priv->reg + TALITOS_PKEUISR),
6985 + in_be32(priv->reg + TALITOS_PKEUISR_LO));
6986 + break;
6987 + case DESC_HDR_SEL0_AESU:
6988 + dev_err(dev, "AESUISR 0x%08x_%08x\n",
6989 + in_be32(priv->reg + TALITOS_AESUISR),
6990 + in_be32(priv->reg + TALITOS_AESUISR_LO));
6991 + break;
6992 + case DESC_HDR_SEL0_CRCU:
6993 + dev_err(dev, "CRCUISR 0x%08x_%08x\n",
6994 + in_be32(priv->reg + TALITOS_CRCUISR),
6995 + in_be32(priv->reg + TALITOS_CRCUISR_LO));
6996 + break;
6997 + case DESC_HDR_SEL0_KEU:
6998 + dev_err(dev, "KEUISR 0x%08x_%08x\n",
6999 + in_be32(priv->reg + TALITOS_KEUISR),
7000 + in_be32(priv->reg + TALITOS_KEUISR_LO));
7001 + break;
7002 + }
7003 +
7004 + switch (desc->hdr & DESC_HDR_SEL1_MASK) {
7005 + case DESC_HDR_SEL1_MDEUA:
7006 + case DESC_HDR_SEL1_MDEUB:
7007 + dev_err(dev, "MDEUISR 0x%08x_%08x\n",
7008 + in_be32(priv->reg + TALITOS_MDEUISR),
7009 + in_be32(priv->reg + TALITOS_MDEUISR_LO));
7010 + break;
7011 + case DESC_HDR_SEL1_CRCU:
7012 + dev_err(dev, "CRCUISR 0x%08x_%08x\n",
7013 + in_be32(priv->reg + TALITOS_CRCUISR),
7014 + in_be32(priv->reg + TALITOS_CRCUISR_LO));
7015 + break;
7016 + }
7017 +
7018 + for (i = 0; i < 8; i++)
7019 + dev_err(dev, "DESCBUF 0x%08x_%08x\n",
7020 + in_be32(priv->reg + TALITOS_DESCBUF(ch) + 8*i),
7021 + in_be32(priv->reg + TALITOS_DESCBUF_LO(ch) + 8*i));
7022 +}
7023 +
7024 +/*
7025 + * recover from error interrupts
7026 + */
7027 +static void talitos_error(unsigned long data)
7028 +{
7029 + struct device *dev = (struct device *)data;
7030 + struct talitos_private *priv = dev_get_drvdata(dev);
7031 + unsigned int timeout = TALITOS_TIMEOUT;
7032 + int ch, error, reset_dev = 0, reset_ch = 0;
7033 + u32 isr, isr_lo, v, v_lo;
7034 +
7035 + isr = in_be32(priv->reg + TALITOS_ISR);
7036 + isr_lo = in_be32(priv->reg + TALITOS_ISR_LO);
7037 +
7038 + for (ch = 0; ch < priv->num_channels; ch++) {
7039 + /* skip channels without errors */
7040 + if (!(isr & (1 << (ch * 2 + 1))))
7041 + continue;
7042 +
7043 + error = -EINVAL;
7044 +
7045 + v = in_be32(priv->reg + TALITOS_CCPSR(ch));
7046 + v_lo = in_be32(priv->reg + TALITOS_CCPSR_LO(ch));
7047 +
7048 + if (v_lo & TALITOS_CCPSR_LO_DOF) {
7049 + dev_err(dev, "double fetch fifo overflow error\n");
7050 + error = -EAGAIN;
7051 + reset_ch = 1;
7052 + }
7053 + if (v_lo & TALITOS_CCPSR_LO_SOF) {
7054 + /* h/w dropped descriptor */
7055 + dev_err(dev, "single fetch fifo overflow error\n");
7056 + error = -EAGAIN;
7057 + }
7058 + if (v_lo & TALITOS_CCPSR_LO_MDTE)
7059 + dev_err(dev, "master data transfer error\n");
7060 + if (v_lo & TALITOS_CCPSR_LO_SGDLZ)
7061 + dev_err(dev, "s/g data length zero error\n");
7062 + if (v_lo & TALITOS_CCPSR_LO_FPZ)
7063 + dev_err(dev, "fetch pointer zero error\n");
7064 + if (v_lo & TALITOS_CCPSR_LO_IDH)
7065 + dev_err(dev, "illegal descriptor header error\n");
7066 + if (v_lo & TALITOS_CCPSR_LO_IEU)
7067 + dev_err(dev, "invalid execution unit error\n");
7068 + if (v_lo & TALITOS_CCPSR_LO_EU)
7069 + report_eu_error(dev, ch, current_desc(dev, ch));
7070 + if (v_lo & TALITOS_CCPSR_LO_GB)
7071 + dev_err(dev, "gather boundary error\n");
7072 + if (v_lo & TALITOS_CCPSR_LO_GRL)
7073 + dev_err(dev, "gather return/length error\n");
7074 + if (v_lo & TALITOS_CCPSR_LO_SB)
7075 + dev_err(dev, "scatter boundary error\n");
7076 + if (v_lo & TALITOS_CCPSR_LO_SRL)
7077 + dev_err(dev, "scatter return/length error\n");
7078 +
7079 + flush_channel(dev, ch, error, reset_ch);
7080 +
7081 + if (reset_ch) {
7082 + reset_channel(dev, ch);
7083 + } else {
7084 + setbits32(priv->reg + TALITOS_CCCR(ch),
7085 + TALITOS_CCCR_CONT);
7086 + setbits32(priv->reg + TALITOS_CCCR_LO(ch), 0);
7087 + while ((in_be32(priv->reg + TALITOS_CCCR(ch)) &
7088 + TALITOS_CCCR_CONT) && --timeout)
7089 + cpu_relax();
7090 + if (timeout == 0) {
7091 + dev_err(dev, "failed to restart channel %d\n",
7092 + ch);
7093 + reset_dev = 1;
7094 + }
7095 + }
7096 + }
7097 + if (reset_dev || isr & ~TALITOS_ISR_CHERR || isr_lo) {
7098 + dev_err(dev, "done overflow, internal time out, or rngu error: "
7099 + "ISR 0x%08x_%08x\n", isr, isr_lo);
7100 +
7101 + /* purge request queues */
7102 + for (ch = 0; ch < priv->num_channels; ch++)
7103 + flush_channel(dev, ch, -EIO, 1);
7104 +
7105 + /* reset and reinitialize the device */
7106 + init_device(dev);
7107 + }
7108 +}
7109 +
7110 +static irqreturn_t talitos_interrupt(int irq, void *data)
7111 +{
7112 + struct device *dev = data;
7113 + struct talitos_private *priv = dev_get_drvdata(dev);
7114 + u32 isr, isr_lo;
7115 +
7116 + isr = in_be32(priv->reg + TALITOS_ISR);
7117 + isr_lo = in_be32(priv->reg + TALITOS_ISR_LO);
7118 +
7119 + /* ack */
7120 + out_be32(priv->reg + TALITOS_ICR, isr);
7121 + out_be32(priv->reg + TALITOS_ICR_LO, isr_lo);
7122 +
7123 + if (unlikely((isr & ~TALITOS_ISR_CHDONE) || isr_lo))
7124 + talitos_error((unsigned long)data);
7125 + else
7126 + if (likely(isr & TALITOS_ISR_CHDONE))
7127 + tasklet_schedule(&priv->done_task);
7128 +
7129 + return (isr || isr_lo) ? IRQ_HANDLED : IRQ_NONE;
7130 +}
7131 +
7132 +/*
7133 + * hwrng
7134 + */
7135 +static int talitos_rng_data_present(struct hwrng *rng, int wait)
7136 +{
7137 + struct device *dev = (struct device *)rng->priv;
7138 + struct talitos_private *priv = dev_get_drvdata(dev);
7139 + u32 ofl;
7140 + int i;
7141 +
7142 + for (i = 0; i < 20; i++) {
7143 + ofl = in_be32(priv->reg + TALITOS_RNGUSR_LO) &
7144 + TALITOS_RNGUSR_LO_OFL;
7145 + if (ofl || !wait)
7146 + break;
7147 + udelay(10);
7148 + }
7149 +
7150 + return !!ofl;
7151 +}
7152 +
7153 +static int talitos_rng_data_read(struct hwrng *rng, u32 *data)
7154 +{
7155 + struct device *dev = (struct device *)rng->priv;
7156 + struct talitos_private *priv = dev_get_drvdata(dev);
7157 +
7158 + /* rng fifo requires 64-bit accesses */
7159 + *data = in_be32(priv->reg + TALITOS_RNGU_FIFO);
7160 + *data = in_be32(priv->reg + TALITOS_RNGU_FIFO_LO);
7161 +
7162 + return sizeof(u32);
7163 +}
7164 +
7165 +static int talitos_rng_init(struct hwrng *rng)
7166 +{
7167 + struct device *dev = (struct device *)rng->priv;
7168 + struct talitos_private *priv = dev_get_drvdata(dev);
7169 + unsigned int timeout = TALITOS_TIMEOUT;
7170 +
7171 + setbits32(priv->reg + TALITOS_RNGURCR_LO, TALITOS_RNGURCR_LO_SR);
7172 + while (!(in_be32(priv->reg + TALITOS_RNGUSR_LO) & TALITOS_RNGUSR_LO_RD)
7173 + && --timeout)
7174 + cpu_relax();
7175 + if (timeout == 0) {
7176 + dev_err(dev, "failed to reset rng hw\n");
7177 + return -ENODEV;
7178 + }
7179 +
7180 + /* start generating */
7181 + setbits32(priv->reg + TALITOS_RNGUDSR_LO, 0);
7182 +
7183 + return 0;
7184 +}
7185 +
7186 +static int talitos_register_rng(struct device *dev)
7187 +{
7188 + struct talitos_private *priv = dev_get_drvdata(dev);
7189 +
7190 + priv->rng.name = dev_driver_string(dev),
7191 + priv->rng.init = talitos_rng_init,
7192 + priv->rng.data_present = talitos_rng_data_present,
7193 + priv->rng.data_read = talitos_rng_data_read,
7194 + priv->rng.priv = (unsigned long)dev;
7195 +
7196 + return hwrng_register(&priv->rng);
7197 +}
7198 +
7199 +static void talitos_unregister_rng(struct device *dev)
7200 +{
7201 + struct talitos_private *priv = dev_get_drvdata(dev);
7202 +
7203 + hwrng_unregister(&priv->rng);
7204 +}
7205 +
7206 +/*
7207 + * crypto alg
7208 + */
7209 +#define TALITOS_CRA_PRIORITY 3000
7210 +#define TALITOS_MAX_KEY_SIZE 64
7211 +#define TALITOS_MAX_IV_LENGTH 16 /* max of AES_BLOCK_SIZE, DES3_EDE_BLOCK_SIZE */
7212 +
7213 +#define MD5_DIGEST_SIZE 16
7214 +
7215 +struct talitos_ctx {
7216 + struct device *dev;
7217 + __be32 desc_hdr_template;
7218 + u8 key[TALITOS_MAX_KEY_SIZE];
7219 + u8 iv[TALITOS_MAX_IV_LENGTH];
7220 + unsigned int keylen;
7221 + unsigned int enckeylen;
7222 + unsigned int authkeylen;
7223 + unsigned int authsize;
7224 +};
7225 +
7226 +static int aead_authenc_setauthsize(struct crypto_aead *authenc,
7227 + unsigned int authsize)
7228 +{
7229 + struct talitos_ctx *ctx = crypto_aead_ctx(authenc);
7230 +
7231 + ctx->authsize = authsize;
7232 +
7233 + return 0;
7234 +}
7235 +
7236 +static int aead_authenc_setkey(struct crypto_aead *authenc,
7237 + const u8 *key, unsigned int keylen)
7238 +{
7239 + struct talitos_ctx *ctx = crypto_aead_ctx(authenc);
7240 + struct rtattr *rta = (void *)key;
7241 + struct crypto_authenc_key_param *param;
7242 + unsigned int authkeylen;
7243 + unsigned int enckeylen;
7244 +
7245 + if (!RTA_OK(rta, keylen))
7246 + goto badkey;
7247 +
7248 + if (rta->rta_type != CRYPTO_AUTHENC_KEYA_PARAM)
7249 + goto badkey;
7250 +
7251 + if (RTA_PAYLOAD(rta) < sizeof(*param))
7252 + goto badkey;
7253 +
7254 + param = RTA_DATA(rta);
7255 + enckeylen = be32_to_cpu(param->enckeylen);
7256 +
7257 + key += RTA_ALIGN(rta->rta_len);
7258 + keylen -= RTA_ALIGN(rta->rta_len);
7259 +
7260 + if (keylen < enckeylen)
7261 + goto badkey;
7262 +
7263 + authkeylen = keylen - enckeylen;
7264 +
7265 + if (keylen > TALITOS_MAX_KEY_SIZE)
7266 + goto badkey;
7267 +
7268 + memcpy(&ctx->key, key, keylen);
7269 +
7270 + ctx->keylen = keylen;
7271 + ctx->enckeylen = enckeylen;
7272 + ctx->authkeylen = authkeylen;
7273 +
7274 + return 0;
7275 +
7276 +badkey:
7277 + crypto_aead_set_flags(authenc, CRYPTO_TFM_RES_BAD_KEY_LEN);
7278 + return -EINVAL;
7279 +}
7280 +
7281 +/*
7282 + * ipsec_esp_edesc - s/w-extended ipsec_esp descriptor
7283 + * @src_nents: number of segments in input scatterlist
7284 + * @dst_nents: number of segments in output scatterlist
7285 + * @dma_len: length of dma mapped link_tbl space
7286 + * @dma_link_tbl: bus physical address of link_tbl
7287 + * @desc: h/w descriptor
7288 + * @link_tbl: input and output h/w link tables (if {src,dst}_nents > 1)
7289 + *
7290 + * if decrypting (with authcheck), or either one of src_nents or dst_nents
7291 + * is greater than 1, an integrity check value is concatenated to the end
7292 + * of link_tbl data
7293 + */
7294 +struct ipsec_esp_edesc {
7295 + int src_nents;
7296 + int dst_nents;
7297 + int dma_len;
7298 + dma_addr_t dma_link_tbl;
7299 + struct talitos_desc desc;
7300 + struct talitos_ptr link_tbl[0];
7301 +};
7302 +
7303 +static void ipsec_esp_unmap(struct device *dev,
7304 + struct ipsec_esp_edesc *edesc,
7305 + struct aead_request *areq)
7306 +{
7307 + unmap_single_talitos_ptr(dev, &edesc->desc.ptr[6], DMA_FROM_DEVICE);
7308 + unmap_single_talitos_ptr(dev, &edesc->desc.ptr[3], DMA_TO_DEVICE);
7309 + unmap_single_talitos_ptr(dev, &edesc->desc.ptr[2], DMA_TO_DEVICE);
7310 + unmap_single_talitos_ptr(dev, &edesc->desc.ptr[0], DMA_TO_DEVICE);
7311 +
7312 + dma_unmap_sg(dev, areq->assoc, 1, DMA_TO_DEVICE);
7313 +
7314 + if (areq->src != areq->dst) {
7315 + dma_unmap_sg(dev, areq->src, edesc->src_nents ? : 1,
7316 + DMA_TO_DEVICE);
7317 + dma_unmap_sg(dev, areq->dst, edesc->dst_nents ? : 1,
7318 + DMA_FROM_DEVICE);
7319 + } else {
7320 + dma_unmap_sg(dev, areq->src, edesc->src_nents ? : 1,
7321 + DMA_BIDIRECTIONAL);
7322 + }
7323 +
7324 + if (edesc->dma_len)
7325 + dma_unmap_single(dev, edesc->dma_link_tbl, edesc->dma_len,
7326 + DMA_BIDIRECTIONAL);
7327 +}
7328 +
7329 +/*
7330 + * ipsec_esp descriptor callbacks
7331 + */
7332 +static void ipsec_esp_encrypt_done(struct device *dev,
7333 + struct talitos_desc *desc, void *context,
7334 + int err)
7335 +{
7336 + struct aead_request *areq = context;
7337 + struct ipsec_esp_edesc *edesc =
7338 + container_of(desc, struct ipsec_esp_edesc, desc);
7339 + struct crypto_aead *authenc = crypto_aead_reqtfm(areq);
7340 + struct talitos_ctx *ctx = crypto_aead_ctx(authenc);
7341 + struct scatterlist *sg;
7342 + void *icvdata;
7343 +
7344 + ipsec_esp_unmap(dev, edesc, areq);
7345 +
7346 + /* copy the generated ICV to dst */
7347 + if (edesc->dma_len) {
7348 + icvdata = &edesc->link_tbl[edesc->src_nents +
7349 + edesc->dst_nents + 1];
7350 + sg = sg_last(areq->dst, edesc->dst_nents);
7351 + memcpy((char *)sg_virt(sg) + sg->length - ctx->authsize,
7352 + icvdata, ctx->authsize);
7353 + }
7354 +
7355 + kfree(edesc);
7356 +
7357 + aead_request_complete(areq, err);
7358 +}
7359 +
7360 +static void ipsec_esp_decrypt_done(struct device *dev,
7361 + struct talitos_desc *desc, void *context,
7362 + int err)
7363 +{
7364 + struct aead_request *req = context;
7365 + struct ipsec_esp_edesc *edesc =
7366 + container_of(desc, struct ipsec_esp_edesc, desc);
7367 + struct crypto_aead *authenc = crypto_aead_reqtfm(req);
7368 + struct talitos_ctx *ctx = crypto_aead_ctx(authenc);
7369 + struct scatterlist *sg;
7370 + void *icvdata;
7371 +
7372 + ipsec_esp_unmap(dev, edesc, req);
7373 +
7374 + if (!err) {
7375 + /* auth check */
7376 + if (edesc->dma_len)
7377 + icvdata = &edesc->link_tbl[edesc->src_nents +
7378 + edesc->dst_nents + 1];
7379 + else
7380 + icvdata = &edesc->link_tbl[0];
7381 +
7382 + sg = sg_last(req->dst, edesc->dst_nents ? : 1);
7383 + err = memcmp(icvdata, (char *)sg_virt(sg) + sg->length -
7384 + ctx->authsize, ctx->authsize) ? -EBADMSG : 0;
7385 + }
7386 +
7387 + kfree(edesc);
7388 +
7389 + aead_request_complete(req, err);
7390 +}
7391 +
7392 +/*
7393 + * convert scatterlist to SEC h/w link table format
7394 + * stop at cryptlen bytes
7395 + */
7396 +static int sg_to_link_tbl(struct scatterlist *sg, int sg_count,
7397 + int cryptlen, struct talitos_ptr *link_tbl_ptr)
7398 +{
7399 + int n_sg = sg_count;
7400 +
7401 + while (n_sg--) {
7402 + link_tbl_ptr->ptr = cpu_to_be32(sg_dma_address(sg));
7403 + link_tbl_ptr->len = cpu_to_be16(sg_dma_len(sg));
7404 + link_tbl_ptr->j_extent = 0;
7405 + link_tbl_ptr++;
7406 + cryptlen -= sg_dma_len(sg);
7407 + sg = sg_next(sg);
7408 + }
7409 +
7410 + /* adjust (decrease) last one (or two) entry's len to cryptlen */
7411 + link_tbl_ptr--;
7412 + while (link_tbl_ptr->len <= (-cryptlen)) {
7413 + /* Empty this entry, and move to previous one */
7414 + cryptlen += be16_to_cpu(link_tbl_ptr->len);
7415 + link_tbl_ptr->len = 0;
7416 + sg_count--;
7417 + link_tbl_ptr--;
7418 + }
7419 + link_tbl_ptr->len = cpu_to_be16(be16_to_cpu(link_tbl_ptr->len)
7420 + + cryptlen);
7421 +
7422 + /* tag end of link table */
7423 + link_tbl_ptr->j_extent = DESC_PTR_LNKTBL_RETURN;
7424 +
7425 + return sg_count;
7426 +}
7427 +
7428 +/*
7429 + * fill in and submit ipsec_esp descriptor
7430 + */
7431 +static int ipsec_esp(struct ipsec_esp_edesc *edesc, struct aead_request *areq,
7432 + u8 *giv, u64 seq,
7433 + void (*callback) (struct device *dev,
7434 + struct talitos_desc *desc,
7435 + void *context, int error))
7436 +{
7437 + struct crypto_aead *aead = crypto_aead_reqtfm(areq);
7438 + struct talitos_ctx *ctx = crypto_aead_ctx(aead);
7439 + struct device *dev = ctx->dev;
7440 + struct talitos_desc *desc = &edesc->desc;
7441 + unsigned int cryptlen = areq->cryptlen;
7442 + unsigned int authsize = ctx->authsize;
7443 + unsigned int ivsize;
7444 + int sg_count;
7445 +
7446 + /* hmac key */
7447 + map_single_talitos_ptr(dev, &desc->ptr[0], ctx->authkeylen, &ctx->key,
7448 + 0, DMA_TO_DEVICE);
7449 + /* hmac data */
7450 + map_single_talitos_ptr(dev, &desc->ptr[1], sg_virt(areq->src) -
7451 + sg_virt(areq->assoc), sg_virt(areq->assoc), 0,
7452 + DMA_TO_DEVICE);
7453 + /* cipher iv */
7454 + ivsize = crypto_aead_ivsize(aead);
7455 + map_single_talitos_ptr(dev, &desc->ptr[2], ivsize, giv ?: areq->iv, 0,
7456 + DMA_TO_DEVICE);
7457 +
7458 + /* cipher key */
7459 + map_single_talitos_ptr(dev, &desc->ptr[3], ctx->enckeylen,
7460 + (char *)&ctx->key + ctx->authkeylen, 0,
7461 + DMA_TO_DEVICE);
7462 +
7463 + /*
7464 + * cipher in
7465 + * map and adjust cipher len to aead request cryptlen.
7466 + * extent is bytes of HMAC postpended to ciphertext,
7467 + * typically 12 for ipsec
7468 + */
7469 + desc->ptr[4].len = cpu_to_be16(cryptlen);
7470 + desc->ptr[4].j_extent = authsize;
7471 +
7472 + if (areq->src == areq->dst)
7473 + sg_count = dma_map_sg(dev, areq->src, edesc->src_nents ? : 1,
7474 + DMA_BIDIRECTIONAL);
7475 + else
7476 + sg_count = dma_map_sg(dev, areq->src, edesc->src_nents ? : 1,
7477 + DMA_TO_DEVICE);
7478 +
7479 + if (sg_count == 1) {
7480 + desc->ptr[4].ptr = cpu_to_be32(sg_dma_address(areq->src));
7481 + } else {
7482 + sg_count = sg_to_link_tbl(areq->src, sg_count, cryptlen,
7483 + &edesc->link_tbl[0]);
7484 + if (sg_count > 1) {
7485 + desc->ptr[4].j_extent |= DESC_PTR_LNKTBL_JUMP;
7486 + desc->ptr[4].ptr = cpu_to_be32(edesc->dma_link_tbl);
7487 + dma_sync_single_for_device(ctx->dev, edesc->dma_link_tbl,
7488 + edesc->dma_len, DMA_BIDIRECTIONAL);
7489 + } else {
7490 + /* Only one segment now, so no link tbl needed */
7491 + desc->ptr[4].ptr = cpu_to_be32(sg_dma_address(areq->src));
7492 + }
7493 + }
7494 +
7495 + /* cipher out */
7496 + desc->ptr[5].len = cpu_to_be16(cryptlen);
7497 + desc->ptr[5].j_extent = authsize;
7498 +
7499 + if (areq->src != areq->dst) {
7500 + sg_count = dma_map_sg(dev, areq->dst, edesc->dst_nents ? : 1,
7501 + DMA_FROM_DEVICE);
7502 + }
7503 +
7504 + if (sg_count == 1) {
7505 + desc->ptr[5].ptr = cpu_to_be32(sg_dma_address(areq->dst));
7506 + } else {
7507 + struct talitos_ptr *link_tbl_ptr =
7508 + &edesc->link_tbl[edesc->src_nents];
7509 + struct scatterlist *sg;
7510 +
7511 + desc->ptr[5].ptr = cpu_to_be32((struct talitos_ptr *)
7512 + edesc->dma_link_tbl +
7513 + edesc->src_nents);
7514 + if (areq->src == areq->dst) {
7515 + memcpy(link_tbl_ptr, &edesc->link_tbl[0],
7516 + edesc->src_nents * sizeof(struct talitos_ptr));
7517 + } else {
7518 + sg_count = sg_to_link_tbl(areq->dst, sg_count, cryptlen,
7519 + link_tbl_ptr);
7520 + }
7521 + link_tbl_ptr += sg_count - 1;
7522 +
7523 + /* handle case where sg_last contains the ICV exclusively */
7524 + sg = sg_last(areq->dst, edesc->dst_nents);
7525 + if (sg->length == ctx->authsize)
7526 + link_tbl_ptr--;
7527 +
7528 + link_tbl_ptr->j_extent = 0;
7529 + link_tbl_ptr++;
7530 + link_tbl_ptr->j_extent = DESC_PTR_LNKTBL_RETURN;
7531 + link_tbl_ptr->len = cpu_to_be16(authsize);
7532 +
7533 + /* icv data follows link tables */
7534 + link_tbl_ptr->ptr = cpu_to_be32((struct talitos_ptr *)
7535 + edesc->dma_link_tbl +
7536 + edesc->src_nents +
7537 + edesc->dst_nents + 1);
7538 +
7539 + desc->ptr[5].j_extent |= DESC_PTR_LNKTBL_JUMP;
7540 + dma_sync_single_for_device(ctx->dev, edesc->dma_link_tbl,
7541 + edesc->dma_len, DMA_BIDIRECTIONAL);
7542 + }
7543 +
7544 + /* iv out */
7545 + map_single_talitos_ptr(dev, &desc->ptr[6], ivsize, ctx->iv, 0,
7546 + DMA_FROM_DEVICE);
7547 +
7548 + return talitos_submit(dev, desc, callback, areq);
7549 +}
7550 +
7551 +
7552 +/*
7553 + * derive number of elements in scatterlist
7554 + */
7555 +static int sg_count(struct scatterlist *sg_list, int nbytes)
7556 +{
7557 + struct scatterlist *sg = sg_list;
7558 + int sg_nents = 0;
7559 +
7560 + while (nbytes) {
7561 + sg_nents++;
7562 + nbytes -= sg->length;
7563 + sg = sg_next(sg);
7564 + }
7565 +
7566 + return sg_nents;
7567 +}
7568 +
7569 +/*
7570 + * allocate and map the ipsec_esp extended descriptor
7571 + */
7572 +static struct ipsec_esp_edesc *ipsec_esp_edesc_alloc(struct aead_request *areq,
7573 + int icv_stashing)
7574 +{
7575 + struct crypto_aead *authenc = crypto_aead_reqtfm(areq);
7576 + struct talitos_ctx *ctx = crypto_aead_ctx(authenc);
7577 + struct ipsec_esp_edesc *edesc;
7578 + int src_nents, dst_nents, alloc_len, dma_len;
7579 +
7580 + if (areq->cryptlen + ctx->authsize > TALITOS_MAX_DATA_LEN) {
7581 + dev_err(ctx->dev, "cryptlen exceeds h/w max limit\n");
7582 + return ERR_PTR(-EINVAL);
7583 + }
7584 +
7585 + src_nents = sg_count(areq->src, areq->cryptlen + ctx->authsize);
7586 + src_nents = (src_nents == 1) ? 0 : src_nents;
7587 +
7588 + if (areq->dst == areq->src) {
7589 + dst_nents = src_nents;
7590 + } else {
7591 + dst_nents = sg_count(areq->dst, areq->cryptlen + ctx->authsize);
7592 + dst_nents = (dst_nents == 1) ? 0 : src_nents;
7593 + }
7594 +
7595 + /*
7596 + * allocate space for base edesc plus the link tables,
7597 + * allowing for a separate entry for the generated ICV (+ 1),
7598 + * and the ICV data itself
7599 + */
7600 + alloc_len = sizeof(struct ipsec_esp_edesc);
7601 + if (src_nents || dst_nents) {
7602 + dma_len = (src_nents + dst_nents + 1) *
7603 + sizeof(struct talitos_ptr) + ctx->authsize;
7604 + alloc_len += dma_len;
7605 + } else {
7606 + dma_len = 0;
7607 + alloc_len += icv_stashing ? ctx->authsize : 0;
7608 + }
7609 +
7610 + edesc = kmalloc(alloc_len, GFP_DMA);
7611 + if (!edesc) {
7612 + dev_err(ctx->dev, "could not allocate edescriptor\n");
7613 + return ERR_PTR(-ENOMEM);
7614 + }
7615 +
7616 + edesc->src_nents = src_nents;
7617 + edesc->dst_nents = dst_nents;
7618 + edesc->dma_len = dma_len;
7619 + edesc->dma_link_tbl = dma_map_single(ctx->dev, &edesc->link_tbl[0],
7620 + edesc->dma_len, DMA_BIDIRECTIONAL);
7621 +
7622 + return edesc;
7623 +}
7624 +
7625 +static int aead_authenc_encrypt(struct aead_request *req)
7626 +{
7627 + struct crypto_aead *authenc = crypto_aead_reqtfm(req);
7628 + struct talitos_ctx *ctx = crypto_aead_ctx(authenc);
7629 + struct ipsec_esp_edesc *edesc;
7630 +
7631 + /* allocate extended descriptor */
7632 + edesc = ipsec_esp_edesc_alloc(req, 0);
7633 + if (IS_ERR(edesc))
7634 + return PTR_ERR(edesc);
7635 +
7636 + /* set encrypt */
7637 + edesc->desc.hdr = ctx->desc_hdr_template | DESC_HDR_MODE0_ENCRYPT;
7638 +
7639 + return ipsec_esp(edesc, req, NULL, 0, ipsec_esp_encrypt_done);
7640 +}
7641 +
7642 +static int aead_authenc_decrypt(struct aead_request *req)
7643 +{
7644 + struct crypto_aead *authenc = crypto_aead_reqtfm(req);
7645 + struct talitos_ctx *ctx = crypto_aead_ctx(authenc);
7646 + unsigned int authsize = ctx->authsize;
7647 + struct ipsec_esp_edesc *edesc;
7648 + struct scatterlist *sg;
7649 + void *icvdata;
7650 +
7651 + req->cryptlen -= authsize;
7652 +
7653 + /* allocate extended descriptor */
7654 + edesc = ipsec_esp_edesc_alloc(req, 1);
7655 + if (IS_ERR(edesc))
7656 + return PTR_ERR(edesc);
7657 +
7658 + /* stash incoming ICV for later cmp with ICV generated by the h/w */
7659 + if (edesc->dma_len)
7660 + icvdata = &edesc->link_tbl[edesc->src_nents +
7661 + edesc->dst_nents + 1];
7662 + else
7663 + icvdata = &edesc->link_tbl[0];
7664 +
7665 + sg = sg_last(req->src, edesc->src_nents ? : 1);
7666 +
7667 + memcpy(icvdata, (char *)sg_virt(sg) + sg->length - ctx->authsize,
7668 + ctx->authsize);
7669 +
7670 + /* decrypt */
7671 + edesc->desc.hdr = ctx->desc_hdr_template | DESC_HDR_DIR_INBOUND;
7672 +
7673 + return ipsec_esp(edesc, req, NULL, 0, ipsec_esp_decrypt_done);
7674 +}
7675 +
7676 +static int aead_authenc_givencrypt(
7677 + struct aead_givcrypt_request *req)
7678 +{
7679 + struct aead_request *areq = &req->areq;
7680 + struct crypto_aead *authenc = crypto_aead_reqtfm(areq);
7681 + struct talitos_ctx *ctx = crypto_aead_ctx(authenc);
7682 + struct ipsec_esp_edesc *edesc;
7683 +
7684 + /* allocate extended descriptor */
7685 + edesc = ipsec_esp_edesc_alloc(areq, 0);
7686 + if (IS_ERR(edesc))
7687 + return PTR_ERR(edesc);
7688 +
7689 + /* set encrypt */
7690 + edesc->desc.hdr = ctx->desc_hdr_template | DESC_HDR_MODE0_ENCRYPT;
7691 +
7692 + memcpy(req->giv, ctx->iv, crypto_aead_ivsize(authenc));
7693 +
7694 + return ipsec_esp(edesc, areq, req->giv, req->seq,
7695 + ipsec_esp_encrypt_done);
7696 +}
7697 +
7698 +struct talitos_alg_template {
7699 + char name[CRYPTO_MAX_ALG_NAME];
7700 + char driver_name[CRYPTO_MAX_ALG_NAME];
7701 + unsigned int blocksize;
7702 + struct aead_alg aead;
7703 + struct device *dev;
7704 + __be32 desc_hdr_template;
7705 +};
7706 +
7707 +static struct talitos_alg_template driver_algs[] = {
7708 + /* single-pass ipsec_esp descriptor */
7709 + {
7710 + .name = "authenc(hmac(sha1),cbc(aes))",
7711 + .driver_name = "authenc-hmac-sha1-cbc-aes-talitos",
7712 + .blocksize = AES_BLOCK_SIZE,
7713 + .aead = {
7714 + .setkey = aead_authenc_setkey,
7715 + .setauthsize = aead_authenc_setauthsize,
7716 + .encrypt = aead_authenc_encrypt,
7717 + .decrypt = aead_authenc_decrypt,
7718 + .givencrypt = aead_authenc_givencrypt,
7719 + .geniv = "<built-in>",
7720 + .ivsize = AES_BLOCK_SIZE,
7721 + .maxauthsize = SHA1_DIGEST_SIZE,
7722 + },
7723 + .desc_hdr_template = DESC_HDR_TYPE_IPSEC_ESP |
7724 + DESC_HDR_SEL0_AESU |
7725 + DESC_HDR_MODE0_AESU_CBC |
7726 + DESC_HDR_SEL1_MDEUA |
7727 + DESC_HDR_MODE1_MDEU_INIT |
7728 + DESC_HDR_MODE1_MDEU_PAD |
7729 + DESC_HDR_MODE1_MDEU_SHA1_HMAC,
7730 + },
7731 + {
7732 + .name = "authenc(hmac(sha1),cbc(des3_ede))",
7733 + .driver_name = "authenc-hmac-sha1-cbc-3des-talitos",
7734 + .blocksize = DES3_EDE_BLOCK_SIZE,
7735 + .aead = {
7736 + .setkey = aead_authenc_setkey,
7737 + .setauthsize = aead_authenc_setauthsize,
7738 + .encrypt = aead_authenc_encrypt,
7739 + .decrypt = aead_authenc_decrypt,
7740 + .givencrypt = aead_authenc_givencrypt,
7741 + .geniv = "<built-in>",
7742 + .ivsize = DES3_EDE_BLOCK_SIZE,
7743 + .maxauthsize = SHA1_DIGEST_SIZE,
7744 + },
7745 + .desc_hdr_template = DESC_HDR_TYPE_IPSEC_ESP |
7746 + DESC_HDR_SEL0_DEU |
7747 + DESC_HDR_MODE0_DEU_CBC |
7748 + DESC_HDR_MODE0_DEU_3DES |
7749 + DESC_HDR_SEL1_MDEUA |
7750 + DESC_HDR_MODE1_MDEU_INIT |
7751 + DESC_HDR_MODE1_MDEU_PAD |
7752 + DESC_HDR_MODE1_MDEU_SHA1_HMAC,
7753 + },
7754 + {
7755 + .name = "authenc(hmac(sha256),cbc(aes))",
7756 + .driver_name = "authenc-hmac-sha256-cbc-aes-talitos",
7757 + .blocksize = AES_BLOCK_SIZE,
7758 + .aead = {
7759 + .setkey = aead_authenc_setkey,
7760 + .setauthsize = aead_authenc_setauthsize,
7761 + .encrypt = aead_authenc_encrypt,
7762 + .decrypt = aead_authenc_decrypt,
7763 + .givencrypt = aead_authenc_givencrypt,
7764 + .geniv = "<built-in>",
7765 + .ivsize = AES_BLOCK_SIZE,
7766 + .maxauthsize = SHA256_DIGEST_SIZE,
7767 + },
7768 + .desc_hdr_template = DESC_HDR_TYPE_IPSEC_ESP |
7769 + DESC_HDR_SEL0_AESU |
7770 + DESC_HDR_MODE0_AESU_CBC |
7771 + DESC_HDR_SEL1_MDEUA |
7772 + DESC_HDR_MODE1_MDEU_INIT |
7773 + DESC_HDR_MODE1_MDEU_PAD |
7774 + DESC_HDR_MODE1_MDEU_SHA256_HMAC,
7775 + },
7776 + {
7777 + .name = "authenc(hmac(sha256),cbc(des3_ede))",
7778 + .driver_name = "authenc-hmac-sha256-cbc-3des-talitos",
7779 + .blocksize = DES3_EDE_BLOCK_SIZE,
7780 + .aead = {
7781 + .setkey = aead_authenc_setkey,
7782 + .setauthsize = aead_authenc_setauthsize,
7783 + .encrypt = aead_authenc_encrypt,
7784 + .decrypt = aead_authenc_decrypt,
7785 + .givencrypt = aead_authenc_givencrypt,
7786 + .geniv = "<built-in>",
7787 + .ivsize = DES3_EDE_BLOCK_SIZE,
7788 + .maxauthsize = SHA256_DIGEST_SIZE,
7789 + },
7790 + .desc_hdr_template = DESC_HDR_TYPE_IPSEC_ESP |
7791 + DESC_HDR_SEL0_DEU |
7792 + DESC_HDR_MODE0_DEU_CBC |
7793 + DESC_HDR_MODE0_DEU_3DES |
7794 + DESC_HDR_SEL1_MDEUA |
7795 + DESC_HDR_MODE1_MDEU_INIT |
7796 + DESC_HDR_MODE1_MDEU_PAD |
7797 + DESC_HDR_MODE1_MDEU_SHA256_HMAC,
7798 + },
7799 + {
7800 + .name = "authenc(hmac(md5),cbc(aes))",
7801 + .driver_name = "authenc-hmac-md5-cbc-aes-talitos",
7802 + .blocksize = AES_BLOCK_SIZE,
7803 + .aead = {
7804 + .setkey = aead_authenc_setkey,
7805 + .setauthsize = aead_authenc_setauthsize,
7806 + .encrypt = aead_authenc_encrypt,
7807 + .decrypt = aead_authenc_decrypt,
7808 + .givencrypt = aead_authenc_givencrypt,
7809 + .geniv = "<built-in>",
7810 + .ivsize = AES_BLOCK_SIZE,
7811 + .maxauthsize = MD5_DIGEST_SIZE,
7812 + },
7813 + .desc_hdr_template = DESC_HDR_TYPE_IPSEC_ESP |
7814 + DESC_HDR_SEL0_AESU |
7815 + DESC_HDR_MODE0_AESU_CBC |
7816 + DESC_HDR_SEL1_MDEUA |
7817 + DESC_HDR_MODE1_MDEU_INIT |
7818 + DESC_HDR_MODE1_MDEU_PAD |
7819 + DESC_HDR_MODE1_MDEU_MD5_HMAC,
7820 + },
7821 + {
7822 + .name = "authenc(hmac(md5),cbc(des3_ede))",
7823 + .driver_name = "authenc-hmac-md5-cbc-3des-talitos",
7824 + .blocksize = DES3_EDE_BLOCK_SIZE,
7825 + .aead = {
7826 + .setkey = aead_authenc_setkey,
7827 + .setauthsize = aead_authenc_setauthsize,
7828 + .encrypt = aead_authenc_encrypt,
7829 + .decrypt = aead_authenc_decrypt,
7830 + .givencrypt = aead_authenc_givencrypt,
7831 + .geniv = "<built-in>",
7832 + .ivsize = DES3_EDE_BLOCK_SIZE,
7833 + .maxauthsize = MD5_DIGEST_SIZE,
7834 + },
7835 + .desc_hdr_template = DESC_HDR_TYPE_IPSEC_ESP |
7836 + DESC_HDR_SEL0_DEU |
7837 + DESC_HDR_MODE0_DEU_CBC |
7838 + DESC_HDR_MODE0_DEU_3DES |
7839 + DESC_HDR_SEL1_MDEUA |
7840 + DESC_HDR_MODE1_MDEU_INIT |
7841 + DESC_HDR_MODE1_MDEU_PAD |
7842 + DESC_HDR_MODE1_MDEU_MD5_HMAC,
7843 + }
7844 +};
7845 +
7846 +struct talitos_crypto_alg {
7847 + struct list_head entry;
7848 + struct device *dev;
7849 + __be32 desc_hdr_template;
7850 + struct crypto_alg crypto_alg;
7851 +};
7852 +
7853 +static int talitos_cra_init(struct crypto_tfm *tfm)
7854 +{
7855 + struct crypto_alg *alg = tfm->__crt_alg;
7856 + struct talitos_crypto_alg *talitos_alg =
7857 + container_of(alg, struct talitos_crypto_alg, crypto_alg);
7858 + struct talitos_ctx *ctx = crypto_tfm_ctx(tfm);
7859 +
7860 + /* update context with ptr to dev */
7861 + ctx->dev = talitos_alg->dev;
7862 + /* copy descriptor header template value */
7863 + ctx->desc_hdr_template = talitos_alg->desc_hdr_template;
7864 +
7865 + /* random first IV */
7866 + get_random_bytes(ctx->iv, TALITOS_MAX_IV_LENGTH);
7867 +
7868 + return 0;
7869 +}
7870 +
7871 +/*
7872 + * given the alg's descriptor header template, determine whether descriptor
7873 + * type and primary/secondary execution units required match the hw
7874 + * capabilities description provided in the device tree node.
7875 + */
7876 +static int hw_supports(struct device *dev, __be32 desc_hdr_template)
7877 +{
7878 + struct talitos_private *priv = dev_get_drvdata(dev);
7879 + int ret;
7880 +
7881 + ret = (1 << DESC_TYPE(desc_hdr_template) & priv->desc_types) &&
7882 + (1 << PRIMARY_EU(desc_hdr_template) & priv->exec_units);
7883 +
7884 + if (SECONDARY_EU(desc_hdr_template))
7885 + ret = ret && (1 << SECONDARY_EU(desc_hdr_template)
7886 + & priv->exec_units);
7887 +
7888 + return ret;
7889 +}
7890 +
7891 +static int __devexit talitos_remove(struct of_device *ofdev)
7892 +{
7893 + struct device *dev = &ofdev->dev;
7894 + struct talitos_private *priv = dev_get_drvdata(dev);
7895 + struct talitos_crypto_alg *t_alg, *n;
7896 + int i;
7897 +
7898 + list_for_each_entry_safe(t_alg, n, &priv->alg_list, entry) {
7899 + crypto_unregister_alg(&t_alg->crypto_alg);
7900 + list_del(&t_alg->entry);
7901 + kfree(t_alg);
7902 + }
7903 +
7904 + if (hw_supports(dev, DESC_HDR_SEL0_RNG))
7905 + talitos_unregister_rng(dev);
7906 +
7907 + kfree(priv->tail);
7908 + kfree(priv->head);
7909 +
7910 + if (priv->fifo)
7911 + for (i = 0; i < priv->num_channels; i++)
7912 + kfree(priv->fifo[i]);
7913 +
7914 + kfree(priv->fifo);
7915 + kfree(priv->head_lock);
7916 + kfree(priv->tail_lock);
7917 +
7918 + if (priv->irq != NO_IRQ) {
7919 + free_irq(priv->irq, dev);
7920 + irq_dispose_mapping(priv->irq);
7921 + }
7922 +
7923 + tasklet_kill(&priv->done_task);
7924 + tasklet_kill(&priv->error_task);
7925 +
7926 + iounmap(priv->reg);
7927 +
7928 + dev_set_drvdata(dev, NULL);
7929 +
7930 + kfree(priv);
7931 +
7932 + return 0;
7933 +}
7934 +
7935 +static struct talitos_crypto_alg *talitos_alg_alloc(struct device *dev,
7936 + struct talitos_alg_template
7937 + *template)
7938 +{
7939 + struct talitos_crypto_alg *t_alg;
7940 + struct crypto_alg *alg;
7941 +
7942 + t_alg = kzalloc(sizeof(struct talitos_crypto_alg), GFP_KERNEL);
7943 + if (!t_alg)
7944 + return ERR_PTR(-ENOMEM);
7945 +
7946 + alg = &t_alg->crypto_alg;
7947 +
7948 + snprintf(alg->cra_name, CRYPTO_MAX_ALG_NAME, "%s", template->name);
7949 + snprintf(alg->cra_driver_name, CRYPTO_MAX_ALG_NAME, "%s",
7950 + template->driver_name);
7951 + alg->cra_module = THIS_MODULE;
7952 + alg->cra_init = talitos_cra_init;
7953 + alg->cra_priority = TALITOS_CRA_PRIORITY;
7954 + alg->cra_flags = CRYPTO_ALG_TYPE_AEAD | CRYPTO_ALG_ASYNC;
7955 + alg->cra_blocksize = template->blocksize;
7956 + alg->cra_alignmask = 0;
7957 + alg->cra_type = &crypto_aead_type;
7958 + alg->cra_ctxsize = sizeof(struct talitos_ctx);
7959 + alg->cra_u.aead = template->aead;
7960 +
7961 + t_alg->desc_hdr_template = template->desc_hdr_template;
7962 + t_alg->dev = dev;
7963 +
7964 + return t_alg;
7965 +}
7966 +
7967 +static int talitos_probe(struct of_device *ofdev,
7968 + const struct of_device_id *match)
7969 +{
7970 + struct device *dev = &ofdev->dev;
7971 + struct device_node *np = ofdev->node;
7972 + struct talitos_private *priv;
7973 + const unsigned int *prop;
7974 + int i, err;
7975 +
7976 + priv = kzalloc(sizeof(struct talitos_private), GFP_KERNEL);
7977 + if (!priv)
7978 + return -ENOMEM;
7979 +
7980 + dev_set_drvdata(dev, priv);
7981 +
7982 + priv->ofdev = ofdev;
7983 +
7984 + tasklet_init(&priv->done_task, talitos_done, (unsigned long)dev);
7985 + tasklet_init(&priv->error_task, talitos_error, (unsigned long)dev);
7986 +
7987 + priv->irq = irq_of_parse_and_map(np, 0);
7988 +
7989 + if (priv->irq == NO_IRQ) {
7990 + dev_err(dev, "failed to map irq\n");
7991 + err = -EINVAL;
7992 + goto err_out;
7993 + }
7994 +
7995 + /* get the irq line */
7996 + err = request_irq(priv->irq, talitos_interrupt, 0,
7997 + dev_driver_string(dev), dev);
7998 + if (err) {
7999 + dev_err(dev, "failed to request irq %d\n", priv->irq);
8000 + irq_dispose_mapping(priv->irq);
8001 + priv->irq = NO_IRQ;
8002 + goto err_out;
8003 + }
8004 +
8005 + priv->reg = of_iomap(np, 0);
8006 + if (!priv->reg) {
8007 + dev_err(dev, "failed to of_iomap\n");
8008 + err = -ENOMEM;
8009 + goto err_out;
8010 + }
8011 +
8012 + /* get SEC version capabilities from device tree */
8013 + prop = of_get_property(np, "fsl,num-channels", NULL);
8014 + if (prop)
8015 + priv->num_channels = *prop;
8016 +
8017 + prop = of_get_property(np, "fsl,channel-fifo-len", NULL);
8018 + if (prop)
8019 + priv->chfifo_len = *prop;
8020 +
8021 + prop = of_get_property(np, "fsl,exec-units-mask", NULL);
8022 + if (prop)
8023 + priv->exec_units = *prop;
8024 +
8025 + prop = of_get_property(np, "fsl,descriptor-types-mask", NULL);
8026 + if (prop)
8027 + priv->desc_types = *prop;
8028 +
8029 + if (!is_power_of_2(priv->num_channels) || !priv->chfifo_len ||
8030 + !priv->exec_units || !priv->desc_types) {
8031 + dev_err(dev, "invalid property data in device tree node\n");
8032 + err = -EINVAL;
8033 + goto err_out;
8034 + }
8035 +
8036 + of_node_put(np);
8037 + np = NULL;
8038 +
8039 + priv->head_lock = kmalloc(sizeof(spinlock_t) * priv->num_channels,
8040 + GFP_KERNEL);
8041 + priv->tail_lock = kmalloc(sizeof(spinlock_t) * priv->num_channels,
8042 + GFP_KERNEL);
8043 + if (!priv->head_lock || !priv->tail_lock) {
8044 + dev_err(dev, "failed to allocate fifo locks\n");
8045 + err = -ENOMEM;
8046 + goto err_out;
8047 + }
8048 +
8049 + for (i = 0; i < priv->num_channels; i++) {
8050 + spin_lock_init(&priv->head_lock[i]);
8051 + spin_lock_init(&priv->tail_lock[i]);
8052 + }
8053 +
8054 + priv->fifo = kmalloc(sizeof(struct talitos_request *) *
8055 + priv->num_channels, GFP_KERNEL);
8056 + if (!priv->fifo) {
8057 + dev_err(dev, "failed to allocate request fifo\n");
8058 + err = -ENOMEM;
8059 + goto err_out;
8060 + }
8061 +
8062 + priv->fifo_len = roundup_pow_of_two(priv->chfifo_len);
8063 +
8064 + for (i = 0; i < priv->num_channels; i++) {
8065 + priv->fifo[i] = kzalloc(sizeof(struct talitos_request) *
8066 + priv->fifo_len, GFP_KERNEL);
8067 + if (!priv->fifo[i]) {
8068 + dev_err(dev, "failed to allocate request fifo %d\n", i);
8069 + err = -ENOMEM;
8070 + goto err_out;
8071 + }
8072 + }
8073 +
8074 + priv->head = kzalloc(sizeof(int) * priv->num_channels, GFP_KERNEL);
8075 + priv->tail = kzalloc(sizeof(int) * priv->num_channels, GFP_KERNEL);
8076 + if (!priv->head || !priv->tail) {
8077 + dev_err(dev, "failed to allocate request index space\n");
8078 + err = -ENOMEM;
8079 + goto err_out;
8080 + }
8081 +
8082 + /* reset and initialize the h/w */
8083 + err = init_device(dev);
8084 + if (err) {
8085 + dev_err(dev, "failed to initialize device\n");
8086 + goto err_out;
8087 + }
8088 +
8089 + /* register the RNG, if available */
8090 + if (hw_supports(dev, DESC_HDR_SEL0_RNG)) {
8091 + err = talitos_register_rng(dev);
8092 + if (err) {
8093 + dev_err(dev, "failed to register hwrng: %d\n", err);
8094 + goto err_out;
8095 + } else
8096 + dev_info(dev, "hwrng\n");
8097 + }
8098 +
8099 + /* register crypto algorithms the device supports */
8100 + INIT_LIST_HEAD(&priv->alg_list);
8101 +
8102 + for (i = 0; i < ARRAY_SIZE(driver_algs); i++) {
8103 + if (hw_supports(dev, driver_algs[i].desc_hdr_template)) {
8104 + struct talitos_crypto_alg *t_alg;
8105 +
8106 + t_alg = talitos_alg_alloc(dev, &driver_algs[i]);
8107 + if (IS_ERR(t_alg)) {
8108 + err = PTR_ERR(t_alg);
8109 + goto err_out;
8110 + }
8111 +
8112 + err = crypto_register_alg(&t_alg->crypto_alg);
8113 + if (err) {
8114 + dev_err(dev, "%s alg registration failed\n",
8115 + t_alg->crypto_alg.cra_driver_name);
8116 + kfree(t_alg);
8117 + } else {
8118 + list_add_tail(&t_alg->entry, &priv->alg_list);
8119 + dev_info(dev, "%s\n",
8120 + t_alg->crypto_alg.cra_driver_name);
8121 + }
8122 + }
8123 + }
8124 +
8125 + return 0;
8126 +
8127 +err_out:
8128 + talitos_remove(ofdev);
8129 + if (np)
8130 + of_node_put(np);
8131 +
8132 + return err;
8133 +}
8134 +
8135 +static struct of_device_id talitos_match[] = {
8136 + {
8137 + .compatible = "fsl,sec2.0",
8138 + },
8139 + {},
8140 +};
8141 +MODULE_DEVICE_TABLE(of, talitos_match);
8142 +
8143 +static struct of_platform_driver talitos_driver = {
8144 + .name = "talitos",
8145 + .match_table = talitos_match,
8146 + .probe = talitos_probe,
8147 + .remove = __devexit_p(talitos_remove),
8148 +};
8149 +
8150 +static int __init talitos_init(void)
8151 +{
8152 + return of_register_platform_driver(&talitos_driver);
8153 +}
8154 +module_init(talitos_init);
8155 +
8156 +static void __exit talitos_exit(void)
8157 +{
8158 + of_unregister_platform_driver(&talitos_driver);
8159 +}
8160 +module_exit(talitos_exit);
8161 +
8162 +MODULE_LICENSE("GPL");
8163 +MODULE_AUTHOR("Kim Phillips <kim.phillips@freescale.com>");
8164 +MODULE_DESCRIPTION("Freescale integrated security engine (SEC) driver");
8165 --- /dev/null
8166 +++ b/drivers/crypto/talitos.h
8167 @@ -0,0 +1,199 @@
8168 +/*
8169 + * Freescale SEC (talitos) device register and descriptor header defines
8170 + *
8171 + * Copyright (c) 2006-2008 Freescale Semiconductor, Inc.
8172 + *
8173 + * Redistribution and use in source and binary forms, with or without
8174 + * modification, are permitted provided that the following conditions
8175 + * are met:
8176 + *
8177 + * 1. Redistributions of source code must retain the above copyright
8178 + * notice, this list of conditions and the following disclaimer.
8179 + * 2. Redistributions in binary form must reproduce the above copyright
8180 + * notice, this list of conditions and the following disclaimer in the
8181 + * documentation and/or other materials provided with the distribution.
8182 + * 3. The name of the author may not be used to endorse or promote products
8183 + * derived from this software without specific prior written permission.
8184 + *
8185 + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
8186 + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
8187 + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
8188 + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
8189 + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
8190 + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
8191 + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
8192 + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
8193 + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
8194 + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
8195 + *
8196 + */
8197 +
8198 +/*
8199 + * TALITOS_xxx_LO addresses point to the low data bits (32-63) of the register
8200 + */
8201 +
8202 +/* global register offset addresses */
8203 +#define TALITOS_MCR 0x1030 /* master control register */
8204 +#define TALITOS_MCR_LO 0x1038
8205 +#define TALITOS_MCR_SWR 0x1 /* s/w reset */
8206 +#define TALITOS_IMR 0x1008 /* interrupt mask register */
8207 +#define TALITOS_IMR_INIT 0x10fff /* enable channel IRQs */
8208 +#define TALITOS_IMR_LO 0x100C
8209 +#define TALITOS_IMR_LO_INIT 0x20000 /* allow RNGU error IRQs */
8210 +#define TALITOS_ISR 0x1010 /* interrupt status register */
8211 +#define TALITOS_ISR_CHERR 0xaa /* channel errors mask */
8212 +#define TALITOS_ISR_CHDONE 0x55 /* channel done mask */
8213 +#define TALITOS_ISR_LO 0x1014
8214 +#define TALITOS_ICR 0x1018 /* interrupt clear register */
8215 +#define TALITOS_ICR_LO 0x101C
8216 +
8217 +/* channel register address stride */
8218 +#define TALITOS_CH_STRIDE 0x100
8219 +
8220 +/* channel configuration register */
8221 +#define TALITOS_CCCR(ch) (ch * TALITOS_CH_STRIDE + 0x1108)
8222 +#define TALITOS_CCCR_CONT 0x2 /* channel continue */
8223 +#define TALITOS_CCCR_RESET 0x1 /* channel reset */
8224 +#define TALITOS_CCCR_LO(ch) (ch * TALITOS_CH_STRIDE + 0x110c)
8225 +#define TALITOS_CCCR_LO_CDWE 0x10 /* chan. done writeback enab. */
8226 +#define TALITOS_CCCR_LO_NT 0x4 /* notification type */
8227 +#define TALITOS_CCCR_LO_CDIE 0x2 /* channel done IRQ enable */
8228 +
8229 +/* CCPSR: channel pointer status register */
8230 +#define TALITOS_CCPSR(ch) (ch * TALITOS_CH_STRIDE + 0x1110)
8231 +#define TALITOS_CCPSR_LO(ch) (ch * TALITOS_CH_STRIDE + 0x1114)
8232 +#define TALITOS_CCPSR_LO_DOF 0x8000 /* double FF write oflow error */
8233 +#define TALITOS_CCPSR_LO_SOF 0x4000 /* single FF write oflow error */
8234 +#define TALITOS_CCPSR_LO_MDTE 0x2000 /* master data transfer error */
8235 +#define TALITOS_CCPSR_LO_SGDLZ 0x1000 /* s/g data len zero error */
8236 +#define TALITOS_CCPSR_LO_FPZ 0x0800 /* fetch ptr zero error */
8237 +#define TALITOS_CCPSR_LO_IDH 0x0400 /* illegal desc hdr error */
8238 +#define TALITOS_CCPSR_LO_IEU 0x0200 /* invalid EU error */
8239 +#define TALITOS_CCPSR_LO_EU 0x0100 /* EU error detected */
8240 +#define TALITOS_CCPSR_LO_GB 0x0080 /* gather boundary error */
8241 +#define TALITOS_CCPSR_LO_GRL 0x0040 /* gather return/length error */
8242 +#define TALITOS_CCPSR_LO_SB 0x0020 /* scatter boundary error */
8243 +#define TALITOS_CCPSR_LO_SRL 0x0010 /* scatter return/length error */
8244 +
8245 +/* channel fetch fifo register */
8246 +#define TALITOS_FF(ch) (ch * TALITOS_CH_STRIDE + 0x1148)
8247 +#define TALITOS_FF_LO(ch) (ch * TALITOS_CH_STRIDE + 0x114c)
8248 +
8249 +/* current descriptor pointer register */
8250 +#define TALITOS_CDPR(ch) (ch * TALITOS_CH_STRIDE + 0x1140)
8251 +#define TALITOS_CDPR_LO(ch) (ch * TALITOS_CH_STRIDE + 0x1144)
8252 +
8253 +/* descriptor buffer register */
8254 +#define TALITOS_DESCBUF(ch) (ch * TALITOS_CH_STRIDE + 0x1180)
8255 +#define TALITOS_DESCBUF_LO(ch) (ch * TALITOS_CH_STRIDE + 0x1184)
8256 +
8257 +/* gather link table */
8258 +#define TALITOS_GATHER(ch) (ch * TALITOS_CH_STRIDE + 0x11c0)
8259 +#define TALITOS_GATHER_LO(ch) (ch * TALITOS_CH_STRIDE + 0x11c4)
8260 +
8261 +/* scatter link table */
8262 +#define TALITOS_SCATTER(ch) (ch * TALITOS_CH_STRIDE + 0x11e0)
8263 +#define TALITOS_SCATTER_LO(ch) (ch * TALITOS_CH_STRIDE + 0x11e4)
8264 +
8265 +/* execution unit interrupt status registers */
8266 +#define TALITOS_DEUISR 0x2030 /* DES unit */
8267 +#define TALITOS_DEUISR_LO 0x2034
8268 +#define TALITOS_AESUISR 0x4030 /* AES unit */
8269 +#define TALITOS_AESUISR_LO 0x4034
8270 +#define TALITOS_MDEUISR 0x6030 /* message digest unit */
8271 +#define TALITOS_MDEUISR_LO 0x6034
8272 +#define TALITOS_AFEUISR 0x8030 /* arc4 unit */
8273 +#define TALITOS_AFEUISR_LO 0x8034
8274 +#define TALITOS_RNGUISR 0xa030 /* random number unit */
8275 +#define TALITOS_RNGUISR_LO 0xa034
8276 +#define TALITOS_RNGUSR 0xa028 /* rng status */
8277 +#define TALITOS_RNGUSR_LO 0xa02c
8278 +#define TALITOS_RNGUSR_LO_RD 0x1 /* reset done */
8279 +#define TALITOS_RNGUSR_LO_OFL 0xff0000/* output FIFO length */
8280 +#define TALITOS_RNGUDSR 0xa010 /* data size */
8281 +#define TALITOS_RNGUDSR_LO 0xa014
8282 +#define TALITOS_RNGU_FIFO 0xa800 /* output FIFO */
8283 +#define TALITOS_RNGU_FIFO_LO 0xa804 /* output FIFO */
8284 +#define TALITOS_RNGURCR 0xa018 /* reset control */
8285 +#define TALITOS_RNGURCR_LO 0xa01c
8286 +#define TALITOS_RNGURCR_LO_SR 0x1 /* software reset */
8287 +#define TALITOS_PKEUISR 0xc030 /* public key unit */
8288 +#define TALITOS_PKEUISR_LO 0xc034
8289 +#define TALITOS_KEUISR 0xe030 /* kasumi unit */
8290 +#define TALITOS_KEUISR_LO 0xe034
8291 +#define TALITOS_CRCUISR 0xf030 /* cyclic redundancy check unit*/
8292 +#define TALITOS_CRCUISR_LO 0xf034
8293 +
8294 +/*
8295 + * talitos descriptor header (hdr) bits
8296 + */
8297 +
8298 +/* written back when done */
8299 +#define DESC_HDR_DONE __constant_cpu_to_be32(0xff000000)
8300 +
8301 +/* primary execution unit select */
8302 +#define DESC_HDR_SEL0_MASK __constant_cpu_to_be32(0xf0000000)
8303 +#define DESC_HDR_SEL0_AFEU __constant_cpu_to_be32(0x10000000)
8304 +#define DESC_HDR_SEL0_DEU __constant_cpu_to_be32(0x20000000)
8305 +#define DESC_HDR_SEL0_MDEUA __constant_cpu_to_be32(0x30000000)
8306 +#define DESC_HDR_SEL0_MDEUB __constant_cpu_to_be32(0xb0000000)
8307 +#define DESC_HDR_SEL0_RNG __constant_cpu_to_be32(0x40000000)
8308 +#define DESC_HDR_SEL0_PKEU __constant_cpu_to_be32(0x50000000)
8309 +#define DESC_HDR_SEL0_AESU __constant_cpu_to_be32(0x60000000)
8310 +#define DESC_HDR_SEL0_KEU __constant_cpu_to_be32(0x70000000)
8311 +#define DESC_HDR_SEL0_CRCU __constant_cpu_to_be32(0x80000000)
8312 +
8313 +/* primary execution unit mode (MODE0) and derivatives */
8314 +#define DESC_HDR_MODE0_ENCRYPT __constant_cpu_to_be32(0x00100000)
8315 +#define DESC_HDR_MODE0_AESU_CBC __constant_cpu_to_be32(0x00200000)
8316 +#define DESC_HDR_MODE0_DEU_CBC __constant_cpu_to_be32(0x00400000)
8317 +#define DESC_HDR_MODE0_DEU_3DES __constant_cpu_to_be32(0x00200000)
8318 +#define DESC_HDR_MODE0_MDEU_INIT __constant_cpu_to_be32(0x01000000)
8319 +#define DESC_HDR_MODE0_MDEU_HMAC __constant_cpu_to_be32(0x00800000)
8320 +#define DESC_HDR_MODE0_MDEU_PAD __constant_cpu_to_be32(0x00400000)
8321 +#define DESC_HDR_MODE0_MDEU_MD5 __constant_cpu_to_be32(0x00200000)
8322 +#define DESC_HDR_MODE0_MDEU_SHA256 __constant_cpu_to_be32(0x00100000)
8323 +#define DESC_HDR_MODE0_MDEU_SHA1 __constant_cpu_to_be32(0x00000000)
8324 +#define DESC_HDR_MODE0_MDEU_MD5_HMAC (DESC_HDR_MODE0_MDEU_MD5 | \
8325 + DESC_HDR_MODE0_MDEU_HMAC)
8326 +#define DESC_HDR_MODE0_MDEU_SHA256_HMAC (DESC_HDR_MODE0_MDEU_SHA256 | \
8327 + DESC_HDR_MODE0_MDEU_HMAC)
8328 +#define DESC_HDR_MODE0_MDEU_SHA1_HMAC (DESC_HDR_MODE0_MDEU_SHA1 | \
8329 + DESC_HDR_MODE0_MDEU_HMAC)
8330 +
8331 +/* secondary execution unit select (SEL1) */
8332 +#define DESC_HDR_SEL1_MASK __constant_cpu_to_be32(0x000f0000)
8333 +#define DESC_HDR_SEL1_MDEUA __constant_cpu_to_be32(0x00030000)
8334 +#define DESC_HDR_SEL1_MDEUB __constant_cpu_to_be32(0x000b0000)
8335 +#define DESC_HDR_SEL1_CRCU __constant_cpu_to_be32(0x00080000)
8336 +
8337 +/* secondary execution unit mode (MODE1) and derivatives */
8338 +#define DESC_HDR_MODE1_MDEU_INIT __constant_cpu_to_be32(0x00001000)
8339 +#define DESC_HDR_MODE1_MDEU_HMAC __constant_cpu_to_be32(0x00000800)
8340 +#define DESC_HDR_MODE1_MDEU_PAD __constant_cpu_to_be32(0x00000400)
8341 +#define DESC_HDR_MODE1_MDEU_MD5 __constant_cpu_to_be32(0x00000200)
8342 +#define DESC_HDR_MODE1_MDEU_SHA256 __constant_cpu_to_be32(0x00000100)
8343 +#define DESC_HDR_MODE1_MDEU_SHA1 __constant_cpu_to_be32(0x00000000)
8344 +#define DESC_HDR_MODE1_MDEU_MD5_HMAC (DESC_HDR_MODE1_MDEU_MD5 | \
8345 + DESC_HDR_MODE1_MDEU_HMAC)
8346 +#define DESC_HDR_MODE1_MDEU_SHA256_HMAC (DESC_HDR_MODE1_MDEU_SHA256 | \
8347 + DESC_HDR_MODE1_MDEU_HMAC)
8348 +#define DESC_HDR_MODE1_MDEU_SHA1_HMAC (DESC_HDR_MODE1_MDEU_SHA1 | \
8349 + DESC_HDR_MODE1_MDEU_HMAC)
8350 +
8351 +/* direction of overall data flow (DIR) */
8352 +#define DESC_HDR_DIR_INBOUND __constant_cpu_to_be32(0x00000002)
8353 +
8354 +/* request done notification (DN) */
8355 +#define DESC_HDR_DONE_NOTIFY __constant_cpu_to_be32(0x00000001)
8356 +
8357 +/* descriptor types */
8358 +#define DESC_HDR_TYPE_AESU_CTR_NONSNOOP __constant_cpu_to_be32(0 << 3)
8359 +#define DESC_HDR_TYPE_IPSEC_ESP __constant_cpu_to_be32(1 << 3)
8360 +#define DESC_HDR_TYPE_COMMON_NONSNOOP_NO_AFEU __constant_cpu_to_be32(2 << 3)
8361 +#define DESC_HDR_TYPE_HMAC_SNOOP_NO_AFEU __constant_cpu_to_be32(4 << 3)
8362 +
8363 +/* link table extent field bits */
8364 +#define DESC_PTR_LNKTBL_JUMP 0x80
8365 +#define DESC_PTR_LNKTBL_RETURN 0x02
8366 +#define DESC_PTR_LNKTBL_NEXT 0x01
8367 --- /dev/null
8368 +++ b/include/crypto/hash.h
8369 @@ -0,0 +1,154 @@
8370 +/*
8371 + * Hash: Hash algorithms under the crypto API
8372 + *
8373 + * Copyright (c) 2008 Herbert Xu <herbert@gondor.apana.org.au>
8374 + *
8375 + * This program is free software; you can redistribute it and/or modify it
8376 + * under the terms of the GNU General Public License as published by the Free
8377 + * Software Foundation; either version 2 of the License, or (at your option)
8378 + * any later version.
8379 + *
8380 + */
8381 +
8382 +#ifndef _CRYPTO_HASH_H
8383 +#define _CRYPTO_HASH_H
8384 +
8385 +#include <linux/crypto.h>
8386 +
8387 +struct crypto_ahash {
8388 + struct crypto_tfm base;
8389 +};
8390 +
8391 +static inline struct crypto_ahash *__crypto_ahash_cast(struct crypto_tfm *tfm)
8392 +{
8393 + return (struct crypto_ahash *)tfm;
8394 +}
8395 +
8396 +static inline struct crypto_ahash *crypto_alloc_ahash(const char *alg_name,
8397 + u32 type, u32 mask)
8398 +{
8399 + type &= ~CRYPTO_ALG_TYPE_MASK;
8400 + mask &= ~CRYPTO_ALG_TYPE_MASK;
8401 + type |= CRYPTO_ALG_TYPE_AHASH;
8402 + mask |= CRYPTO_ALG_TYPE_AHASH_MASK;
8403 +
8404 + return __crypto_ahash_cast(crypto_alloc_base(alg_name, type, mask));
8405 +}
8406 +
8407 +static inline struct crypto_tfm *crypto_ahash_tfm(struct crypto_ahash *tfm)
8408 +{
8409 + return &tfm->base;
8410 +}
8411 +
8412 +static inline void crypto_free_ahash(struct crypto_ahash *tfm)
8413 +{
8414 + crypto_free_tfm(crypto_ahash_tfm(tfm));
8415 +}
8416 +
8417 +static inline unsigned int crypto_ahash_alignmask(
8418 + struct crypto_ahash *tfm)
8419 +{
8420 + return crypto_tfm_alg_alignmask(crypto_ahash_tfm(tfm));
8421 +}
8422 +
8423 +static inline struct ahash_tfm *crypto_ahash_crt(struct crypto_ahash *tfm)
8424 +{
8425 + return &crypto_ahash_tfm(tfm)->crt_ahash;
8426 +}
8427 +
8428 +static inline unsigned int crypto_ahash_digestsize(struct crypto_ahash *tfm)
8429 +{
8430 + return crypto_ahash_crt(tfm)->digestsize;
8431 +}
8432 +
8433 +static inline u32 crypto_ahash_get_flags(struct crypto_ahash *tfm)
8434 +{
8435 + return crypto_tfm_get_flags(crypto_ahash_tfm(tfm));
8436 +}
8437 +
8438 +static inline void crypto_ahash_set_flags(struct crypto_ahash *tfm, u32 flags)
8439 +{
8440 + crypto_tfm_set_flags(crypto_ahash_tfm(tfm), flags);
8441 +}
8442 +
8443 +static inline void crypto_ahash_clear_flags(struct crypto_ahash *tfm, u32 flags)
8444 +{
8445 + crypto_tfm_clear_flags(crypto_ahash_tfm(tfm), flags);
8446 +}
8447 +
8448 +static inline struct crypto_ahash *crypto_ahash_reqtfm(
8449 + struct ahash_request *req)
8450 +{
8451 + return __crypto_ahash_cast(req->base.tfm);
8452 +}
8453 +
8454 +static inline unsigned int crypto_ahash_reqsize(struct crypto_ahash *tfm)
8455 +{
8456 + return crypto_ahash_crt(tfm)->reqsize;
8457 +}
8458 +
8459 +static inline int crypto_ahash_setkey(struct crypto_ahash *tfm,
8460 + const u8 *key, unsigned int keylen)
8461 +{
8462 + struct ahash_tfm *crt = crypto_ahash_crt(tfm);
8463 +
8464 + return crt->setkey(tfm, key, keylen);
8465 +}
8466 +
8467 +static inline int crypto_ahash_digest(struct ahash_request *req)
8468 +{
8469 + struct ahash_tfm *crt = crypto_ahash_crt(crypto_ahash_reqtfm(req));
8470 + return crt->digest(req);
8471 +}
8472 +
8473 +static inline void ahash_request_set_tfm(struct ahash_request *req,
8474 + struct crypto_ahash *tfm)
8475 +{
8476 + req->base.tfm = crypto_ahash_tfm(tfm);
8477 +}
8478 +
8479 +static inline struct ahash_request *ahash_request_alloc(
8480 + struct crypto_ahash *tfm, gfp_t gfp)
8481 +{
8482 + struct ahash_request *req;
8483 +
8484 + req = kmalloc(sizeof(struct ahash_request) +
8485 + crypto_ahash_reqsize(tfm), gfp);
8486 +
8487 + if (likely(req))
8488 + ahash_request_set_tfm(req, tfm);
8489 +
8490 + return req;
8491 +}
8492 +
8493 +static inline void ahash_request_free(struct ahash_request *req)
8494 +{
8495 + kfree(req);
8496 +}
8497 +
8498 +static inline struct ahash_request *ahash_request_cast(
8499 + struct crypto_async_request *req)
8500 +{
8501 + return container_of(req, struct ahash_request, base);
8502 +}
8503 +
8504 +static inline void ahash_request_set_callback(struct ahash_request *req,
8505 + u32 flags,
8506 + crypto_completion_t complete,
8507 + void *data)
8508 +{
8509 + req->base.complete = complete;
8510 + req->base.data = data;
8511 + req->base.flags = flags;
8512 +}
8513 +
8514 +static inline void ahash_request_set_crypt(struct ahash_request *req,
8515 + struct scatterlist *src, u8 *result,
8516 + unsigned int nbytes)
8517 +{
8518 + req->src = src;
8519 + req->nbytes = nbytes;
8520 + req->result = result;
8521 +}
8522 +
8523 +#endif /* _CRYPTO_HASH_H */
8524 --- /dev/null
8525 +++ b/include/crypto/internal/hash.h
8526 @@ -0,0 +1,78 @@
8527 +/*
8528 + * Hash algorithms.
8529 + *
8530 + * Copyright (c) 2008 Herbert Xu <herbert@gondor.apana.org.au>
8531 + *
8532 + * This program is free software; you can redistribute it and/or modify it
8533 + * under the terms of the GNU General Public License as published by the Free
8534 + * Software Foundation; either version 2 of the License, or (at your option)
8535 + * any later version.
8536 + *
8537 + */
8538 +
8539 +#ifndef _CRYPTO_INTERNAL_HASH_H
8540 +#define _CRYPTO_INTERNAL_HASH_H
8541 +
8542 +#include <crypto/algapi.h>
8543 +#include <crypto/hash.h>
8544 +
8545 +struct ahash_request;
8546 +struct scatterlist;
8547 +
8548 +struct crypto_hash_walk {
8549 + char *data;
8550 +
8551 + unsigned int offset;
8552 + unsigned int alignmask;
8553 +
8554 + struct page *pg;
8555 + unsigned int entrylen;
8556 +
8557 + unsigned int total;
8558 + struct scatterlist *sg;
8559 +
8560 + unsigned int flags;
8561 +};
8562 +
8563 +extern const struct crypto_type crypto_ahash_type;
8564 +
8565 +int crypto_hash_walk_done(struct crypto_hash_walk *walk, int err);
8566 +int crypto_hash_walk_first(struct ahash_request *req,
8567 + struct crypto_hash_walk *walk);
8568 +
8569 +static inline void *crypto_ahash_ctx(struct crypto_ahash *tfm)
8570 +{
8571 + return crypto_tfm_ctx(&tfm->base);
8572 +}
8573 +
8574 +static inline struct ahash_alg *crypto_ahash_alg(
8575 + struct crypto_ahash *tfm)
8576 +{
8577 + return &crypto_ahash_tfm(tfm)->__crt_alg->cra_ahash;
8578 +}
8579 +
8580 +static inline int ahash_enqueue_request(struct crypto_queue *queue,
8581 + struct ahash_request *request)
8582 +{
8583 + return crypto_enqueue_request(queue, &request->base);
8584 +}
8585 +
8586 +static inline struct ahash_request *ahash_dequeue_request(
8587 + struct crypto_queue *queue)
8588 +{
8589 + return ahash_request_cast(crypto_dequeue_request(queue));
8590 +}
8591 +
8592 +static inline void *ahash_request_ctx(struct ahash_request *req)
8593 +{
8594 + return req->__ctx;
8595 +}
8596 +
8597 +static inline int ahash_tfm_in_queue(struct crypto_queue *queue,
8598 + struct crypto_ahash *tfm)
8599 +{
8600 + return crypto_tfm_in_queue(queue, crypto_ahash_tfm(tfm));
8601 +}
8602 +
8603 +#endif /* _CRYPTO_INTERNAL_HASH_H */
8604 +
8605 --- a/include/linux/crypto.h
8606 +++ b/include/linux/crypto.h
8607 @@ -30,15 +30,17 @@
8608 */
8609 #define CRYPTO_ALG_TYPE_MASK 0x0000000f
8610 #define CRYPTO_ALG_TYPE_CIPHER 0x00000001
8611 -#define CRYPTO_ALG_TYPE_DIGEST 0x00000002
8612 -#define CRYPTO_ALG_TYPE_HASH 0x00000003
8613 +#define CRYPTO_ALG_TYPE_COMPRESS 0x00000002
8614 +#define CRYPTO_ALG_TYPE_AEAD 0x00000003
8615 #define CRYPTO_ALG_TYPE_BLKCIPHER 0x00000004
8616 #define CRYPTO_ALG_TYPE_ABLKCIPHER 0x00000005
8617 #define CRYPTO_ALG_TYPE_GIVCIPHER 0x00000006
8618 -#define CRYPTO_ALG_TYPE_COMPRESS 0x00000008
8619 -#define CRYPTO_ALG_TYPE_AEAD 0x00000009
8620 +#define CRYPTO_ALG_TYPE_DIGEST 0x00000008
8621 +#define CRYPTO_ALG_TYPE_HASH 0x00000009
8622 +#define CRYPTO_ALG_TYPE_AHASH 0x0000000a
8623
8624 #define CRYPTO_ALG_TYPE_HASH_MASK 0x0000000e
8625 +#define CRYPTO_ALG_TYPE_AHASH_MASK 0x0000000c
8626 #define CRYPTO_ALG_TYPE_BLKCIPHER_MASK 0x0000000c
8627
8628 #define CRYPTO_ALG_LARVAL 0x00000010
8629 @@ -102,6 +104,7 @@
8630 struct crypto_aead;
8631 struct crypto_blkcipher;
8632 struct crypto_hash;
8633 +struct crypto_ahash;
8634 struct crypto_tfm;
8635 struct crypto_type;
8636 struct aead_givcrypt_request;
8637 @@ -131,6 +134,16 @@
8638 void *__ctx[] CRYPTO_MINALIGN_ATTR;
8639 };
8640
8641 +struct ahash_request {
8642 + struct crypto_async_request base;
8643 +
8644 + unsigned int nbytes;
8645 + struct scatterlist *src;
8646 + u8 *result;
8647 +
8648 + void *__ctx[] CRYPTO_MINALIGN_ATTR;
8649 +};
8650 +
8651 /**
8652 * struct aead_request - AEAD request
8653 * @base: Common attributes for async crypto requests
8654 @@ -195,6 +208,17 @@
8655 unsigned int ivsize;
8656 };
8657
8658 +struct ahash_alg {
8659 + int (*init)(struct ahash_request *req);
8660 + int (*update)(struct ahash_request *req);
8661 + int (*final)(struct ahash_request *req);
8662 + int (*digest)(struct ahash_request *req);
8663 + int (*setkey)(struct crypto_ahash *tfm, const u8 *key,
8664 + unsigned int keylen);
8665 +
8666 + unsigned int digestsize;
8667 +};
8668 +
8669 struct aead_alg {
8670 int (*setkey)(struct crypto_aead *tfm, const u8 *key,
8671 unsigned int keylen);
8672 @@ -272,6 +296,7 @@
8673 #define cra_cipher cra_u.cipher
8674 #define cra_digest cra_u.digest
8675 #define cra_hash cra_u.hash
8676 +#define cra_ahash cra_u.ahash
8677 #define cra_compress cra_u.compress
8678
8679 struct crypto_alg {
8680 @@ -298,6 +323,7 @@
8681 struct cipher_alg cipher;
8682 struct digest_alg digest;
8683 struct hash_alg hash;
8684 + struct ahash_alg ahash;
8685 struct compress_alg compress;
8686 } cra_u;
8687
8688 @@ -383,6 +409,18 @@
8689 unsigned int digestsize;
8690 };
8691
8692 +struct ahash_tfm {
8693 + int (*init)(struct ahash_request *req);
8694 + int (*update)(struct ahash_request *req);
8695 + int (*final)(struct ahash_request *req);
8696 + int (*digest)(struct ahash_request *req);
8697 + int (*setkey)(struct crypto_ahash *tfm, const u8 *key,
8698 + unsigned int keylen);
8699 +
8700 + unsigned int digestsize;
8701 + unsigned int reqsize;
8702 +};
8703 +
8704 struct compress_tfm {
8705 int (*cot_compress)(struct crypto_tfm *tfm,
8706 const u8 *src, unsigned int slen,
8707 @@ -397,6 +435,7 @@
8708 #define crt_blkcipher crt_u.blkcipher
8709 #define crt_cipher crt_u.cipher
8710 #define crt_hash crt_u.hash
8711 +#define crt_ahash crt_u.ahash
8712 #define crt_compress crt_u.compress
8713
8714 struct crypto_tfm {
8715 @@ -409,6 +448,7 @@
8716 struct blkcipher_tfm blkcipher;
8717 struct cipher_tfm cipher;
8718 struct hash_tfm hash;
8719 + struct ahash_tfm ahash;
8720 struct compress_tfm compress;
8721 } crt_u;
8722
Staging tree of florian