target/linux/ipq40xx/files-4.14/arch/arm/boot/dts/qcom-ipq4018-jalapeno.dts

   1 /* Copyright (c) 2015, The Linux Foundation. All rights reserved.
   2  * Copyright (c) 2018, Robert Marko <robimarko@gmail.com>
   3  *
   4  * Permission to use, copy, modify, and/or distribute this software for any
   5  * purpose with or without fee is hereby granted, provided that the above
   6  * copyright notice and this permission notice appear in all copies.
   7  *
   8  * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
   9  * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
  10  * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
  11  * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
  12  * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
  13  * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
  14  * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
  15  *
  16  */
  17
  18 #include "qcom-ipq4019.dtsi"
  19 #include <dt-bindings/gpio/gpio.h>
  20 #include <dt-bindings/input/input.h>
  21 #include <dt-bindings/soc/qcom,tcsr.h>
  22
  23 / {
  24         model = "8devices Jalapeno";
  25         compatible = "8dev,jalapeno", "qcom,ipq4019";
  26
  27         soc {
  28                 mdio@90000 {
  29                         status = "okay";
  30                         pinctrl-0 = <&mdio_pins>;
  31                         pinctrl-names = "default";
  32                 };
  33
  34                 ess-psgmii@98000 {
  35                         status = "okay";
  36                 };
  37
  38                 counter@4a1000 {
  39                         compatible = "qcom,qca-gcnt";
  40                         reg = <0x4a1000 0x4>;
  41                 };
  42
  43                 tcsr@1949000 {
  44                         compatible = "qcom,tcsr";
  45                         reg = <0x1949000 0x100>;
  46                         qcom,wifi_glb_cfg = <TCSR_WIFI_GLB_CFG>;
  47                 };
  48
  49                 tcsr@194b000 {
  50                         /* select hostmode */
  51                         compatible = "qcom,tcsr";
  52                         reg = <0x194b000 0x100>;
  53                         qcom,usb-hsphy-mode-select = <TCSR_USB_HSPHY_HOST_MODE>;
  54                         status = "okay";
  55                 };
  56
  57                 ess_tcsr@1953000 {
  58                         compatible = "qcom,tcsr";
  59                         reg = <0x1953000 0x1000>;
  60                         qcom,ess-interface-select = <TCSR_ESS_PSGMII>;
  61                 };
  62
  63                 tcsr@1957000 {
  64                         compatible = "qcom,tcsr";
  65                         reg = <0x1957000 0x100>;
  66                         qcom,wifi_noc_memtype_m0_m2 = <TCSR_WIFI_NOC_MEMTYPE_M0_M2>;
  67                 };
  68
  69                 usb2: usb2@60f8800 {
  70                         status = "okay";
  71                 };
  72
  73                 serial@78af000 {
  74                         pinctrl-0 = <&serial_pins>;
  75                         pinctrl-names = "default";
  76                         status = "okay";
  77                 };
  78
  79                 usb3: usb3@8af8800 {
  80                         status = "okay";
  81                 };
  82
  83                 crypto@8e3a000 {
  84                         status = "okay";
  85                 };
  86
  87                 watchdog@b017000 {
  88                         status = "okay";
  89                 };
  90
  91                 ess-switch@c000000 {
  92                         status = "okay";
  93                         switch_lan_bmp = <0x10>; /* lan port bitmap */
  94                 };
  95
  96                 edma@c080000 {
  97                         status = "okay";
  98                 };
  99         };
 100 };
 101
 102 &tlmm {
 103         mdio_pins: mdio_pinmux {
 104                 pinmux_1 {
 105                         pins = "gpio53";
 106                         function = "mdio";
 107                 };
 108                 pinmux_2 {
 109                         pins = "gpio52";
 110                         function = "mdc";
 111                 };
 112                 pinconf {
 113                         pins = "gpio52", "gpio53";
 114                         bias-pull-up;
 115                 };
 116         };
 117
 118         serial_pins: serial_pinmux {
 119                 mux {
 120                         pins = "gpio60", "gpio61";
 121                         function = "blsp_uart0";
 122                         bias-disable;
 123                 };
 124         };
 125
 126         spi_0_pins: spi_0_pinmux {
 127                 pin {
 128                         function = "blsp_spi0";
 129                         pins = "gpio55", "gpio56", "gpio57";
 130                         drive-strength = <2>;
 131                         bias-disable;
 132                 };
 133                 pin_cs {
 134                         function = "gpio";
 135                         pins = "gpio54", "gpio59";
 136                         drive-strength = <2>;
 137                         bias-disable;
 138                         output-high;
 139                 };
 140         };
 141 };
 142
 143 &blsp_dma {
 144         status = "okay";
 145 };
 146
 147 &blsp1_spi1 {
 148         pinctrl-0 = <&spi_0_pins>;
 149         pinctrl-names = "default";
 150         cs-gpios = <&tlmm 54 GPIO_ACTIVE_HIGH>, <&tlmm 59 GPIO_ACTIVE_HIGH>;
 151         status = "okay";
 152
 153         m25p80@0 {
 154                 #address-cells = <1>;
 155                 #size-cells = <0>;
 156                 reg = <0>;
 157                 compatible = "jedec,spi-nor";
 158                 spi-max-frequency = <24000000>;
 159
 160                 partitions {
 161                         compatible = "fixed-partitions";
 162                         #address-cells = <1>;
 163                         #size-cells = <1>;
 164
 165                         partition0@0 {
 166                                 label = "SBL1";
 167                                 reg = <0x00000000 0x00040000>;
 168                                 read-only;
 169                         };
 170                         partition1@40000 {
 171                                 label = "MIBIB";
 172                                 reg = <0x00040000 0x00020000>;
 173                                 read-only;
 174                         };
 175                         partition2@60000 {
 176                                 label = "QSEE";
 177                                 reg = <0x00060000 0x00060000>;
 178                                 read-only;
 179                         };
 180                         partition3@c0000 {
 181                                 label = "CDT";
 182                                 reg = <0x000c0000 0x00010000>;
 183                                 read-only;
 184                         };
 185                         partition4@d0000 {
 186                                 label = "DDRPARAMS";
 187                                 reg = <0x000d0000 0x00010000>;
 188                                 read-only;
 189                         };
 190                         partition5@e0000 {
 191                                 label = "APPSBLENV"; /* uboot env*/
 192                                 reg = <0x000e0000 0x00010000>;
 193                                 read-only;
 194                         };
 195                         partition5@f0000 {
 196                                 label = "APPSBL"; /* uboot */
 197                                 reg = <0x000f0000 0x00080000>;
 198                                 read-only;
 199                         };
 200                         partition5@170000 {
 201                                 label = "ART";
 202                                 reg = <0x00170000 0x00010000>;
 203                                 read-only;
 204                         };
 205                 };
 206         };
 207
 208         mt29f@1 {
 209                 status = "okay";
 210                 #address-cells = <1>;
 211                 #size-cells = <0>;
 212                 compatible = "spinand,mt29f", "w25n01gv";
 213                 reg = <1>;
 214                 spi-max-frequency = <24000000>;
 215                 partitions {
 216                         compatible = "fixed-partitions";
 217                         #address-cells = <1>;
 218                         #size-cells = <1>;
 219
 220                         partition0@0 {
 221                                 label = "ubi";
 222                                 reg = <0x00000000 0x08000000>;
 223                         };
 224                 };
 225         };
 226 };
 227
 228 &cryptobam {
 229         status = "okay";
 230 };
 231
 232 &gmac0 {
 233         qcom,poll_required = <1>;
 234         qcom,poll_required_dynamic = <1>;
 235         qcom,phy_mdio_addr = <3>;
 236         vlan_tag = <1 0x10>;
 237 };
 238
 239 &gmac1 {
 240         qcom,poll_required = <1>;
 241         qcom,poll_required_dynamic = <1>;
 242         qcom,phy_mdio_addr = <4>;
 243         vlan_tag = <2 0x20>;
 244 };
 245
 246 &wifi0 {
 247         status = "okay";
 248         qcom,ath10k-calibration-variant = "8devices-Jalapeno";
 249 };
 250
 251 &wifi1 {
 252         status = "okay";
 253         qcom,ath10k-calibration-variant = "8devices-Jalapeno";
 254 };
 255
 256 &usb3_ss_phy {
 257         status = "okay";
 258 };
 259
 260 &usb3_hs_phy {
 261         status = "okay";
 262 };
 263
 264 &usb2_hs_phy {
 265         status = "okay";
 266 };