target/linux/ipq40xx/files-4.14/arch/arm/boot/dts/qcom-ipq4028-wpj428.dts

   1 /* Copyright (c) 2015, The Linux Foundation. All rights reserved.
   2  * Copyright (c) 2017, Christian Mehlis <christian@m3hlis.de>
   3  * Copyright (c) 2017-2018, Sven Eckelmann <sven.eckelmann@openmesh.com>
   4  *
   5  * Permission to use, copy, modify, and/or distribute this software for any
   6  * purpose with or without fee is hereby granted, provided that the above
   7  * copyright notice and this permission notice appear in all copies.
   8  *
   9  * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
  10  * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
  11  * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
  12  * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
  13  * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
  14  * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
  15  * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
  16  *
  17  */
  18
  19 #include "qcom-ipq4019.dtsi"
  20 #include <dt-bindings/gpio/gpio.h>
  21 #include <dt-bindings/input/input.h>
  22 #include <dt-bindings/soc/qcom,tcsr.h>
  23
  24 / {
  25         model = "Compex WPJ428";
  26         compatible = "compex,wpj428", "qcom,ipq4019";
  27
  28         soc {
  29                 mdio@90000 {
  30                         status = "okay";
  31                 };
  32
  33                 ess-psgmii@98000 {
  34                         status = "okay";
  35                 };
  36
  37                 tcsr@194b000 {
  38                         /* select hostmode */
  39                         compatible = "qcom,tcsr";
  40                         reg = <0x194b000 0x100>;
  41                         qcom,usb-hsphy-mode-select = <TCSR_USB_HSPHY_HOST_MODE>;
  42                         status = "okay";
  43                 };
  44
  45                 tcsr@1949000 {
  46                         compatible = "qcom,tcsr";
  47                         reg = <0x1949000 0x100>;
  48                         qcom,wifi_glb_cfg = <TCSR_WIFI_GLB_CFG>;
  49                 };
  50
  51                 ess_tcsr@1953000 {
  52                         compatible = "qcom,tcsr";
  53                         reg = <0x1953000 0x1000>;
  54                         qcom,ess-interface-select = <TCSR_ESS_PSGMII>;
  55                 };
  56
  57                 tcsr@1957000 {
  58                         compatible = "qcom,tcsr";
  59                         reg = <0x1957000 0x100>;
  60                         qcom,wifi_noc_memtype_m0_m2 = <TCSR_WIFI_NOC_MEMTYPE_M0_M2>;
  61                 };
  62
  63                 usb2: usb2@60f8800 {
  64                         status = "okay";
  65                 };
  66
  67                 serial@78af000 {
  68                         pinctrl-0 = <&serial_pins>;
  69                         pinctrl-names = "default";
  70                         status = "okay";
  71                 };
  72
  73                 usb3: usb3@8af8800 {
  74                         status = "okay";
  75                 };
  76
  77                 crypto@8e3a000 {
  78                         status = "okay";
  79                 };
  80
  81                 watchdog@b017000 {
  82                         status = "okay";
  83                 };
  84
  85                 ess-switch@c000000 {
  86                         switch_lan_bmp = <0x10>;
  87                         switch_wan_bmp = <0x20>;
  88
  89                         status = "okay";
  90                 };
  91
  92                 edma@c080000 {
  93                         status = "okay";
  94                 };
  95         };
  96
  97         gpio-keys {
  98                 compatible = "gpio-keys";
  99
 100                 reset {
 101                         label = "reset";
 102                         gpios = <&tlmm 63 GPIO_ACTIVE_LOW>;
 103                         linux,code = <KEY_RESTART>;
 104                 };
 105         };
 106
 107         aliases {
 108                 led-boot = &status;
 109                 led-failsafe = &status;
 110                 led-upgrade = &status;
 111         };
 112
 113         gpio-leds {
 114                 compatible = "gpio-leds";
 115
 116                 status: rss4 {
 117                         label = "wpj428:green:rss4";
 118                         gpios = <&tlmm 5 GPIO_ACTIVE_HIGH>;
 119                         default-state = "off";
 120                 };
 121
 122                 rss3 {
 123                         label = "wpj428:green:rss3";
 124                         gpios = <&tlmm 4 GPIO_ACTIVE_HIGH>;
 125                         default-state = "off";
 126                 };
 127         };
 128
 129         beeper: beeper {
 130                 compatible = "gpio-beeper";
 131                 gpios = <&tlmm 58 GPIO_ACTIVE_HIGH>;
 132         };
 133 };
 134
 135 &tlmm {
 136         serial_pins: serial_pinmux {
 137                 mux {
 138                         pins = "gpio60", "gpio61";
 139                         function = "blsp_uart0";
 140                         bias-disable;
 141                 };
 142         };
 143
 144         spi_0_pins: spi_0_pinmux {
 145                 pin {
 146                         function = "blsp_spi0";
 147                         pins = "gpio55", "gpio56", "gpio57";
 148                         drive-strength = <12>;
 149                         bias-disable;
 150                 };
 151                 pin_cs {
 152                         function = "gpio";
 153                         pins = "gpio54";
 154                         drive-strength = <2>;
 155                         bias-disable;
 156                         output-high;
 157                 };
 158         };
 159 };
 160
 161 &blsp_dma {
 162         status = "okay";
 163 };
 164
 165 &blsp1_spi1 {
 166         pinctrl-0 = <&spi_0_pins>;
 167         pinctrl-names = "default";
 168         status = "okay";
 169         cs-gpios = <&tlmm 54 GPIO_ACTIVE_HIGH>;
 170
 171         m25p80@0 {
 172                 #address-cells = <1>;
 173                 #size-cells = <1>;
 174                 compatible = "jedec,spi-nor";
 175                 reg = <0>;
 176                 spi-max-frequency = <24000000>;
 177
 178                 partitions {
 179                         compatible = "fixed-partitions";
 180                         #address-cells = <1>;
 181                         #size-cells = <1>;
 182
 183                         partition0@0 {
 184                                 label = "0:SBL1";
 185                                 reg = <0x00000000 0x00040000>;
 186                                 read-only;
 187                         };
 188                         partition1@40000 {
 189                                 label = "0:MIBIB";
 190                                 reg = <0x00040000 0x00020000>;
 191                                 read-only;
 192                         };
 193                         partition2@60000 {
 194                                 label = "0:QSEE";
 195                                 reg = <0x00060000 0x00060000>;
 196                                 read-only;
 197                         };
 198                         partition3@c0000 {
 199                                 label = "0:CDT";
 200                                 reg = <0x000c0000 0x00010000>;
 201                                 read-only;
 202                         };
 203                         partition4@d0000 {
 204                                 label = "0:DDRPARAMS";
 205                                 reg = <0x000d0000 0x00010000>;
 206                                 read-only;
 207                         };
 208                         partition5@e0000 {
 209                                 label = "0:APPSBLENV"; /* uboot env*/
 210                                 reg = <0x000e0000 0x00010000>;
 211                                 read-only;
 212                         };
 213                         partition5@f0000 {
 214                                 label = "0:APPSBL"; /* uboot */
 215                                 reg = <0x000f0000 0x00080000>;
 216                                 read-only;
 217                         };
 218                         partition5@170000 {
 219                                 label = "0:ART";
 220                                 reg = <0x00170000 0x00010000>;
 221                                 read-only;
 222                         };
 223                         partition6@180000 {
 224                                 compatible = "denx,fit";
 225                                 label = "firmware";
 226                                 reg = <0x00180000 0x01e80000>;
 227                         };
 228                 };
 229         };
 230 };
 231
 232 &cryptobam {
 233         status = "okay";
 234 };
 235
 236 &gmac0 {
 237         qcom,phy_mdio_addr = <4>;
 238         qcom,poll_required = <1>;
 239         qcom,forced_speed = <1000>;
 240         qcom,forced_duplex = <1>;
 241         vlan_tag = <2 0x20>;
 242 };
 243
 244 &gmac1 {
 245         qcom,phy_mdio_addr = <3>;
 246         qcom,poll_required = <1>;
 247         qcom,forced_speed = <1000>;
 248         qcom,forced_duplex = <1>;
 249         vlan_tag = <1 0x10>;
 250 };
 251
 252 &usb3_ss_phy {
 253         status = "okay";
 254 };
 255
 256 &usb3_hs_phy {
 257         status = "okay";
 258 };
 259
 260 &usb2_hs_phy {
 261         status = "okay";
 262 };
 263
 264 &wifi0 {
 265         status = "okay";
 266 };
 267
 268 &wifi1 {
 269         status = "okay";
 270 };