target/linux/ipq40xx/files-4.14/arch/arm/boot/dts/qcom-ipq4029-mr33.dts

   1 /*
   2  * Device Tree Source for Meraki MR33 (Stinkbug)
   3  *
   4  * Copyright (C) 2017 Chris Blake <chrisrblake93@gmail.com>
   5  * Copyright (C) 2017 Christian Lamparter <chunkeey@googlemail.com>
   6  *
   7  * Based on Cisco Meraki DTS from GPL release r25-linux-3.14-20170427
   8  *
   9  * This file is licensed under the terms of the GNU General Public
  10  * License version 2.  This program is licensed "as is" without
  11  * any warranty of any kind, whether express or implied.
  12  */
  13
  14 #include "qcom-ipq4019.dtsi"
  15 #include <dt-bindings/gpio/gpio.h>
  16 #include <dt-bindings/input/input.h>
  17 #include <dt-bindings/soc/qcom,tcsr.h>
  18
  19 / {
  20         model = "Meraki MR33 Access Point";
  21         compatible = "meraki,mr33", "qcom,ipq4019";
  22
  23         aliases {
  24                 led-boot = &status_green;
  25                 led-failsafe = &status_red;
  26                 led-running = &status_green;
  27                 led-upgrade = &power_orange;
  28         };
  29
  30         /* Do we really need this defined? */
  31         memory {
  32                 device_type = "memory";
  33                 reg = <0x80000000 0x10000000>;
  34         };
  35
  36         soc {
  37                 mdio@90000 {
  38                         status = "okay";
  39                         pinctrl-0 = <&mdio_pins>;
  40                         pinctrl-names = "default";
  41                         /delete-node/ ethernet-phy@0;
  42                         /delete-node/ ethernet-phy@2;
  43                         /delete-node/ ethernet-phy@3;
  44                         /delete-node/ ethernet-phy@4;
  45                 };
  46
  47                 /* It is a 56-bit counter that supplies the count to the ARM arch
  48                    timers and without upstream driver */
  49                 counter@4a1000 {
  50                         compatible = "qcom,qca-gcnt";
  51                         reg = <0x4a1000 0x4>;
  52                 };
  53
  54                 ess_tcsr@1953000 {
  55                         compatible = "qcom,tcsr";
  56                         reg = <0x1953000 0x1000>;
  57                         qcom,ess-interface-select = <TCSR_ESS_PSGMII_RGMII5>;
  58                 };
  59
  60                 tcsr@1949000 {
  61                         compatible = "qcom,tcsr";
  62                         reg = <0x1949000 0x100>;
  63                         qcom,wifi_glb_cfg = <TCSR_WIFI_GLB_CFG>;
  64                 };
  65
  66                 tcsr@1957000 {
  67                         compatible = "qcom,tcsr";
  68                         reg = <0x1957000 0x100>;
  69                         qcom,wifi_noc_memtype_m0_m2 = <TCSR_WIFI_NOC_MEMTYPE_M0_M2>;
  70                 };
  71
  72                 serial@78af000 {
  73                         pinctrl-0 = <&serial_0_pins>;
  74                         pinctrl-names = "default";
  75                         status = "okay";
  76                 };
  77
  78                 serial@78b0000 {
  79                         pinctrl-0 = <&serial_1_pins>;
  80                         pinctrl-names = "default";
  81                         status = "okay";
  82
  83                         bluetooth {
  84                                 compatible = "ti,cc2650";
  85                                 enable-gpios = <&tlmm 12 GPIO_ACTIVE_LOW>;
  86                         };
  87                 };
  88
  89                 crypto@8e3a000 {
  90                         status = "okay";
  91                 };
  92
  93                 watchdog@b017000 {
  94                         status = "okay";
  95                 };
  96
  97                 ess-switch@c000000 {
  98                         switch_mac_mode = <0x3>; /* mac mode for RGMII RMII */
  99                         switch_lan_bmp = <0x0>; /* lan port bitmap */
 100                         switch_wan_bmp = <0x10>; /* wan port bitmap */
 101                 };
 102
 103                 edma@c080000 {
 104                         qcom,single-phy;
 105                         qcom,num_gmac = <1>;
 106                         phy-mode = "rgmii-rxid";
 107                         status = "okay";
 108                 };
 109         };
 110
 111         gpio-keys {
 112                 compatible = "gpio-keys";
 113
 114                 reset {
 115                         label = "reset";
 116                         gpios = <&tlmm 18 GPIO_ACTIVE_LOW>;
 117                         linux,code = <KEY_RESTART>;
 118                 };
 119         };
 120
 121         gpio-leds {
 122                 compatible = "gpio-leds";
 123
 124                 power_orange: power {
 125                         label = "mr33:orange:power";
 126                         gpios = <&tlmm 49 GPIO_ACTIVE_LOW>;
 127                         panic-indicator;
 128                 };
 129         };
 130 };
 131
 132 &blsp_dma {
 133         status = "okay";
 134 };
 135
 136 &cryptobam {
 137         status = "okay";
 138 };
 139
 140 &gmac0 {
 141         qcom,phy_mdio_addr = <1>;
 142         qcom,poll_required = <1>;
 143         vlan_tag = <0 0x20>;
 144 };
 145
 146 &blsp1_i2c3{
 147         pinctrl-0 = <&i2c_0_pins>;
 148         pinctrl-names = "default";
 149         status = "okay";
 150         at24@50 {
 151                 compatible = "atmel,24c64";
 152                 pagesize = <32>;
 153                 reg = <0x50>;
 154                 read-only; /* This holds our MAC & Meraki board-data */
 155         };
 156 };
 157
 158 &blsp1_i2c4{
 159         pinctrl-0 = <&i2c_1_pins>;
 160         pinctrl-names = "default";
 161         status = "okay";
 162
 163         lp5562@30 {
 164                 enable-gpio = <&tlmm 48 GPIO_ACTIVE_HIGH>;
 165                 compatible = "ti,lp5562";
 166                 clock-mode = /bits/8 <2>;
 167                 reg = <0x30>;
 168
 169                 /* RGB led */
 170                 status_red: chan0 {
 171                         chan-name = "mr33:red:status";
 172                         led-cur = /bits/ 8 <0x20>;
 173                         max-cur = /bits/ 8 <0x60>;
 174                 };
 175
 176                 status_green: chan1 {
 177                         chan-name = "mr33:green:status";
 178                         led-cur = /bits/ 8 <0x20>;
 179                         max-cur = /bits/ 8 <0x60>;
 180                 };
 181
 182                 chan2 {
 183                         chan-name = "mr33:blue:status";
 184                         led-cur = /bits/ 8 <0x20>;
 185                         max-cur = /bits/ 8 <0x60>;
 186                 };
 187
 188                 chan3 {
 189                         chan-name = "mr33:white:status";
 190                         led-cur = /bits/ 8 <0x20>;
 191                         max-cur = /bits/ 8 <0x60>;
 192                 };
 193         };
 194 };
 195
 196 &nand {
 197         pinctrl-0 = <&nand_pins>;
 198         pinctrl-names = "default";
 199         status = "okay";
 200
 201         nand@0 {
 202                 partitions {
 203                         compatible = "fixed-partitions";
 204                         #address-cells = <1>;
 205                         #size-cells = <1>;
 206
 207                         partition@0 {
 208                                 label = "sbl1";
 209                                 reg = <0x000000000000 0x000000100000>;
 210                                 read-only;
 211                         };
 212                         partition@1 {
 213                                 label = "mibib";
 214                                 reg = <0x000000100000 0x000000100000>;
 215                                 read-only;
 216                         };
 217                         partition@2 {
 218                                 label = "bootconfig";
 219                                 reg = <0x000000200000 0x000000100000>;
 220                                 read-only;
 221                         };
 222                         partition@3 {
 223                                 label = "qsee";
 224                                 reg = <0x000000300000 0x000000100000>;
 225                                 read-only;
 226                         };
 227                         partition@4 {
 228                                 label = "qsee_alt";
 229                                 reg = <0x000000400000 0x000000100000>;
 230                                 read-only;
 231                         };
 232                         partition@5 {
 233                                 label = "cdt";
 234                                 reg = <0x000000500000 0x000000080000>;
 235                                 read-only;
 236                         };
 237                         partition@6 {
 238                                 label = "cdt_alt";
 239                                 reg = <0x000000580000 0x000000080000>;
 240                                 read-only;
 241                         };
 242                         partition@7 {
 243                                 label = "ddrparams";
 244                                 reg = <0x000000600000 0x000000080000>;
 245                                 read-only;
 246                         };
 247                         partition@8 {
 248                                 label = "u-boot";
 249                                 reg = <0x000000700000 0x000000200000>;
 250                                 read-only;
 251                         };
 252                         partition@9 {
 253                                 label = "u-boot-backup";
 254                                 reg = <0x000000900000 0x000000200000>;
 255                                 read-only;
 256                         };
 257                         partition@10 {
 258                                 label = "ART";
 259                                 reg = <0x000000b00000 0x000000080000>;
 260                                 read-only;
 261                         };
 262                         partition@11 {
 263                                 label = "ubi";
 264                                 reg = <0x000000c00000 0x000007000000>;
 265                         };
 266                 };
 267         };
 268 };
 269
 270 &pcie0 {
 271         status = "okay";
 272         perst-gpio = <&tlmm 38 GPIO_ACTIVE_LOW>;
 273         wake-gpio = <&tlmm 50 GPIO_ACTIVE_LOW>;
 274
 275         bridge@0,0 {
 276                 reg = <0x00000000 0 0 0 0>;
 277                 #address-cells = <3>;
 278                 #size-cells = <2>;
 279                 ranges;
 280
 281                 wifi2: wifi@0,0 {
 282                         compatible = "qcom,ath10k";
 283                         status = "okay";
 284                         reg = <0x00010000 0 0 0 0>;
 285                 };
 286         };
 287 };
 288
 289 &qpic_bam {
 290         status = "okay";
 291 };
 292
 293 &tlmm {
 294         /*
 295          * GPIO43 should be 0/1 whenever the unit is
 296          * powered through PoE or AC-Adapter.
 297          * That said, playing with this seems to
 298          * reset the AP.
 299          */
 300
 301         mdio_pins: mdio_pinmux {
 302                 mux_1 {
 303                         pins = "gpio6";
 304                         function = "mdio";
 305                         bias-pull-up;
 306                 };
 307                 mux_2 {
 308                         pins = "gpio7";
 309                         function = "mdc";
 310                         bias-pull-up;
 311                 };
 312         };
 313
 314         serial_0_pins: serial_pinmux {
 315                 mux {
 316                         pins = "gpio16", "gpio17";
 317                         function = "blsp_uart0";
 318                         bias-disable;
 319                 };
 320         };
 321
 322         serial_1_pins: serial1_pinmux {
 323                 mux {
 324                         /* We use the i2c-0 pins for serial_1 */
 325                         pins = "gpio8", "gpio9";
 326                         function = "blsp_uart1";
 327                         bias-disable;
 328                 };
 329         };
 330
 331         i2c_0_pins: i2c_0_pinmux {
 332                 pinmux {
 333                         function = "blsp_i2c0";
 334                         pins = "gpio20", "gpio21";
 335                 };
 336                 pinconf {
 337                         pins = "gpio20", "gpio21";
 338                         drive-strength = <16>;
 339                         bias-disable;
 340                 };
 341         };
 342
 343         i2c_1_pins: i2c_1_pinmux {
 344                 pinmux {
 345                         function = "blsp_i2c1";
 346                         pins = "gpio34", "gpio35";
 347                 };
 348                 pinconf {
 349                         pins = "gpio34", "gpio35";
 350                         drive-strength = <16>;
 351                         bias-disable;
 352                 };
 353         };
 354
 355         nand_pins: nand_pins {
 356                 /*
 357                  * There are 18 pins. 15 pins are common between LCD and NAND.
 358                  * The QPIC controller arbitrates between LCD and NAND. Of the
 359                  * remaining 4, 2 are for NAND and 2 are for LCD exclusively.
 360                  *
 361                  * The meraki source hints that the bluetooth module claims
 362                  * pin 52 as well. But sadly, there's no data whenever this
 363                  * is a NAND or LCD exclusive pin or not.
 364                  */
 365
 366                 pullups {
 367                         pins = "gpio52", "gpio53", "gpio58",
 368                                 "gpio59";
 369                         function = "qpic";
 370                         bias-pull-up;
 371                 };
 372
 373                 pulldowns {
 374                         pins = "gpio54", "gpio55", "gpio56",
 375                                 "gpio57", "gpio60", "gpio61",
 376                                 "gpio62", "gpio63", "gpio64",
 377                                 "gpio65", "gpio66", "gpio67",
 378                                 "gpio68", "gpio69";
 379                         function = "qpic";
 380                         bias-pull-down;
 381                 };
 382         };
 383 };
 384
 385 &wifi0 {
 386         status = "okay";
 387         qcom,ath10k-calibration-variant = "Meraki-MR33";
 388 };
 389
 390 &wifi1 {
 391         status = "okay";
 392         qcom,ath10k-calibration-variant = "Meraki-MR33";
 393 };