target/linux/ipq806x/patches-6.1/122-01-clk-qcom-krait-cc-handle-qsb-clock-defined-in-DTS.patch

   1 From 666c1b745e93ccddde841d5057c33f97b29a316a Mon Sep 17 00:00:00 2001
   2 From: Christian Marangi <ansuelsmth@gmail.com>
   3 Date: Thu, 15 Sep 2022 02:19:28 +0200
   4 Subject: [PATCH 3/9] clk: qcom: krait-cc: handle qsb clock defined in DTS
   5
   6 qsb fixed clk may be defined in DTS and correctly passed in the clocks
   7 list. Add related code to handle this and modify the logic to
   8 dynamically read qsb clock frequency.
   9
  10 Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
  11 ---
  12  drivers/clk/qcom/krait-cc.c | 14 +++++++++++---
  13  1 file changed, 11 insertions(+), 3 deletions(-)
  14
  15 --- a/drivers/clk/qcom/krait-cc.c
  16 +++ b/drivers/clk/qcom/krait-cc.c
  17 @@ -348,7 +348,7 @@ static int krait_cc_probe(struct platfor
  18  {
  19         struct device *dev = &pdev->dev;
  20         const struct of_device_id *id;
  21 -       unsigned long cur_rate, aux_rate;
  22 +       unsigned long cur_rate, aux_rate, qsb_rate;
  23         int cpu;
  24         struct clk_hw *mux, *l2_pri_mux;
  25         struct clk *clk, **clks;
  26 @@ -357,11 +357,19 @@ static int krait_cc_probe(struct platfor
  27         if (!id)
  28                 return -ENODEV;
  29
  30 -       /* Rate is 1 because 0 causes problems for __clk_mux_determine_rate */
  31 -       clk = clk_register_fixed_rate(dev, "qsb", NULL, 0, 1);
  32 +       /*
  33 +        * Per Documentation qsb should be provided from DTS.
  34 +        * To address old implementation, register the fixed clock anyway.
  35 +        * Rate is 1 because 0 causes problems for __clk_mux_determine_rate
  36 +        */
  37 +       clk = clk_get(dev, "qsb");
  38 +       if (IS_ERR(clk))
  39 +               clk = clk_register_fixed_rate(dev, "qsb", NULL, 0, 1);
  40         if (IS_ERR(clk))
  41                 return PTR_ERR(clk);
  42
  43 +       qsb_rate = clk_get_rate(clk);
  44 +
  45         if (!id->data) {
  46                 clk = clk_register_fixed_factor(dev, "acpu_aux",
  47                                                 "gpll0_vote", 0, 1, 2);