target/linux/realtek/dts-5.15/rtl9302_zyxel_xgs1250-12.dts

   1 // SPDX-License-Identifier: GPL-2.0-or-later
   2 /dts-v1/;
   3
   4 #include "rtl930x.dtsi"
   5
   6 #include <dt-bindings/input/input.h>
   7 #include <dt-bindings/gpio/gpio.h>
   8 #include <dt-bindings/leds/common.h>
   9
  10 / {
  11         compatible = "zyxel,xgs1250-12", "realtek,rtl838x-soc";
  12         model = "Zyxel XGS1250-12 Switch";
  13
  14         aliases {
  15                 led-boot = &led_pwr_sys;
  16                 led-failsafe = &led_pwr_sys;
  17                 led-running = &led_pwr_sys;
  18                 led-upgrade = &led_pwr_sys;
  19         };
  20
  21         keys {
  22                 compatible = "gpio-keys";
  23
  24                 mode {
  25                         label = "reset";
  26                         gpios = <&gpio0 22 GPIO_ACTIVE_LOW>;
  27                         linux,code = <KEY_RESTART>;
  28                 };
  29         };
  30
  31         /* i2c of the SFP cage: port 12 */
  32         i2c0: i2c-rtl9300 {
  33                 compatible = "realtek,rtl9300-i2c";
  34                 reg = <0x1b00036c 0x3c>;
  35                 #address-cells = <1>;
  36                 #size-cells = <0>;
  37                 sda-pin = <10>;
  38                 scl-pin = <8>;
  39                 clock-frequency = <100000>;
  40         };
  41
  42         leds {
  43                 compatible = "gpio-leds";
  44
  45                 pinctrl-names = "default";
  46                 pinctrl-0 = <&pinmux_disable_sys_led>;
  47
  48                 led_pwr_sys: led-0 {
  49                         label = "green:power";
  50                         color = <LED_COLOR_ID_GREEN>;
  51                         function = LED_FUNCTION_POWER;
  52                         gpios = <&gpio0 0 GPIO_ACTIVE_HIGH>;
  53                 };
  54         };
  55
  56         sfp0: sfp-p12 {
  57                 compatible = "sff,sfp";
  58                 i2c-bus = <&i2c0>;
  59                 los-gpio = <&gpio0 17 GPIO_ACTIVE_HIGH>;
  60                 tx-fault-gpio = <&gpio0 20 GPIO_ACTIVE_HIGH>;
  61                 mod-def0-gpio = <&gpio0 16 GPIO_ACTIVE_LOW>;
  62                 tx-disable-gpio = <&gpio0 15 GPIO_ACTIVE_HIGH>;
  63         };
  64
  65         led_set: led_set@0 {
  66                 compatible = "realtek,rtl9300-leds";
  67                 active-low;
  68
  69                 led_set0 = <0x0000 0xffff 0x0a20 0x0b80>; // LED set 0: 1000Mbps,  10/100Mbps
  70                 led_set1 = <0x0a0b 0x0a28 0x0a82 0x0a0b>; // LED set 1: (10G, 5G, 2.5G) (2.5G, 1G)
  71                                                           // (5G, 10/100) (10G, 5G, 2.5G)
  72                 led_set2 = <0x0000 0xffff 0x0a20 0x0a01>; // LED set 2: 1000MBit, 10GBit
  73         };
  74 };
  75
  76 &spi0 {
  77         status = "okay";
  78         flash@0 {
  79                 compatible = "jedec,spi-nor";
  80                 reg = <0>;
  81                 spi-max-frequency = <10000000>;
  82
  83                 partitions {
  84                         compatible = "fixed-partitions";
  85                         #address-cells = <1>;
  86                         #size-cells = <1>;
  87
  88                         partition@0 {
  89                                 label = "u-boot";
  90                                 reg = <0x0 0xe0000>;
  91                                 read-only;
  92                         };
  93                         partition@e0000 {
  94                                 label = "u-boot-env";
  95                                 reg = <0xe0000 0x10000>;
  96                         };
  97                         partition@f0000 {
  98                                 label = "u-boot-env2";
  99                                 reg = <0xf0000 0x10000>;
 100                                 read-only;
 101                         };
 102                         partition@100000 {
 103                                 label = "jffs";
 104                                 reg = <0x100000 0x100000>;
 105                         };
 106                         partition@200000 {
 107                                 label = "jffs2";
 108                                 reg = <0x200000 0x100000>;
 109                         };
 110                         partition@b300000 {
 111                                 label = "firmware";
 112                                 reg = <0x300000 0xce0000>;
 113                                 compatible = "openwrt,uimage", "denx,uimage";
 114                                 openwrt,ih-magic = <0x93001250>;
 115                         };
 116                         partition@fe0000 {
 117                                 label = "log";
 118                                 reg = <0xfe0000 0x20000>;
 119                         };
 120                 };
 121         };
 122 };
 123
 124 &ethernet0 {
 125         mdio: mdio-bus {
 126                 compatible = "realtek,rtl838x-mdio";
 127                 regmap = <&ethernet0>;
 128                 #address-cells = <1>;
 129                 #size-cells = <0>;
 130
 131                 /* External RTL8218D PHY */
 132                 phy0: ethernet-phy@0 {
 133                         reg = <0>;
 134                         compatible = "ethernet-phy-ieee802.3-c22";
 135                         rtl9300,smi-address = <0 0>;
 136                         sds = < 2 >;
 137                         // Disabled because we do not know how to bring up again
 138                         // reset-gpios = <&gpio0 21 GPIO_ACTIVE_LOW>;
 139                 };
 140                 phy1: ethernet-phy@1 {
 141                         reg = <1>;
 142                         compatible = "ethernet-phy-ieee802.3-c22";
 143                         rtl9300,smi-address = <0 1>;
 144                 };
 145                 phy2: ethernet-phy@2 {
 146                         reg = <2>;
 147                         compatible = "ethernet-phy-ieee802.3-c22";
 148                         rtl9300,smi-address = <0 2>;
 149                 };
 150                 phy3: ethernet-phy@3 {
 151                         reg = <3>;
 152                         compatible = "ethernet-phy-ieee802.3-c22";
 153                         rtl9300,smi-address = <0 3>;
 154                 };
 155                 phy4: ethernet-phy@4 {
 156                         reg = <4>;
 157                         compatible = "ethernet-phy-ieee802.3-c22";
 158                         rtl9300,smi-address = <0 4>;
 159                 };
 160                 phy5: ethernet-phy@5 {
 161                         reg = <5>;
 162                         compatible = "ethernet-phy-ieee802.3-c22";
 163                         rtl9300,smi-address = <0 5>;
 164                 };
 165                 phy6: ethernet-phy@6 {
 166                         reg = <6>;
 167                         compatible = "ethernet-phy-ieee802.3-c22";
 168                         rtl9300,smi-address = <0 6>;
 169                 };
 170                 phy7: ethernet-phy@7 {
 171                         reg = <7>;
 172                         compatible = "ethernet-phy-ieee802.3-c22";
 173                         rtl9300,smi-address = <0 7>;
 174                 };
 175
 176                 /* External Aquantia 113C PHYs */
 177                 phy24: ethernet-phy@24 {
 178                         reg = <24>;
 179                         compatible = "ethernet-phy-ieee802.3-c45";
 180                         rtl9300,smi-address = <1 8>;
 181                         sds = < 6 >;
 182                         // Disabled because we do not know how to bring up again
 183                         // reset-gpios = <&gpio0 21 GPIO_ACTIVE_LOW>;
 184                 };
 185
 186                 phy25: ethernet-phy@25 {
 187                         reg = <25>;
 188                         compatible = "ethernet-phy-ieee802.3-c45";
 189                         rtl9300,smi-address = <2 8>;
 190                         sds = < 7 >;
 191                         // Disabled because we do not know how to bring up again
 192                         // reset-gpios = <&gpio0 21 GPIO_ACTIVE_LOW>;
 193                 };
 194
 195                 phy26: ethernet-phy@26 {
 196                         reg = <26>;
 197                         compatible = "ethernet-phy-ieee802.3-c45";
 198                         rtl9300,smi-address = <3 8>;
 199                         sds = < 8 >;
 200                         // Disabled because we do not know how to bring up again
 201                         // reset-gpios = <&gpio0 21 GPIO_ACTIVE_LOW>;
 202                 };
 203
 204                 /* SFP Ports */
 205                 phy27: ethernet-phy@27 {
 206                         compatible = "ethernet-phy-ieee802.3-c22";
 207                         phy-is-integrated;
 208                         reg = <27>;
 209                         rtl9300,smi-address = <4 0>;
 210                         sds = < 9 >;
 211                 };
 212
 213         };
 214 };
 215
 216 &switch0 {
 217         ports {
 218                 #address-cells = <1>;
 219                 #size-cells = <0>;
 220
 221                 port@0 {
 222                         reg = <0>;
 223                         label = "lan1";
 224                         phy-handle = <&phy0>;
 225                         phy-mode = "xgmii";
 226                         led-set = <0>;
 227                 };
 228                 port@1 {
 229                         reg = <1>;
 230                         label = "lan2";
 231                         phy-handle = <&phy1>;
 232                         phy-mode = "xgmii";
 233                         led-set = <0>;
 234                 };
 235                 port@2 {
 236                         reg = <2>;
 237                         label = "lan3";
 238                         phy-handle = <&phy2>;
 239                         phy-mode = "xgmii";
 240                         led-set = <0>;
 241                 };
 242                 port@3 {
 243                         reg = <3>;
 244                         label = "lan4";
 245                         phy-handle = <&phy3>;
 246                         phy-mode = "xgmii";
 247                         led-set = <0>;
 248                 };
 249                 port@4 {
 250                         reg = <4>;
 251                         label = "lan5";
 252                         phy-handle = <&phy4>;
 253                         phy-mode = "xgmii";
 254                         led-set = <0>;
 255                 };
 256                 port@5 {
 257                         reg = <5>;
 258                         label = "lan6";
 259                         phy-handle = <&phy5>;
 260                         phy-mode = "xgmii";
 261                         led-set = <0>;
 262                 };
 263                 port@6 {
 264                         reg = <6>;
 265                         label = "lan7";
 266                         phy-handle = <&phy6>;
 267                         phy-mode = "xgmii";
 268                         led-set = <0>;
 269                 };
 270                 port@7 {
 271                         reg = <7>;
 272                         label = "lan8";
 273                         phy-handle = <&phy7>;
 274                         phy-mode = "xgmii";
 275                         led-set = <0>;
 276                 };
 277
 278                 port@24 {
 279                         reg = <24>;
 280                         label = "lan9";
 281                         phy-mode = "usxgmii";
 282                         phy-handle = <&phy24>;
 283                         led-set = <1>;
 284                 };
 285                 port@25 {
 286                         reg = <25>;
 287                         label = "lan10";
 288                         phy-mode = "usxgmii";
 289                         phy-handle = <&phy25>;
 290                         led-set = <1>;
 291                 };
 292                 port@26 {
 293                         reg = <26>;
 294                         label = "lan11";
 295                         phy-mode = "usxgmii";
 296                         phy-handle = <&phy26>;
 297                         led-set = <1>;
 298                 };
 299
 300                 port@27 {
 301                         reg = <27>;
 302                         label = "lan12";
 303                         phy-mode = "10gbase-r";
 304                         phy-handle = <&phy27>;
 305                         sfp = <&sfp0>;
 306                         led-set = <2>;
 307
 308                         fixed-link {
 309                                 speed = <10000>;
 310                                 full-duplex;
 311                                 pause;
 312                         };
 313
 314                 };
 315
 316                 port@28 {
 317                         ethernet = <&ethernet0>;
 318                         reg = <28>;
 319                         phy-mode = "internal";
 320                         fixed-link {
 321                                 speed = <10000>;
 322                                 full-duplex;
 323                         };
 324                 };
 325         };
 326 };