ath79: relicense DTS files to the GPL 2.0+ / MIT
[openwrt/staging/lynxis.git] / target / linux / ath79 / dts / ar7241_ubnt-xm.dtsi
1 // SPDX-License-Identifier: GPL-2.0-or-later OR MIT
2
3 #include <dt-bindings/gpio/gpio.h>
4 #include <dt-bindings/input/input.h>
5
6 #include "ar7241.dtsi"
7
8 / {
9 compatible = "ubnt,xm", "qca,ar7241";
10 model = "Ubiquiti Networks XM (rev 1.0) board";
11
12 memory@0 {
13 device_type = "memory";
14 reg = <0x0 0x2000000>;
15 };
16
17 /* extosc: ref {
18 compatible = "fixed-clock";
19 #clock-cells = <0>;
20 clock-frequency = <40000000>;
21 };
22 */
23 keys {
24 compatible = "gpio-keys-polled";
25 #address-cells = <1>;
26 #size-cells = <0>;
27
28 poll-interval = <20>;
29 button@0 {
30 label = "reset";
31 linux,code = <KEY_RESTART>;
32 gpios = <&gpio 12 GPIO_ACTIVE_LOW>;
33 debounce-interval = <60>;
34 };
35 };
36
37 leds {
38 compatible = "gpio-leds";
39 led@0 {
40 label = "ubnt:red:link1";
41 gpios = <&gpio 0 GPIO_ACTIVE_HIGH>;
42 };
43
44 led@1 {
45 label = "ubnt:orange:link2";
46 gpios = <&gpio 1 GPIO_ACTIVE_HIGH>;
47 };
48
49 led@2 {
50 label = "ubnt:green:link3";
51 gpios = <&gpio 11 GPIO_ACTIVE_HIGH>;
52 };
53
54 led@3 {
55 label = "ubnt:green:link4";
56 gpios = <&gpio 7 GPIO_ACTIVE_HIGH>;
57 };
58 };
59 };
60
61 &uart {
62 status = "okay";
63 };
64
65 /*&pll {
66 clocks = <&extosc>;
67 };*/
68
69 &spi {
70 status = "okay";
71 num-cs = <1>;
72
73 flash@0 {
74 #address-cells = <1>;
75 #size-cells = <1>;
76 compatible = "mx25l6405d";
77 reg = <0>;
78 spi-max-frequency = <25000000>;
79
80 partition@0 {
81 label = "u-boot";
82 reg = <0x000000 0x040000>;
83 };
84
85 partition@1 {
86 label = "u-boot-env";
87 reg = <0x040000 0x010000>;
88 };
89
90 partition@2 {
91 label = "firmware";
92 reg = <0x050000 0x750000>;
93 };
94
95 partition@3 {
96 label = "board_config";
97 reg = <0x7a0000 0x010000>;
98 read-only;
99 };
100
101 partition@4 {
102 label = "cfg";
103 reg = <0x7b0000 0x040000>;
104 read-only;
105 };
106
107 art: partition@5 {
108 label = "art";
109 reg = <0x7f0000 0x010000>;
110 read-only;
111 };
112 };
113 };
114
115 &pcie {
116 status = "okay";
117
118 ath9k@0000 {
119 reg = <0x0000 0 0 0 0>;
120 qca,no-eeprom;
121 };
122 };
123
124 &mdio0 {
125 status = "okay";
126
127 phy4: ethernet-phy@4 {
128 reg = <4>;
129 phy-mode = "mii";
130 };
131 };
132
133 &eth0 {
134 status = "okay";
135
136 mtd-mac-address = <&art 0x0>;
137
138 phy-mode = "mii";
139 phy-handle = <&phy4>;
140 };
141
142 &eth1 {
143 status = "okay";
144
145 mtd-mac-address = <&art 0x6>;
146 };